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Pass core ID to port lock macros (#17)
Pass core ID to port task/ISR lock macros.
1 parent 01e5531 commit 3c5bfb8

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4 files changed

+44
-45
lines changed

4 files changed

+44
-45
lines changed

GCC/CORTEX_A53_64-bit_UltraScale_MPSoC/port.c

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -843,9 +843,8 @@ static inline void vSet64(volatile uint64_t* x, uint64_t value)
843843
__asm("dsb sy");
844844
}
845845

846-
void vPortRecursiveLock(uint32_t ulLockNum, BaseType_t uxAcquire)
846+
void vPortRecursiveLock(BaseType_t xCoreID, uint32_t ulLockNum, BaseType_t uxAcquire)
847847
{
848-
uint32_t ulCoreNum = (uint32_t)portGET_CORE_ID();
849848
uint32_t ulLockBit = 1u << ulLockNum;
850849

851850
/* Lock acquire */
@@ -858,7 +857,7 @@ void vPortRecursiveLock(uint32_t ulLockNum, BaseType_t uxAcquire)
858857
if( lSpinTrylock(&ulGateWord[ulLockNum]) != 0)
859858
{
860859
/* Check if the core owns the spinlock */
861-
if( uxGet64(&ucOwnedByCore[ulCoreNum]) & ulLockBit )
860+
if( uxGet64(&ucOwnedByCore[xCoreID]) & ulLockBit )
862861
{
863862
configASSERT( uxGet64(&ucRecursionCountByLock[ulLockNum]) != 255u);
864863
vSet64(&ucRecursionCountByLock[ulLockNum], (uxGet64(&ucRecursionCountByLock[ulLockNum])+1));
@@ -882,21 +881,21 @@ void vPortRecursiveLock(uint32_t ulLockNum, BaseType_t uxAcquire)
882881
/* Set lock count as 1 */
883882
vSet64(&ucRecursionCountByLock[ulLockNum], 1);
884883
/* Set ucOwnedByCore */
885-
vSet64(&ucOwnedByCore[ulCoreNum], (uxGet64(&ucOwnedByCore[ulCoreNum]) | ulLockBit));
884+
vSet64(&ucOwnedByCore[xCoreID], (uxGet64(&ucOwnedByCore[xCoreID]) | ulLockBit));
886885
}
887886
/* Lock release */
888887
else
889888
{
890889
/* Assert the lock is not free already */
891-
configASSERT( (uxGet64(&ucOwnedByCore[ulCoreNum]) & ulLockBit) != 0 );
890+
configASSERT( (uxGet64(&ucOwnedByCore[xCoreID]) & ulLockBit) != 0 );
892891
configASSERT( uxGet64(&ucRecursionCountByLock[ulLockNum]) != 0 );
893892

894893
/* Reduce ucRecursionCountByLock by 1 */
895894
vSet64(&ucRecursionCountByLock[ulLockNum], (uxGet64(&ucRecursionCountByLock[ulLockNum]) - 1) );
896895

897896
if( !uxGet64(&ucRecursionCountByLock[ulLockNum]) )
898897
{
899-
vSet64(&ucOwnedByCore[ulCoreNum], (uxGet64(&ucOwnedByCore[ulCoreNum]) & ~ulLockBit));
898+
vSet64(&ucOwnedByCore[xCoreID], (uxGet64(&ucOwnedByCore[xCoreID]) & ~ulLockBit));
900899
vSpinUnlock(&ulGateWord[ulLockNum]);
901900
__asm volatile("sev");
902901
/* Add barrier to ensure lock is taken before we proceed */

GCC/CORTEX_A53_64-bit_UltraScale_MPSoC/portmacro.h

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,7 @@ static inline void vEnableInterrupts()
121121
{
122122
__asm volatile (
123123
"msr daifclr, #2\n"
124-
:
124+
:
125125
:
126126
: "memory"
127127
);
@@ -135,7 +135,7 @@ static inline void vRestoreInterrupts(UBaseType_t flags)
135135
"bic x1, x1, #128\n"
136136
"orr x1, x1, x2\n"
137137
"msr daif, x1\n"
138-
:
138+
:
139139
: "r" (flags)
140140
: "x0","x1","x2","memory"
141141
);
@@ -145,7 +145,7 @@ static inline void vRestoreInterrupts(UBaseType_t flags)
145145
static inline BaseType_t xPortGetCoreID()
146146
{
147147
register BaseType_t xCoreID;
148-
148+
149149
__asm volatile (
150150
"mrs x0, mpidr_el1\n"
151151
"and %0, x0, #0xff\n"
@@ -167,7 +167,7 @@ extern UBaseType_t vTaskEnterCriticalFromISR( void );
167167
extern void vTaskExitCriticalFromISR( UBaseType_t uxSavedInterruptStatus );
168168

169169
#define portENTER_CRITICAL() vTaskEnterCritical();
170-
#define portEXIT_CRITICAL() vTaskExitCritical();
170+
#define portEXIT_CRITICAL() vTaskExitCritical();
171171
#define portENTER_CRITICAL_FROM_ISR() vTaskEnterCriticalFromISR()
172172
#define portEXIT_CRITICAL_FROM_ISR( x ) vTaskExitCriticalFromISR( x )
173173

@@ -302,17 +302,17 @@ static inline void vAssertIfInIsr()
302302
#define ISR_LOCK (0u)
303303
#define TASK_LOCK (1u)
304304

305-
extern void vPortRecursiveLock(uint32_t ulLockNum, BaseType_t uxAcquire);
305+
extern void vPortRecursiveLock(BaseType_t xCoreID, uint32_t ulLockNum, BaseType_t uxAcquire);
306306

307307

308-
#define portRELEASE_ISR_LOCK() vPortRecursiveLock(ISR_LOCK, pdFALSE)
309-
#define portGET_ISR_LOCK() vPortRecursiveLock(ISR_LOCK, pdTRUE)
308+
#define portRELEASE_ISR_LOCK( xCoreID ) vPortRecursiveLock(( xCoreID ), ISR_LOCK, pdFALSE)
309+
#define portGET_ISR_LOCK( xCoreID ) vPortRecursiveLock(( xCoreID ), ISR_LOCK, pdTRUE)
310310

311-
#define portRELEASE_TASK_LOCK() vPortRecursiveLock(TASK_LOCK, pdFALSE)
312-
#define portGET_TASK_LOCK() vPortRecursiveLock(TASK_LOCK, pdTRUE)
311+
#define portRELEASE_TASK_LOCK( xCoreID ) vPortRecursiveLock(( xCoreID ), TASK_LOCK, pdFALSE)
312+
#define portGET_TASK_LOCK( xCoreID ) vPortRecursiveLock(( xCoreID ), TASK_LOCK, pdTRUE)
313313

314314
extern void vInterruptCore(uint32_t ulInterruptID, uint32_t ulCoreID);
315-
/* Use PPI 0 as the yield core intrrupt */
315+
/* Use PPI 0 as the yield core interrupt. */
316316
#define portYIELD_CORE_INT_ID 0
317317
#define portYIELD_CORE( xCoreID ) vInterruptCore(portYIELD_CORE_INT_ID, (uint32_t)xCoreID)
318318

GCC/RP2350_ARM_NTZ/non_secure/portmacro.h

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -170,21 +170,21 @@ extern volatile uint32_t ulCriticalNestings[ configNUMBER_OF_CORES ];
170170

171171
/* Note this is a single method with uxAcquire parameter since we have
172172
* static vars, the method is always called with a compile time constant for
173-
* uxAcquire, and the compiler should dothe right thing! */
174-
static inline void vPortRecursiveLock( uint32_t ulLockNum,
173+
* uxAcquire, and the compiler should do the right thing! */
174+
static inline void vPortRecursiveLock( BaseType_t xCoreID,
175+
uint32_t ulLockNum,
175176
spin_lock_t * pxSpinLock,
176177
BaseType_t uxAcquire )
177178
{
178179
static volatile uint8_t ucOwnedByCore[ portMAX_CORE_COUNT ][portRTOS_SPINLOCK_COUNT];
179180
static volatile uint8_t ucRecursionCountByLock[ portRTOS_SPINLOCK_COUNT ];
180181

181182
configASSERT( ulLockNum < portRTOS_SPINLOCK_COUNT );
182-
uint32_t ulCoreNum = get_core_num();
183183

184184
if( uxAcquire )
185185
{
186186
if (!spin_try_lock_unsafe(pxSpinLock)) {
187-
if( ucOwnedByCore[ ulCoreNum ][ ulLockNum ] )
187+
if( ucOwnedByCore[ xCoreID ][ ulLockNum ] )
188188
{
189189
configASSERT( ucRecursionCountByLock[ ulLockNum ] != 255u );
190190
ucRecursionCountByLock[ ulLockNum ]++;
@@ -194,31 +194,31 @@ static inline void vPortRecursiveLock( uint32_t ulLockNum,
194194
}
195195
configASSERT( ucRecursionCountByLock[ ulLockNum ] == 0 );
196196
ucRecursionCountByLock[ ulLockNum ] = 1;
197-
ucOwnedByCore[ ulCoreNum ][ ulLockNum ] = 1;
197+
ucOwnedByCore[ xCoreID ][ ulLockNum ] = 1;
198198
}
199199
else
200200
{
201-
configASSERT( ( ucOwnedByCore[ ulCoreNum ] [ulLockNum ] ) != 0 );
201+
configASSERT( ( ucOwnedByCore[ xCoreID ] [ulLockNum ] ) != 0 );
202202
configASSERT( ucRecursionCountByLock[ ulLockNum ] != 0 );
203203

204204
if( !--ucRecursionCountByLock[ ulLockNum ] )
205205
{
206-
ucOwnedByCore[ ulCoreNum ] [ ulLockNum ] = 0;
206+
ucOwnedByCore[ xCoreID ] [ ulLockNum ] = 0;
207207
spin_unlock_unsafe(pxSpinLock);
208208
}
209209
}
210210
}
211211

212212
#if ( configNUMBER_OF_CORES == 1 )
213-
#define portGET_ISR_LOCK()
214-
#define portRELEASE_ISR_LOCK()
215-
#define portGET_TASK_LOCK()
216-
#define portRELEASE_TASK_LOCK()
213+
#define portGET_ISR_LOCK( xCoreID )
214+
#define portRELEASE_ISR_LOCK( xCoreID )
215+
#define portGET_TASK_LOCK( xCoreID )
216+
#define portRELEASE_TASK_LOCK( xCoreID )
217217
#else /* configNUMBER_OF_CORES == 1 */
218-
#define portGET_ISR_LOCK() vPortRecursiveLock( 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdTRUE )
219-
#define portRELEASE_ISR_LOCK() vPortRecursiveLock( 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdFALSE )
220-
#define portGET_TASK_LOCK() vPortRecursiveLock( 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdTRUE )
221-
#define portRELEASE_TASK_LOCK() vPortRecursiveLock( 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdFALSE )
218+
#define portGET_ISR_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdTRUE )
219+
#define portRELEASE_ISR_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdFALSE )
220+
#define portGET_TASK_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdTRUE )
221+
#define portRELEASE_TASK_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdFALSE )
222222
#endif /* configNUMBER_OF_CORES == 1 */
223223

224224
/* *INDENT-OFF* */

GCC/RP2350_RISC-V/include/portmacro.h

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -255,20 +255,20 @@ extern void vTaskExitCriticalFromISR( UBaseType_t uxSavedInterruptStatus );
255255
/* Note this is a single method with uxAcquire parameter since we have
256256
* static vars, the method is always called with a compile time constant for
257257
* uxAcquire, and the compiler should do the right thing! */
258-
static inline void vPortRecursiveLock( uint32_t ulLockNum,
258+
static inline void vPortRecursiveLock( BaseType_t xCoreID,
259+
uint32_t ulLockNum,
259260
spin_lock_t * pxSpinLock,
260261
BaseType_t uxAcquire )
261262
{
262263
static volatile uint8_t ucOwnedByCore[ portMAX_CORE_COUNT ][portRTOS_SPINLOCK_COUNT];
263264
static volatile uint8_t ucRecursionCountByLock[ portRTOS_SPINLOCK_COUNT ];
264265

265266
configASSERT( ulLockNum < portRTOS_SPINLOCK_COUNT );
266-
uint32_t ulCoreNum = get_core_num();
267267

268268
if( uxAcquire )
269269
{
270270
if (!spin_try_lock_unsafe(pxSpinLock)) {
271-
if( ucOwnedByCore[ ulCoreNum ][ ulLockNum ] )
271+
if( ucOwnedByCore[ xCoreID ][ ulLockNum ] )
272272
{
273273
configASSERT( ucRecursionCountByLock[ ulLockNum ] != 255u );
274274
ucRecursionCountByLock[ ulLockNum ]++;
@@ -278,31 +278,31 @@ static inline void vPortRecursiveLock( uint32_t ulLockNum,
278278
}
279279
configASSERT( ucRecursionCountByLock[ ulLockNum ] == 0 );
280280
ucRecursionCountByLock[ ulLockNum ] = 1;
281-
ucOwnedByCore[ ulCoreNum ][ ulLockNum ] = 1;
281+
ucOwnedByCore[ xCoreID ][ ulLockNum ] = 1;
282282
}
283283
else
284284
{
285-
configASSERT( ( ucOwnedByCore[ ulCoreNum ] [ulLockNum ] ) != 0 );
285+
configASSERT( ( ucOwnedByCore[ xCoreID ] [ulLockNum ] ) != 0 );
286286
configASSERT( ucRecursionCountByLock[ ulLockNum ] != 0 );
287287

288288
if( !--ucRecursionCountByLock[ ulLockNum ] )
289289
{
290-
ucOwnedByCore[ ulCoreNum ] [ ulLockNum ] = 0;
290+
ucOwnedByCore[ xCoreID ] [ ulLockNum ] = 0;
291291
spin_unlock_unsafe(pxSpinLock);
292292
}
293293
}
294294
}
295295

296296
#if ( configNUMBER_OF_CORES == 1 )
297-
#define portGET_ISR_LOCK()
298-
#define portRELEASE_ISR_LOCK()
299-
#define portGET_TASK_LOCK()
300-
#define portRELEASE_TASK_LOCK()
297+
#define portGET_ISR_LOCK( xCoreID )
298+
#define portRELEASE_ISR_LOCK( xCoreID )
299+
#define portGET_TASK_LOCK( xCoreID )
300+
#define portRELEASE_TASK_LOCK( xCoreID )
301301
#else /* configNUMBER_OF_CORES == 1 */
302-
#define portGET_ISR_LOCK() vPortRecursiveLock( 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdTRUE )
303-
#define portRELEASE_ISR_LOCK() vPortRecursiveLock( 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdFALSE )
304-
#define portGET_TASK_LOCK() vPortRecursiveLock( 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdTRUE )
305-
#define portRELEASE_TASK_LOCK() vPortRecursiveLock( 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdFALSE )
302+
#define portGET_ISR_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdTRUE )
303+
#define portRELEASE_ISR_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdFALSE )
304+
#define portGET_TASK_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdTRUE )
305+
#define portRELEASE_TASK_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdFALSE )
306306
#endif /* configNUMBER_OF_CORES == 1 */
307307

308308
/* *INDENT-OFF* */

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