Skip to content

Commit 3ff92f7

Browse files
committed
fixes initialization of RISC-V cores by calling reset early
1 parent 3678067 commit 3ff92f7

File tree

1 file changed

+5
-0
lines changed

1 file changed

+5
-0
lines changed

src/sysc/core_complex.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -232,13 +232,17 @@ template <unsigned int BUSWIDTH, typename QK> void core_complex<BUSWIDTH, QK>::i
232232
#else
233233
SC_METHOD(sw_irq_cb);
234234
sensitive << sw_irq_i;
235+
dont_initialize();
235236
SC_METHOD(timer_irq_cb);
236237
sensitive << timer_irq_i;
238+
dont_initialize();
237239
SC_METHOD(ext_irq_cb);
238240
sensitive << ext_irq_i;
241+
dont_initialize();
239242
SC_METHOD(local_irq_cb);
240243
for(auto pin : local_irq_i)
241244
sensitive << pin;
245+
dont_initialize();
242246
#endif
243247

244248
SC_METHOD(forward);
@@ -378,6 +382,7 @@ template <unsigned int BUSWIDTH, typename QK> void core_complex<BUSWIDTH, QK>::l
378382
#endif
379383

380384
template <unsigned int BUSWIDTH, typename QK> void core_complex<BUSWIDTH, QK>::run() {
385+
reset(GET_PROP_VALUE(reset_address));
381386
wait(SC_ZERO_TIME); // separate from elaboration phase
382387
do {
383388
wait(SC_ZERO_TIME);

0 commit comments

Comments
 (0)