address2register return out of range register index when PLIC base address is not 0x0

[Elie1968]

Hello

Function address2register (L. 269) in file plic/rtl/verilog/core/plic_dynamic_registers.sv return out of range index when base address of PLIC is not 0.
It should compute register index from the lower bits of the address only.
The number of bits to take into account depends on the allocatted space for the PLIC in the system memory map.
For example it it 4Kb [bits 11 to 0) on the APB bus protocols for each peripheral.

svn diff plic_dynamic_registers.sv
Index: plic_dynamic_registers.sv
===================================================================
--- plic_dynamic_registers.sv (revision 1522)
+++ plic_dynamic_registers.sv (working copy)
@@ -270,7 +270,7 @@
//Translate 'address' into register number
input [ADDR_SIZE-1:0] address;

- return address / DATA_BYTES;
+ return address[7:0] / DATA_BYTES;
endfunction : address2register

Regards
Jean-Marc