From b4034dc122b192e63a92892815dfe450ac937d7e Mon Sep 17 00:00:00 2001
From: Vladimir Shiryaev <tagolog@users.noreply.github.com>
Date: Fri, 29 May 2026 21:58:04 -0700
Subject: [PATCH] [mlir][dxsa] Add dcl_input_siv instruction

Example:
  dxsa.dcl_input_siv <type = input, components = 4, mask = <x, y, z, w>, index = [0]>, <position>

Signed-off-by: Vladimir Shiryaev <tagolog@users.noreply.github.com>
---
 mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td  |  18 ++++++++++++++++++
 mlir/lib/Target/DXSA/BinaryParser.cpp         |  17 +++++++++++++++++
 mlir/test/Target/DXSA/dcl_input_siv.mlir      |   8 ++++++++
 .../test/Target/DXSA/inputs/dcl_input_siv.bin | Bin 0 -> 64 bytes
 4 files changed, 43 insertions(+)
 create mode 100644 mlir/test/Target/DXSA/dcl_input_siv.mlir
 create mode 100644 mlir/test/Target/DXSA/inputs/dcl_input_siv.bin

diff --git a/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td b/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
index 7b103dfe3248..58aace15a156 100644
--- a/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
+++ b/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
@@ -777,6 +777,24 @@ def DXSA_DclInputSgv : DXSA_Op<"dcl_input_sgv"> {
   let assemblyFormat = "$operand `,` $name attr-dict";
 }
 
+def DXSA_DclInputSiv : DXSA_Op<"dcl_input_siv"> {
+  let summary = "declares an input register as a System Interpreted Value";
+  let description = [{
+    The `dxsa.dcl_input_siv` operation declares an input register
+    that expects a System Interpreted Value to be provided
+    from the upstream Stage.
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_input_siv <type = input, components = 4, mask = <x, y, z, w>, index = [0]>, <position>
+    ```
+  }];
+  let arguments = (ins DXSA_InlineOperandAttr:$operand,
+                       DXSA_SystemValueNameAttr:$name);
+  let assemblyFormat = "$operand `,` $name attr-dict";
+}
+
 def DXSA_DclOutputSgv : DXSA_Op<"dcl_output_sgv"> {
   let summary = "declares an output as a System Generated Value";
   let description = [{
diff --git a/mlir/lib/Target/DXSA/BinaryParser.cpp b/mlir/lib/Target/DXSA/BinaryParser.cpp
index f77ac68e7025..7ee5dee95668 100644
--- a/mlir/lib/Target/DXSA/BinaryParser.cpp
+++ b/mlir/lib/Target/DXSA/BinaryParser.cpp
@@ -657,6 +657,12 @@ class DXBuilder {
     return dxsa::DclInputSgv::create(builder, loc, operand, nameAttr);
   }
 
+  Instruction buildDclInputSiv(dxsa::InlineOperandAttr operand,
+                               dxsa::SystemValueName name, Location loc) {
+    auto nameAttr = dxsa::SystemValueNameAttr::get(builder.getContext(), name);
+    return dxsa::DclInputSiv::create(builder, loc, operand, nameAttr);
+  }
+
   Instruction buildDclOutputSgv(dxsa::InlineOperandAttr operand,
                                 dxsa::SystemValueName name, Location loc) {
     auto nameAttr = dxsa::SystemValueNameAttr::get(builder.getContext(), name);
@@ -1281,6 +1287,14 @@ class Parser {
     return builder.buildDclIndexRange(*operand, *count, loc);
   }
 
+  FailureOr<Instruction> parseDclInputSiv(Location loc) {
+    auto operand = parseInlineOperand();
+    FAILURE_IF_FAILED(operand);
+    auto name = parseSystemValueName(getLocation());
+    FAILURE_IF_FAILED(name);
+    return builder.buildDclInputSiv(*operand, *name, loc);
+  }
+
   FailureOr<Instruction> parseDclOutputSgv(Location loc) {
     auto operand = parseInlineOperand();
     FAILURE_IF_FAILED(operand);
@@ -1458,6 +1472,9 @@ class Parser {
     case D3D10_SB_OPCODE_DCL_INPUT_SGV:
       result = parseDclInputSgv(loc);
       break;
+    case D3D10_SB_OPCODE_DCL_INPUT_SIV:
+      result = parseDclInputSiv(loc);
+      break;
     case D3D10_SB_OPCODE_DCL_OUTPUT_SGV:
       result = parseDclOutputSgv(loc);
       break;
diff --git a/mlir/test/Target/DXSA/dcl_input_siv.mlir b/mlir/test/Target/DXSA/dcl_input_siv.mlir
new file mode 100644
index 000000000000..3d6f468630ee
--- /dev/null
+++ b/mlir/test/Target/DXSA/dcl_input_siv.mlir
@@ -0,0 +1,8 @@
+// RUN: mlir-translate --import-dxsa-bin %S/inputs/dcl_input_siv.bin | FileCheck %s
+
+// CHECK:      module {
+// CHECK-NEXT:   dxsa.dcl_input_siv <type = input, components = 4, mask = <x, y, z, w>, index = [0]>, <position>
+// CHECK-NEXT:   dxsa.dcl_input_siv <type = input, components = 4, mask = <x, y, z>, index = [1]>, <clipDistance>
+// CHECK-NEXT:   dxsa.dcl_input_siv <type = input, components = 4, mask = <x, y>, index = [2]>, <cullDistance>
+// CHECK-NEXT:   dxsa.dcl_input_siv <type = input, components = 4, mask = <x>, index = [3]>, <finalQuadUInsideTessFactor>
+// CHECK-NEXT: }
diff --git a/mlir/test/Target/DXSA/inputs/dcl_input_siv.bin b/mlir/test/Target/DXSA/inputs/dcl_input_siv.bin
new file mode 100644
index 0000000000000000000000000000000000000000..e2a4a7102ea44e733d41bdf3bfdc5acc366d046f
GIT binary patch
literal 64
rcmYdfU|{(qAiw|uj6j?S<QD<?AT|?}Zv^Cn*vwGA5ReaI^8+yeq;vz=

literal 0
HcmV?d00001