deploy: e2b7b89

Author: github-actions[bot]

_sources/solutions/reference-designs/eval-ad9081/index.rst.txt

@@ -94,8 +94,11 @@ Table of contents
    #. :ref:`ad9081 quickstart`:
 
       #. Using the :ref:`Arria 10 SX SoC <ad9081 quickstart a10soc>`
-      #. Using the :ref:`VCK190 & VPK180/Versal <ad9081 quickstart versal>`
-      #. Using the :ref:`ZCU102/Zynq UltraScale MP SoC <ad9081 quickstart zynqmp>`
+      #. Using the :ref:`VCK190 & VPK180/Versal <ad9081 quickstart vck190>`
+      #. Using the :ref:`VCU118/ Virtex UltraScale+ <ad9081 quickstart vcu118>`
+      #. Using the :ref:`ZC706/ Zynq-7000 SoC <ad9081 quickstart zc706>`
+      #. Using the :ref:`ZCU102/Zynq UltraScale+ MP SoC <ad9081 quickstart zcu102>`
+
 
    #. Configure an SD Card with :external+adi-kuiper-gen:doc:`Kuiper <index>`
 

_sources/solutions/reference-designs/eval-ad9081/prerequisites.rst.txt

@@ -32,9 +32,9 @@ Hardware prerequisites
       - LAN cable (Ethernet)
       - Host PC (Windows or Linux)
 
-#. Internet connection (without proxies makes things much easier) to update the
-   scripts/binaries on the SD card that came with the ADI FMC Card (firewalls
-   are OK, proxies make things a pain).
+#. Internet connection (without proxies makes things much easier) to update
+   the scripts/binaries on the SD card that came with the ADI FMC Card
+   (firewalls are OK, proxies make things a pain).
 #. RF Test equipment
 #. An SD card with at least 16GB of memory (in case you're using Linux). You
    should have received one when purchasing the evaluation board.
@@ -45,9 +45,10 @@ Software prerequisites
 Normally, for basic functionalities regarding visualizing the data received
 from the FPGA, we use the following:
 
-#. :external+scopy:doc:`Scopy <index>` v2.0 or later (must contain the IIO plugin)
+#. :external+scopy:doc:`Scopy <index>` v2.0 or later (must contain the IIO
+   plugin)
 
 .. note::
 
-   :adi:`ADI <>` does not offer FPGA carrier platforms for sale or loan; getting
-   one yourself is the normal part of development or evaluation.
+   :adi:`ADI <>` does not offer FPGA carrier platforms for sale or loan;
+   getting one yourself is the normal part of development or evaluation.

_sources/solutions/reference-designs/eval-ad9081/quickstart/a10soc.rst.txt

@@ -3,15 +3,17 @@
 Arria 10 SoC Quick start
 ===============================================================================
 
-.. image:: ../../images/ad9081_a10soc_setup.jpg
-   :width: 800
-
 This guide provides quick instructions on how to setup the
 :adi:`EVAL-AD9081` on:
 
 - :intel:`Arria 10 SoC <content/www/us/en/products/details/fpga/arria/10.html>`
   (Rev. C or later) on FMCA
 
+.. image:: ../../images/a10soc.jpg
+   :width: 900
+
+.. esd-warning::
+
 .. warning::
 
     :adi:`EVAL-AD9082` is not supported on
@@ -55,8 +57,8 @@ Instructions on how to manually build the boot files from source can be found
 here:
 
 - :dokuwiki:`Building the Intel SoC-FPGA kernel and devicetrees from source <resources/tools-software/linux-build/generic/socfpga>`
-- :external+hdl:ref:`ad9081_fmca_ebz` build documentation. More HDL build details at
-  :external+hdl:ref:`build_hdl`.
+- :external+hdl:ref:`ad9081_fmca_ebz` build documentation. More HDL build
+  details at :external+hdl:ref:`build_hdl`.
 
 Required software
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -115,26 +117,28 @@ These resistors can be found on the backside of the A10SoC, underneath the
 FMCA connector (J29). The following picture shows the required configuration
 to be compatible with the :adi:`EVAL-AD9081`.
 
+.. image:: ../../images/a10soc_fmc_rework.jpg
+   :width: 400
+
 Testing
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
 Creating the setup
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-.. image:: ../../images/a10soc.jpg
-   :width: 900
-
-.. esd-warning::
+.. image:: ../../images/ad9081_a10soc_setup.jpg
+   :width: 800
 
 In the following example, we will make a physical loopback between the ADC
 and the DAC channels on the evaluation board, using SMA cables.
 
 Follow the steps in this order, to avoid damaging the components:
 
 #. Connect the SMA cables ADC0-DAC0, ADC1-DAC1, ADC2-DAC2, ADC3-DAC3
-#. Connect the :adi:`EVAL-AD9081` / :adi:`EVAL-AD9082` FMC board to the
-   FPGA carrier **HPC1** FMCA (J29) socket
-#. Both the HPS (J26) and FPGA (J27) memory module must be installed on the A10SoC
+#. Connect the :adi:`EVAL-AD9081` / :adi:`EVAL-AD9082` FMC board to the A10SOC
+   **HPC1** FMCA (J29) socket
+#. Both the HPS (J26) and FPGA (J27) memory module must be installed on the
+   A10SoC
 #. Insert microSD card into the card socket on the FPGA
 #. Configure the FPGA for SD card boot mode. That is the
    :intel:`default position <content/www/us/en/docs/programmable/683735/current/boot-select.html>`
@@ -147,9 +151,6 @@ Follow the steps in this order, to avoid damaging the components:
 #. Observe Kernel and serial console output messages on your terminal (use
    the first ttyUSB or COM port registered)
 
-.. image:: ../../images/a10soc_fmc_rework.jpg
-   :width: 400
-
 Boot messages
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -677,6 +678,13 @@ To reboot the system, run:
    be taken not to corrupt the file system -- please shut down things, don't
    just turn off the power switch. Depending on your monitor, the standard
    power off could be hiding. You can do this from the terminal as well with
-   :code:`sudo shutdown -h now` or the above-mentioned command for powering off.
+   :code:`sudo shutdown -h now` or the above-mentioned command for powering
+   off.
 
 .. include:: ../../common/using-iio-osc.rst
+
+..
+   About the IIO devices
+   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+   
+   TBD

_sources/solutions/reference-designs/eval-ad9081/quickstart/index.rst.txt

@@ -5,14 +5,16 @@ Quick start guides
 
 The Quick start guides provide simple step by step instructions on how to do
 an initial system setup for the :adi:`EVAL-AD9081` / :adi:`EVAL-AD9082`
-boards on various FPGA development boards. In these guides, we will discuss how
-to program the bitstream, run a no-OS program or boot a Linux distribution.
+boards on various FPGA development boards. In these guides, we will discuss
+how to program the bitstream, run a no-OS program or boot a Linux distribution.
 
 .. toctree::
 
    On A10SoC <a10soc>
-   On VCK190 <versal>
-   On ZCU102 <zynqmp>
+   On VCK190 <vck190>
+   On ZC706 <zc706>
+   On VCU118 <vcu118>
+   On ZCU102 <zcu102>
 
 .. _ad9081 carriers:
 

…ns/eval-ad9081/quickstart/versal.rst.txt …ns/eval-ad9081/quickstart/vck190.rst.txt_sources/solutions/reference-designs/eval-ad9081/quickstart/versal.rst.txt renamed to _sources/solutions/reference-designs/eval-ad9081/quickstart/vck190.rst.txt _sources/solutions/reference-designs/eval-ad9081/quickstart/versal.rst.txt renamed to _sources/solutions/reference-designs/eval-ad9081/quickstart/vck190.rst.txt

@@ -1,16 +1,18 @@
-.. _ad9081 quickstart versal:
+.. _ad9081 quickstart vck190:
 
 VCK190 Quick start
 ===============================================================================
 
-.. image:: ../../images/ad9081_vck190_setup.jpg
-   :width: 800
-
 This guide provides some quick instructions on how to setup the
 :adi:`EVAL-AD9081` / :adi:`EVAL-AD9082` on:
 
 - :xilinx:`VCK190` FMCP1 (J51) port
 
+.. image:: ../../images/vck190.jpg
+   :width: 900
+
+.. esd-warning::
+
 Using Linux as software
 -------------------------------------------------------------------------------
 
@@ -37,8 +39,8 @@ here:
 - :ref:`linux-kernel zynqmp` (the only difference compared to the ZynqMP is
   that instead of running ``make adi_zynqmp_defconfig``,
   you must run ``make adi_versal_defconfig``)
-- :external+hdl:ref:`ad9081_fmca_ebz` build documentation. More HDL build details at
-  :external+hdl:ref:`build_hdl`.
+- :external+hdl:ref:`ad9081_fmca_ebz` build documentation. More HDL build
+  details at :external+hdl:ref:`build_hdl`.
 
 Required Software
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -64,72 +66,69 @@ Required Hardware
 Testing
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-.. image:: ../../images/vck190.jpg
-   :width: 900
-
 Creating the setup
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-.. esd-warning::
+.. image:: ../../images/ad9081_vck190_setup.jpg
+   :width: 800
 
 Follow the steps in this order, to avoid damaging the components:
 
-- Connect the :adi:`EVAL-AD9081` / :adi:`EVAL-AD9082` FMC board to the
-  FPGA carrier FMC+ FMCP1 socket
-- Connect USB UART J207 (Type-C USB) to your host PC
-- Insert SD card with ADI Kuiper image into socket J302
-- Insert System Controller SD card into socket J206
-- Configure ACAP for SD boot (mode SW1[4:1] switch in the position
-  **OFF,OFF,OFF,ON** as seen in the below picture)
 
-.. image:: ../../images/vck190_sw1.jpg
-   :width: 200
+#. Connect the :adi:`EVAL-AD9081` / :adi:`EVAL-AD9082` FMC board to the
+   VCK190 FMCP1 socket
+#. Connect USB UART J207 (Type-C USB) to your host PC
+#. Insert SD card with ADI Kuiper image into socket J302
+#. Insert System Controller micro SD card into socket J206
+#. Configure ACAP for SD boot (mode SW1[4:1] switch in the position
+   **OFF,OFF,OFF,ON** as seen in the below picture)
+
+   .. image:: ../../images/vck190_sw1.jpg
+      :width: 200
 
-- Configure System Controller for SD card boot (mode SW11[4:1] switch in the
+#. Configure System Controller for SD card boot (mode SW11[4:1] switch in the
    position **OFF,OFF,OFF,ON** as seen in the below picture).
 
-.. image:: ../../images/vck190_sw11.jpg
-   :width: 200
+   .. image:: ../../images/vck190_sw11.jpg
+      :width: 200
 
-- Connect an Ethernet cable to J307 and also to SYSCTL Ethernet port to access
-  Board Evaluation & Management Tool (BEAM);
-- Turn on the power switch on the FPGA board;
-- Observe kernel and serial console messages on your terminal, both the ACAP
-  UART interface and the System controller. (use the first ttyUSB or COM port
-  registered for the ACAP UART interface, and try  the other 2 to find the one
-  for System Controller);
-- On the System Controller console, a BEAM Tool Web Address should be assigned.
-  Go to this web address to set VADJ_FMC to 1.5V;
-- To change VADJ_FMC On BEAM, click 'Test The Board'>'Board Settings'>'FMC'.
-  Then on 'Set VADJ_FMC', select 1.5V and click 'Set'.
+#. Connect an Ethernet cable to J307 and also to SYSCTL Ethernet port to access
+   Board Evaluation & Management Tool (BEAM);
+#. Turn on the power switch on the FPGA board;
+#. Observe kernel and serial console messages on your terminal, both the ACAP
+   UART interface and the System controller. (use the first ttyUSB or COM port
+   registered for the ACAP UART interface, and try the other 2 to find the one
+   for System Controller);
+#. On the System Controller console, a BEAM Tool Web Address should be assigned.
+   Go to this web address to set VADJ_FMC to 1.5V;
 
-.. image:: beam-home.jpg
-   :width: 1000
+   .. image:: beam-home.jpg
+      :width: 1000
 
-.. image:: beam-board-settings.jpg
-   :width: 1000
+   .. image:: beam-board-settings.jpg
+      :width: 1000
 
-.. image:: beam-set-vadj.jpg
-   :width: 1000
+   .. image:: beam-set-vadj.jpg
+      :width: 1000
 
-- On the ACAP UART interface console, reboot the system. After reboot,
-  ad9081 devices should be present.
+#. On the ACAP UART interface console, reboot the system. After reboot,
+   AD9081 devices should be present.
 
-.. note::
+   .. note::
 
-   Versal-based carriers (:xilinx:`VCK190`) might not boot with released image.
+      Versal-based carriers (:xilinx:`VCK190`) might not boot with released image.
 
-   The problem appears because some revisions of :xilinx:`VCK190` or
-   :xilinx:`VPK180` may have the date/time set randomly or in 64bit format.
-   To make them boot, it is enough to overwrite the date, following next steps:
+      The problem appears because some revisions of :xilinx:`VCK190` or
+      :xilinx:`VPK180` may have the date/time set randomly or in 64bit format.
+      To make them boot, it is enough to overwrite the date, following next steps:
 
-   - when booting the board, hit any key to go into u-boot menu
-   - type ``mw F12A0000 6613DE3D`` (this value is hexa of the date from Unix
-     Converter webpage)
-   - continue booting
+      - when booting the board, hit any key to go into u-boot menu
+      - type ``mw F12A0000 6613DE3D`` (this value is hexa of the date from Unix
+        Converter webpage)
+      - continue booting
 
 ACAP SD card boot files
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 The files that need to be present on the SD card BOOT partition are:
 
@@ -143,13 +142,13 @@ Copy the BOOT.BIN, boot.scr and system.dtb from the
 ADI Kuiper image. Then, copy the Image from the ``versal-common`` folder.
 
 Setting up UART
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 When setting up the UART make sure you connect to the ACAP UART interface and
 not the System controller.
 
 Boot messages
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 Login Information required for the System Controller:
 
@@ -868,13 +867,13 @@ To reboot the system, run:
    be taken not to corrupt the file system -- please shut down things, don't
    just turn off the power switch. Depending on your monitor, the standard
    power off could be hiding. You can do this from the terminal as well with
-   :code:`sudo shutdown -h now` or the above-mentioned command for powering off.
+   :code:`sudo shutdown -h now` or the above-mentioned command for powering
+   off.
 
 .. include:: ../../common/using-iio-osc.rst
 
-About the IIO devices
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
 ..
-   This section is with ^^^ because the last section from using-iio-osc.rst which
-   is included previously, has the last section as ^^^.
+   About the IIO devices
+   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+   
+   TBD