From 25f192459319f74852fe70dd50f41b0cc80847b7 Mon Sep 17 00:00:00 2001 From: Stanca Pop Date: Mon, 15 Dec 2025 16:31:57 +0200 Subject: [PATCH] ad9084: Review & doc updates Signed-off-by: Stanca Pop --- .../ad9084-profile-generator/index.rst | 4 +- .../ad9084_ebz/ad9084_ebz.png | 3 - .../reference-designs/ad9084_ebz/index.rst | 112 ------------ .../reference-designs/eval-ad9084/index.rst | 169 ++++++++++++++++++ .../prerequisites.rst | 10 +- .../quickstart/agilex.rst | 28 +-- .../quickstart/index.rst | 18 +- .../quickstart/microblaze.rst | 22 +-- .../quickstart/new_usecase.rst | 8 +- .../quickstart/versal.rst | 68 ++++--- .../quickstart/versal/beam-board-settings.jpg | 0 .../quickstart/versal/beam-home.jpg | 0 .../quickstart/versal/beam-set-vadj.jpg | 0 .../quickstart/versal/vck190.jpg | 0 .../quickstart/versal/vck190_ad9084_ebz.jpg | 0 .../quickstart/versal/vck190_sw1.jpg | 0 .../quickstart/versal/vck190_sw11.jpg | 0 .../eval-ad9084/user-guide.rst | 52 ++++++ .../reference-designs/images/ad9084.png | 3 + .../apollo_block_diagram.png | 0 .../reference-designs/images/eval_ad9084.png | 3 + .../images/eval_ad9084_top_view.png | 3 + 22 files changed, 312 insertions(+), 191 deletions(-) delete mode 100644 docs/solutions/reference-designs/ad9084_ebz/ad9084_ebz.png delete mode 100644 docs/solutions/reference-designs/ad9084_ebz/index.rst create mode 100644 docs/solutions/reference-designs/eval-ad9084/index.rst rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/prerequisites.rst (84%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/agilex.rst (97%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/index.rst (80%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/microblaze.rst (98%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/new_usecase.rst (82%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/versal.rst (95%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/versal/beam-board-settings.jpg (100%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/versal/beam-home.jpg (100%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/versal/beam-set-vadj.jpg (100%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/versal/vck190.jpg (100%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/versal/vck190_ad9084_ebz.jpg (100%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/versal/vck190_sw1.jpg (100%) rename docs/solutions/reference-designs/{ad9084_ebz => eval-ad9084}/quickstart/versal/vck190_sw11.jpg (100%) create mode 100644 docs/solutions/reference-designs/eval-ad9084/user-guide.rst create mode 100644 docs/solutions/reference-designs/images/ad9084.png rename docs/solutions/reference-designs/{ad9084_ebz => images}/apollo_block_diagram.png (100%) create mode 100644 docs/solutions/reference-designs/images/eval_ad9084.png create mode 100644 docs/solutions/reference-designs/images/eval_ad9084_top_view.png diff --git a/docs/software/ad9084-profile-generator/index.rst b/docs/software/ad9084-profile-generator/index.rst index d630f3e34..433f2fdcc 100644 --- a/docs/software/ad9084-profile-generator/index.rst +++ b/docs/software/ad9084-profile-generator/index.rst @@ -97,7 +97,7 @@ the generated ``.bin`` under the ``CONFIG_EXTRA_FIRMWARE`` option: $cat arch/arm64/configs/adi_versal_defconfig | grep 'CONFIG_EXTRA_FIRMWARE=' CONFIG_EXTRA_FIRMWARE="new_profile.bin APOLLO_FW_CPU1_B.bin <...>" -You can then follow the :ref:`Linux kernel build flow ` +You can then follow the :ref:`Linux kernel build flow ` to build the kernel and boot it on the board. For Intel Agilex 7 I-Series (`FM87 `__) @@ -115,7 +115,7 @@ the generated ``.bin`` under the ``CONFIG_EXTRA_FIRMWARE`` option: $cat arch/arm64/configs/adi_zynqmp_defconfig | grep 'CONFIG_EXTRA_FIRMWARE=' CONFIG_EXTRA_FIRMWARE="new_profile.bin APOLLO_FW_CPU1_B.bin <...>" -You can then follow the :ref:`Linux kernel build flow ` +You can then follow the :ref:`Linux kernel build flow ` to build the kernel and boot it on the board. .. important:: diff --git a/docs/solutions/reference-designs/ad9084_ebz/ad9084_ebz.png b/docs/solutions/reference-designs/ad9084_ebz/ad9084_ebz.png deleted file mode 100644 index 7d5156cd2..000000000 --- a/docs/solutions/reference-designs/ad9084_ebz/ad9084_ebz.png +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:898fca7577948fd0be55ee7d7e9e8e72467388f33c401806f3c678d629f11797 -size 4417803 diff --git a/docs/solutions/reference-designs/ad9084_ebz/index.rst b/docs/solutions/reference-designs/ad9084_ebz/index.rst deleted file mode 100644 index f724dc977..000000000 --- a/docs/solutions/reference-designs/ad9084_ebz/index.rst +++ /dev/null @@ -1,112 +0,0 @@ -.. _ad9094: - -AD9084-FMCA-EBZ (Apollo) -======================== - -16-bit, 28 GSPS, RF DAC core, and 12-bit, 20 GSPS RF ADC -"""""""""""""""""""""""""""""""""""""""""""""""""""""""" - -Overview --------- - -.. image:: ad9084_ebz.png - :align: right - :width: 600px - -The Apollo mixed signal front-end (MxFE®) is a highly integrated device with a -16-bit, 28 GSPS maximum sample rate, RF digital-to-analog converter (DAC) core, -and 12-bit, 20 GSPS maximum sample rate, RF analog-to-digital converter (ADC) -core. The AD9084 supports four transmit channels and four receive channels. The -AD9084 is well suited for applications requiring both wideband ADCs and DACs to -process signal(s) having wide instantaneous bandwidth. The device features a 48 -lane, 32.5 Gbps JESD204C or 20 Gbps JESD204B data transceiver port, an on-chip -clock multiplier, and a digital signal processing (DSP) capability targeted at -either wideband or multiband, direct to RF applications. The AD9084 also -features a bypass mode that allows the full bandwidth capability of the ADC -and/or DAC cores to bypass the DSP data-paths. The device also features low -latency loopback and frequency hopping modes targeted at phased array radar -systems and electronic warfare applications. - -Table of Contents ------------------ - -People who follow the flow that is outlined, have a much better experience with -things. However, like many things, documentation is never as complete as it should be. - -#. Use the board to better understand the AD9084 - - #. :ref:`What you need to get started ` - #. :ref:`Quick Start Guides ` - - #. :external+adi-kuiper-gen:doc:`Configure a SD Card ` - #. :external+adi-kuiper-gen:doc:`Update the SD Card ` - #. :ref:`AD9084 (Apollo) Profile Generator ` - #. :ref:`Running a new JESD mode on hardware ` - - #. Linux Applications - - #. :ref:`IIO Oscilloscope ` with: - - - :ref:`AD9084 Plugin ` - - #. :dokuwiki:`FRU EEPROM Utility ` - -#. Design with the AD9084 - - #. :ref:`ad9084 block-diagram` - - #. :adi:`AD9084 Product page ` - #. `Full Datasheet and chip design package `__ - - #. Design a custom AD9084 based platform - - #. Linux software - - .. #. `AD9084 Linux Device Driver `__ - - .. #. `AD9084 Device Driver Customization `__ - - #. :dokuwiki:`JESD204 (FSM) Interface Linux Kernel Framework ` - #. :dokuwiki:`AXI-DMAC DMA Controller Linux Driver ` - #. :dokuwiki:`JESD204B Transmit Linux Driver ` - - #. :dokuwiki:`JESD204B Status Utility ` - - #. :dokuwiki:`JESD204B Receive Linux Driver ` - - #. :dokuwiki:`JESD204B Status Utility ` - - #. :dokuwiki:`JESD204B/C AXI_ADXCVR Highspeed Transceivers Linux Driver ` - - #. :dokuwiki:`JESD204 Eye Scan ` - - #. :dokuwiki:`AXI ADC HDL Linux Driver ` - #. :dokuwiki:`AXI DAC HDL Linux Driver ` - - .. #. :dokuwiki:`HDL Reference Design ` which you must use in your FPGA. - -.. #. `Help and Support `__ - -Pre-requisites and quickstart ------------------------------ - -.. toctree:: - :caption: The prerequisites and quickstart guides are provided at: - :titlesonly: - :maxdepth: 1 - - prerequisites - quickstart/index - -.. _ad9084 block-diagram: - -Functional Block Diagram ------------------------- - -.. image:: apollo_block_diagram.png - :width: 600px - -Warning -------- - -.. esd-warning:: \ No newline at end of file diff --git a/docs/solutions/reference-designs/eval-ad9084/index.rst b/docs/solutions/reference-designs/eval-ad9084/index.rst new file mode 100644 index 000000000..6de3e5e08 --- /dev/null +++ b/docs/solutions/reference-designs/eval-ad9084/index.rst @@ -0,0 +1,169 @@ +.. _ad9084: + +AD9084-FMCA-EBZ (Apollo) +=============================================================================== + +.. image:: ../images/ad9084.png + :align: left + :width: 150 + +Overview +------------------------------------------------------------------------------- + +The :adi:`EVAL-AD9084` is an FMC radio card for the :adi:`AD9084`, +mixed signal front end (MxFE®), highly integrated device with a 16-bit, +28 GSPS maximum sample rate, RF digital-to-analog converter (DAC) core, +and 12-bit, 20 GSPS maximum sample rate, RF analog-to-digital converter +(ADC) core. The :adi:`AD9084` supports four transmit channels and four +receive channels. + +The :adi:`AD9084` is well suited for applications requiring both wideband ADCs +and DACs to process signal(s) having wide instantaneous bandwidth. The device +features a 48 lane, 32.5 Gbps JESD204C or 20 Gbps JESD204B data transceiver +port, an on-chip clock multiplier, and a digital signal processing (DSP) +capability targeted at either wideband or multiband, direct to RF applications. + +The :adi:`AD9084` also features a bypass mode that allows the full bandwidth +capability of the ADC and/or DAC cores to bypass the DSP data-paths. The device +also features low latency loopback and frequency hopping modes targeted at +phased array radar systems and electronic warfare applications. + +Features: + +- Reconfigurable mixed signal platform design +- 4 16-bit RF DACs and 4 12-bit RF ADCs (4T4R) +- Usable RF analog bandwidth to 18GHz +- Fast detect with low latency for fast AGC control +- Spectrum sniffer and monitor +- Signal monitor for slow AGC control +- Multiple loopback (ADC to DAC) +- Power amplifier downstream protection circuitry +- Maximum DAC/ADC sample rate up to 28GSPS/20GSPS +- Versatile digital features +- Maximum instantaneous bandwidth of 10GHz per channel + (2T2R) +- Programmable FIR filters at full ADC and DAC sample rates +- Configurable fine and coarse DDCs and DUCs +- Fast frequency hopping with profiles +- Dynamic configuration through SPI, HSCI, GPIO, or external + trigger (TRIG) +- Programmable fractional data rate resampler from 1× to 2× +- JESD204B and JESD204C: 20Gbps and 28.21Gbps +- On-chip temperature monitoring unit +- Package: 24mm × 26mm, 899-ball BGA with 0.8mm pitch + +Applications: + +- Radar and phase array systems +- Seeker front end +- Tactical defense radio infrastructure +- Electronic warfare and signal intelligence +- Wireless communications infrastructure +- Wireless communications test (5G mmWave, 5G C band, backhaul) + +.. image:: ../images/eval_ad9084.png + :align: center + :width: 600px + +Recommendations +------------------------------------------------------------------------------- + +People who follow the flow that is outlined, have a much better experience with +things. However, like many things, documentation is never as complete as it +should be. If you have any questions, feel free to ask on our +:ref:`EngineerZone forums `, but before that, please make +sure you read our documentation thoroughly. + +To better understand the :adi:`AD9084`, we recommend to use the +:adi:`EVAL-AD9084` evaluation board. + + +Table of Contents +------------------------------------------------------------------------------- + +#. Using the evaluation board/full stack reference design that we offer: + + #. :ref:`ad9084 user-guide` - what you need to know about the + evaluation board + #. :ref:`ad9084 prerequisites` - what you need to get started with the setup + #. :ref:`ad9084 quickstart`: + + #. Using the :ref:`Agilex 7/ SoC I-Series ` + #. Using the :ref:`VCU118/VCU128/ Virtex UltraScale+ ` + #. Using the :ref:`VCK190/VPK180/ Versal ACAP ` + +#. Use the board to better understand the :adi:`AD9084` + + #. :external+adi-kuiper-gen:doc:`Configure a SD Card ` + #. :external+adi-kuiper-gen:doc:`Update the SD Card ` + #. :ref:`AD9084 (Apollo) Profile Generator ` + #. :ref:`Running a new JESD mode on hardware ` + + #. Linux Applications + + #. :ref:`IIO Oscilloscope ` with: + + - :ref:`AD9084 Plugin ` + + #. :dokuwiki:`FRU EEPROM Utility ` + +#. Design with the AD9084 + + #. :ref:`ad9084 block-diagram` + + #. :adi:`AD9084 Product page ` + #. `Full Datasheet and chip design package `__ + + #. Design a custom AD9084 based platform + + #. Linux software + + .. #. `AD9084 Linux Device Driver `__ + + .. #. `AD9084 Device Driver Customization `__ + + #. :dokuwiki:`JESD204 (FSM) Interface Linux Kernel Framework ` + #. :dokuwiki:`AXI-DMAC DMA Controller Linux Driver ` + #. :dokuwiki:`JESD204B Transmit Linux Driver ` + + #. :dokuwiki:`JESD204B Status Utility ` + + #. :dokuwiki:`JESD204B Receive Linux Driver ` + + #. :dokuwiki:`JESD204B Status Utility ` + + #. :dokuwiki:`JESD204B/C AXI_ADXCVR Highspeed Transceivers Linux Driver ` + + #. :dokuwiki:`JESD204 Eye Scan ` + + #. :dokuwiki:`AXI ADC HDL Linux Driver ` + #. :dokuwiki:`AXI DAC HDL Linux Driver ` + + .. #. :dokuwiki:`HDL Reference Design ` which you must use in your FPGA. + +.. #. `Help and Support `__ + +Pre-requisites and quickstart +------------------------------------------------------------------------------- + +.. toctree:: + :caption: The prerequisites and quickstart guides are provided at: + :titlesonly: + :maxdepth: 1 + + user-guide + prerequisites + quickstart/index + +.. _ad9084 block-diagram: + +Functional Block Diagram +------------------------------------------------------------------------------- + +.. image:: ../images/apollo_block_diagram.png + :width: 600px + +Warning +------------------------------------------------------------------------------- + +.. esd-warning:: \ No newline at end of file diff --git a/docs/solutions/reference-designs/ad9084_ebz/prerequisites.rst b/docs/solutions/reference-designs/eval-ad9084/prerequisites.rst similarity index 84% rename from docs/solutions/reference-designs/ad9084_ebz/prerequisites.rst rename to docs/solutions/reference-designs/eval-ad9084/prerequisites.rst index 0e330992e..7203b8f4b 100644 --- a/docs/solutions/reference-designs/ad9084_ebz/prerequisites.rst +++ b/docs/solutions/reference-designs/eval-ad9084/prerequisites.rst @@ -1,16 +1,17 @@ -.. _ad9084_ebz prerequisites: +.. _ad9084 prerequisites: Prerequisites -============= +=============================================================================== + What you need, depends on what you are trying to do. As a minimum, you need to start out with: -#. The :adi:`AD9084-FMCA-EBZ`` evaluation card. +#. The :adi:`EVAL-AD9084` evaluation card. #. A carrier platform. ADI does not offer these boards for sale or loan, getting one yourself is normal part of development or evaluation of the AD9084. - - :ref:`See the supported carriers `. + - :ref:`See the supported carriers `. - The carrier may require one or more `FMC+ riser cards `__. #. Analysis | Control | Evaluation (ACE) software with the AD9084 plugin installed. @@ -30,5 +31,4 @@ start out with: #. Internet connection (without proxies makes things much easier) to update the scripts/binaries on the SD Card that came with the ADI FMC Card. (Firewalls are OK, proxies make things a pain). - #. RF Test equipment. diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/agilex.rst b/docs/solutions/reference-designs/eval-ad9084/quickstart/agilex.rst similarity index 97% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/agilex.rst rename to docs/solutions/reference-designs/eval-ad9084/quickstart/agilex.rst index a48eab1da..2800f9fbb 100644 --- a/docs/solutions/reference-designs/ad9084_ebz/quickstart/agilex.rst +++ b/docs/solutions/reference-designs/eval-ad9084/quickstart/agilex.rst @@ -1,37 +1,37 @@ -.. _ad9084_ebz quickstart agilex: +.. _ad9084 quickstart agilex: AD9084-FMCA-EBZ Intel Agilex 7 Quick Start Guide -================================================ +=============================================================================== This guide provides some quick instructions on how to setup the AD9084 eval board on: - Intel Agilex 7 :intel:`DK-SI-AGIB027FA ` Required Hardware ------------------ +------------------------------------------------------------------------------- - Intel :intel:`DK-SI-AGIB027FA ` board. - Intel :intel:`HPS IO48 OOBE Daughter Card `. -- :adi:`AD9084-FMCA-EBZ ` evaluation board. +- :adi:`EVAL-AD9084` evaluation board. - SD Card of at least 16GB imaged with Kuiper Linux (see :external+adi-kuiper-gen:doc:`Configure a SD Card `). - 1x `Vita 57 FMC+ Extender `__. - USB-C cable. - Ethernet cable. -- Power supply for the FPGA carrier board and the :adi:`AD9084-FMCA-EBZ ` evaluation board. +- Power supply for the FPGA carrier board and the :adi:`EVAL-AD9084` evaluation board. Required Software ------------------ +------------------------------------------------------------------------------- - A Linux OS on a PC. - Intel Quartus Pro 24.2. - A UART terminal (Putty/Tera Term/Minicom, etc.), Baud rate 115200 (8N1). - :ref:`IIO-Oscilloscope ` with the :ref:`AD9084 plugin `. -.. _ad9084_ebz agilex linux: +.. _ad9084 agilex linux: Build the Linux files ---------------------- +------------------------------------------------------------------------------- Create a local copy of ADI's kernel tree @@ -81,7 +81,7 @@ Configure the kernel and build it $cd .. Build the ARM Trusted Firmware -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ .. shell:: bash :no-path: @@ -92,7 +92,7 @@ Build the ARM Trusted Firmware $cd .. Build U-Boot -^^^^^^^^^^^^ +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ .. shell:: bash :no-path: @@ -111,7 +111,7 @@ Build U-Boot $cd .. Building the HDL project ------------------------- +------------------------------------------------------------------------------- Before building the hdl project setup your computer based on the following guide: :external+hdl:ref:`build_hdl` @@ -150,7 +150,7 @@ Copy the built files to the /BOOT partition: $cp hdl/projects/ad9084_ebz/fm87/ad9084_ebz.core.rbf /media/BOOT/agilex.core.rbf Programming steps ------------------ +------------------------------------------------------------------------------- - Set **S9** to JTAG - Power on the FPGA @@ -189,7 +189,7 @@ S20 ON ON ON ON clock from the HMC7044 to the transceivers Testing -------- +------------------------------------------------------------------------------- .. note:: @@ -199,7 +199,7 @@ Testing - password: analog Boot messages -^^^^^^^^^^^^^ +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ .. collapsible:: Complete boot log diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/index.rst b/docs/solutions/reference-designs/eval-ad9084/quickstart/index.rst similarity index 80% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/index.rst rename to docs/solutions/reference-designs/eval-ad9084/quickstart/index.rst index e314812b5..425db4ff3 100644 --- a/docs/solutions/reference-designs/ad9084_ebz/quickstart/index.rst +++ b/docs/solutions/reference-designs/eval-ad9084/quickstart/index.rst @@ -1,12 +1,12 @@ -.. _ad9084_ebz quickstart: +.. _ad9084 quickstart: Quickstart -========== +=============================================================================== The Quick Start Guides provide a simple step by step instruction on how to do an -initial system setup for the :adi:`AD9084-FMCA-EBZ ` evaluation board -on various FPGA development boards. They will discuss how to program the bitstream, -run a no-OS program or boot a Linux distribution. +initial system setup for the :adi:`EVAL-AD9084` evaluation +board on various FPGA development boards. They will discuss how to program the +bitstream, run a no-OS program or boot a Linux distribution. .. toctree:: :maxdepth: 2 @@ -16,12 +16,12 @@ run a no-OS program or boot a Linux distribution. Intel Agilex 7 I-Series new_usecase -.. _ad9084_ebz carriers: +.. _ad9084 carriers: Supported carriers ------------------- +------------------------------------------------------------------------------- -The :adi:`AD9084-FMCA-EBZ` is, by definition a "FPGA mezzanine card" (FMC), +The :adi:`EVAL-AD9084` is, by definition a "FPGA mezzanine card" (FMC), that means it needs a carrier to plug into. The carriers we support are: @@ -95,7 +95,7 @@ The carriers we support are: - 1 Supported Environments ----------------------- +------------------------------------------------------------------------------- The supported environments are: diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/microblaze.rst b/docs/solutions/reference-designs/eval-ad9084/quickstart/microblaze.rst similarity index 98% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/microblaze.rst rename to docs/solutions/reference-designs/eval-ad9084/quickstart/microblaze.rst index b7bb38518..44666478d 100644 --- a/docs/solutions/reference-designs/ad9084_ebz/quickstart/microblaze.rst +++ b/docs/solutions/reference-designs/eval-ad9084/quickstart/microblaze.rst @@ -1,25 +1,25 @@ -.. _ad9084_ebz quickstart microblaze: +.. _ad9084 quickstart microblaze: AD9084-FMCA-EBZ Virtex UltraScale+ VCU118/VCU128 Quick Start Guide -================================================================== +=============================================================================== This guide provides some quick instructions on how to setup the AD9084 eval board on: -- :xilinx:`VCU118` -- :xilinx:`VCU128` +- :xilinx:`VCU118` on FMC+ +- :xilinx:`VCU128` on FMC+ Required Hardware ------------------ +------------------------------------------------------------------------------- - AMD Xilinx :xilinx:`VCU118` or :xilinx:`VCU128` board -- :adi:`AD9084-FMCA-EBZ ` evaluation board +- :adi:`EVAL-AD9084` evaluation board - 2x `Vita 57 FMC+ Extender `__ - 2 x Micro-USB cable - Ethernet cables -- Power supply for the FPGA carrier board and the :adi:`AD9084-FMCA-EBZ ` evaluation board +- Power supply for the FPGA carrier board and the :adi:`EVAL-AD9084` evaluation board Required Software ------------------ +------------------------------------------------------------------------------- - A Linux OS on a PC - Xilinx Vivado 2025.1 @@ -28,7 +28,7 @@ Required Software - :ref:`IIO-Oscilloscope ` with the :ref:`AD9084 plugin ` Building the HDL project ------------------------- +------------------------------------------------------------------------------- Before building the hdl project setup your computer based on the following guide: :external+hdl:ref:`build_hdl` @@ -44,7 +44,7 @@ guide: :external+hdl:ref:`build_hdl` .. _ad9084_ebz microblaze linux: Build the Linux files ------------------------ +------------------------------------------------------------------------------- Microblaze gnu toolchain from Xilinx is no longer available on gcc. Please use gnu tools from Vitis installation as below: @@ -180,7 +180,7 @@ Building the kernel with the default device tree The STRIP image found under arch/microblaze/boot/ is the ELF image which can be loaded via the debugger Testing -------- +------------------------------------------------------------------------------- First we need to prepare a working directory where we will gather all the required binary files. diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/new_usecase.rst b/docs/solutions/reference-designs/eval-ad9084/quickstart/new_usecase.rst similarity index 82% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/new_usecase.rst rename to docs/solutions/reference-designs/eval-ad9084/quickstart/new_usecase.rst index 8e70b22e8..5edd80b02 100644 --- a/docs/solutions/reference-designs/ad9084_ebz/quickstart/new_usecase.rst +++ b/docs/solutions/reference-designs/eval-ad9084/quickstart/new_usecase.rst @@ -1,17 +1,13 @@ -.. _ad9084_ebz quickstart new_usecase: +.. _ad9084 quickstart new_usecase: Running a new JESD mode on hardware -=================================== +=============================================================================== In order to change the JESD mode or sampling rate of the AD9084-FMCA-EBZ, you will need to follow the steps below: #. Generate a new profile using the :ref:`AD9084 (Apollo) Profile Generator ` - #. Build the HDL design for your carrier using the same JESD204 parameters as the ones in the profile: - #. Build the Linux image making sure to include the newly generated AD9084 profile - #. Update the clocks and the profile name in the device tree - #. Build the device tree diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/versal.rst b/docs/solutions/reference-designs/eval-ad9084/quickstart/versal.rst similarity index 95% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/versal.rst rename to docs/solutions/reference-designs/eval-ad9084/quickstart/versal.rst index 2e206d3d1..1ed6ca8fd 100644 --- a/docs/solutions/reference-designs/ad9084_ebz/quickstart/versal.rst +++ b/docs/solutions/reference-designs/eval-ad9084/quickstart/versal.rst @@ -1,27 +1,28 @@ -.. _ad9084_ebz quickstart versal: +.. _ad9084 quickstart versal: AD9084-FMCA-EBZ Versal ACAP VCK190/VPK180 Quick Start Guide =========================================================== -This guide provides some quick instructions on how to setup the AD9084 eval board on: +This guide provides some quick instructions on how to setup the +:adi:`EVAL-AD9084` board on: -- :xilinx:`VCK190` -- :xilinx:`VPK180` +- :xilinx:`VCK190` on FMC2 +- :xilinx:`VPK180` on FMC+ Required Hardware ------------------ +------------------------------------------------------------------------------- - AMD Xilinx :xilinx:`VCK190` or :xilinx:`VPK180` board -- :adi:`AD9084-FMCA-EBZ ` evaluation board +- :adi:`EVAL-AD9084` evaluation board - SD Card of at least 16GB imaged with Kuiper Linux (see :external+adi-kuiper-gen:doc:`Configure a SD Card `) - 2x `Vita 57 FMC+ Extender `__ (:xilinx:`VCK190` only) - USB Type-C cable - Ethernet cables -- Power supply for the FPGA carrier board and the :adi:`AD9084-FMCA-EBZ ` evaluation board +- Power supply for the FPGA carrier board and the :adi:`EVAL-AD9084` evaluation board Required Software ------------------ +------------------------------------------------------------------------------- - A Linux OS on a PC - Xilinx Vivado 2025.1 @@ -29,7 +30,7 @@ Required Software - :ref:`IIO-Oscilloscope ` with the :ref:`AD9084 plugin ` Building the HDL project ------------------------- +------------------------------------------------------------------------------- Before building the hdl project setup your computer based on the following guide: :external+hdl:ref:`build_hdl` @@ -43,17 +44,17 @@ following guide: :external+hdl:ref:`build_hdl` Building ad9084_ebz_vck190 [/home/analog/hdl/projects/ad9084_ebz/vck190/ad9084_ebz_vck190_vivado.log] ... OK Building the boot image BOOT.BIN -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Instructions on how to build the boot image BOOT.BIN image for Versal boards can be found here: - :external+hdl:ref:`Building an HDL Project ` - :external+hdl:ref:`Build the boot image BOOT.BIN ` -.. _ad9084_ebz versal linux: +.. _ad9084 versal linux: Building the Linux files ------------------------- +------------------------------------------------------------------------------- On the development host @@ -137,7 +138,7 @@ Copy the generated files to your SD Card. Testing -------- +------------------------------------------------------------------------------- The following steps are intended for :xilinx:`VCK190` but they mostly apply to :xilinx:`VPK180` as well. @@ -145,39 +146,46 @@ The following steps are intended for :xilinx:`VCK190` but they mostly apply to .. image:: versal/vck190.jpg Physical setup -^^^^^^^^^^^^^^ +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -#. Place the pre-built bootfiles (BOOT.BIN, Image, system.dtb, boot.scr) in the root of the SD card's BOOT partition. +#. Place the pre-built bootfiles (BOOT.BIN, Image, system.dtb, boot.scr) in the + root of the SD card's BOOT partition. #. Insert the SD card into the FPGA carrier board (J302). #. Connect USB UART J207 (Type-C USB) to your host PC. #. (:xilinx:`VCK190` only) Insert System Controller SD card into socket J206. -#. Configure ACAP for SD BOOT (mode SW1[4:1] switch in the position **OFF,OFF,OFF,ON** as seen in the below picture). +#. Configure ACAP for SD BOOT (mode SW1[4:1] switch in the position + **OFF,OFF,OFF,ON** as seen in the below picture). .. image:: versal/vck190_sw1.jpg -#. Configure System Controller for SD BOOT (mode SW11[4:1] switch in the position **OFF,OFF,OFF,ON** as seen in the below picture). +#. Configure System Controller for SD BOOT (mode SW11[4:1] switch in the + position **OFF,OFF,OFF,ON** as seen in the below picture). .. image:: versal/vck190_sw11.jpg -#. Connect :adi:`AD9084-FMCA-EBZ ` to FMCP2 (J53) with FMC+ riser or equivalent. -#. Connect the power supplies to the FPGA carrier board and the AD9084-FMCA-EBZ evaluation board. +#. Connect :adi:`EVAL-AD9084` to FMCP2 (J53) with FMC+ riser or equivalent. +#. Connect the power supplies to the FPGA carrier board and the + :adi:`EVAL-AD9084`` evaluation board. .. image:: versal/vck190_ad9084_ebz.jpg #. Verify VADJ is set to 1.5 V -Verify 1.5 V VADJ -^^^^^^^^^^^^^^^^^ +Set VADJ to 1.5 V +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -#. Connect an Ethernet cable to J307 and also to SYSCTL Ethernet port to access Board Evaluation & Management Tool (BEAM). +#. Connect an Ethernet cable to J307 and also to SYSCTL Ethernet port to access + Board Evaluation & Management Tool (BEAM). #. Turn on the power switch on the FPGA board. -#. Observe kernel and serial console messages on your terminal, both the ACAP UART interface and the System controller. +#. Observe kernel and serial console messages on your terminal, both the ACAP + UART interface and the System controller. (use the first ttyUSB or COM port registered for the ACAP UART interface, and try the other 2 to find the one for System Controller) #. On the System Controller console, a BEAM Tool Web Address should be assigned. Go to this web address to set VADJ_FMC to 1.5V. #. To change VADJ_FMC On BEAM, click "Test The Board">"Board Settings">"FMC". - Then on "Set VADJ_FMC", select 1.5V and click "Set", AD9084 LEDs should turn on immediately. + Then on "Set VADJ_FMC", select 1.5V and click "Set", AD9084 LEDs should turn + on immediately. .. image:: versal/beam-home.jpg @@ -202,12 +210,13 @@ Verify 1.5 V VADJ $ --connect-timeout 1 ; \ $ do sleep 1 ; done -#. On the ACAP UART interface console, reboot the system. After reboot, ad9084 devices should be present. +#. On the ACAP UART interface console, reboot the system. After reboot, ad9084 + devices should be present. .. esd-warning:: ACAP SDcard boot files -^^^^^^^^^^^^^^^^^^^^^^ +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ The files that need to be present on the sdcard BOOT partition are: @@ -217,7 +226,7 @@ The files that need to be present on the sdcard BOOT partition are: - boot.scr Startup -^^^^^^^ +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Once the physical setup is complete, it is recommended to start a UART session to the FPGA carrier board to monitor the boot process. @@ -227,7 +236,8 @@ evaluation board will be initialized. .. important:: - When setting up the UART make sure you connect to the ACAP UART interface and not the System controller. + When setting up the UART make sure you connect to the ACAP UART interface + and not the System controller. .. note:: @@ -237,7 +247,7 @@ evaluation board will be initialized. - password: analog Boot messages -^^^^^^^^^^^^^ +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ .. collapsible:: Complete boot log diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/beam-board-settings.jpg b/docs/solutions/reference-designs/eval-ad9084/quickstart/versal/beam-board-settings.jpg similarity index 100% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/beam-board-settings.jpg rename to docs/solutions/reference-designs/eval-ad9084/quickstart/versal/beam-board-settings.jpg diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/beam-home.jpg b/docs/solutions/reference-designs/eval-ad9084/quickstart/versal/beam-home.jpg similarity index 100% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/beam-home.jpg rename to docs/solutions/reference-designs/eval-ad9084/quickstart/versal/beam-home.jpg diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/beam-set-vadj.jpg b/docs/solutions/reference-designs/eval-ad9084/quickstart/versal/beam-set-vadj.jpg similarity index 100% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/beam-set-vadj.jpg rename to docs/solutions/reference-designs/eval-ad9084/quickstart/versal/beam-set-vadj.jpg diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/vck190.jpg b/docs/solutions/reference-designs/eval-ad9084/quickstart/versal/vck190.jpg similarity index 100% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/vck190.jpg rename to docs/solutions/reference-designs/eval-ad9084/quickstart/versal/vck190.jpg diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/vck190_ad9084_ebz.jpg b/docs/solutions/reference-designs/eval-ad9084/quickstart/versal/vck190_ad9084_ebz.jpg similarity index 100% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/vck190_ad9084_ebz.jpg rename to docs/solutions/reference-designs/eval-ad9084/quickstart/versal/vck190_ad9084_ebz.jpg diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/vck190_sw1.jpg b/docs/solutions/reference-designs/eval-ad9084/quickstart/versal/vck190_sw1.jpg similarity index 100% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/vck190_sw1.jpg rename to docs/solutions/reference-designs/eval-ad9084/quickstart/versal/vck190_sw1.jpg diff --git a/docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/vck190_sw11.jpg b/docs/solutions/reference-designs/eval-ad9084/quickstart/versal/vck190_sw11.jpg similarity index 100% rename from docs/solutions/reference-designs/ad9084_ebz/quickstart/versal/vck190_sw11.jpg rename to docs/solutions/reference-designs/eval-ad9084/quickstart/versal/vck190_sw11.jpg diff --git a/docs/solutions/reference-designs/eval-ad9084/user-guide.rst b/docs/solutions/reference-designs/eval-ad9084/user-guide.rst new file mode 100644 index 000000000..c7c4ba58e --- /dev/null +++ b/docs/solutions/reference-designs/eval-ad9084/user-guide.rst @@ -0,0 +1,52 @@ +.. _ad9084 user-guide: + +User guide +=============================================================================== + +:adi:`EVAL-AD9084` top view: + +.. image:: ../images/eval_ad9084_top_view.png + :align: center + :width: 500 + +The complete user guides of the evaluation board can be found at: + +- :adi:`AD9084/AD9088 Software Development User Guide, UG-2300 (Rev. Prl) ` +- :adi:`EVAL-AD9084 User Guide, UG-2326 (Rev. 0) ` + +Hardware guide +------------------------------------------------------------------------------- + +Hardware configuration +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +TBD + +Power supply +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The power supply comes from the FMC connector, given by the FPGA. + +The VADJ values can be checked out in the README.md file of each combination +with an FPGA, at: :git-hdl:`projects/ad9084_fmca_ebz`. + +Schematic, PCB Layout, Bill of Materials +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The schematic can be found at +:adi:`ad9081-mxfe-fmca-revc-eval-board-schematic.pdf `. + +The archive +:adi:`ad9081-ad9082.zip ` +contains the design files for :adi:`EVAL-AD9081` and :adi:`EVAL-AD9082` +evaluation boards. + +Software guide +------------------------------------------------------------------------------- + +The evaluation board is supported with the Libiio library. This library is +cross-platform (Windows, Linux, Mac) with language bindings for C, C#, Python, +MATLAB, and others. Two easy examples that can be used with it are: + +- :dokuwiki:`IIO Oscilloscope ` +- :external+pyadi-iio:doc:`index` diff --git a/docs/solutions/reference-designs/images/ad9084.png b/docs/solutions/reference-designs/images/ad9084.png new file mode 100644 index 000000000..ff3a63bc9 --- /dev/null +++ b/docs/solutions/reference-designs/images/ad9084.png @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:220385a99ed12a088b00f1aee2322eb3bb7855dcf422923a8c4ecd2feea0b1bb +size 895054 diff --git a/docs/solutions/reference-designs/ad9084_ebz/apollo_block_diagram.png b/docs/solutions/reference-designs/images/apollo_block_diagram.png similarity index 100% rename from docs/solutions/reference-designs/ad9084_ebz/apollo_block_diagram.png rename to docs/solutions/reference-designs/images/apollo_block_diagram.png diff --git a/docs/solutions/reference-designs/images/eval_ad9084.png b/docs/solutions/reference-designs/images/eval_ad9084.png new file mode 100644 index 000000000..404ab1a3f --- /dev/null +++ b/docs/solutions/reference-designs/images/eval_ad9084.png @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:54a83ed5c3086473bcbed582ef337a4616784d6daea60f7c77890b8e9b5fd2af +size 851628 diff --git a/docs/solutions/reference-designs/images/eval_ad9084_top_view.png b/docs/solutions/reference-designs/images/eval_ad9084_top_view.png new file mode 100644 index 000000000..6dc0d74fb --- /dev/null +++ b/docs/solutions/reference-designs/images/eval_ad9084_top_view.png @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:7cf61d939c19f119748a20b0623e6f377cb13be0f22a77d5a2f6608e0b1fbdd7 +size 618728