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dts: arm: st: h7: add ITCM and DTCM memory regions for STM32H7
Add ITCM and DTCM memory region definitions to the common STM32H7 devicetree. ITCM: 64 KB @ 0x00000000 DTCM: 128 KB @ 0x20000000 Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
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+12
-56
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7 files changed

+12
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dts/arm/st/h7/stm32h7.dtsi

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};
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};
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itcm: memory@0 {
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compatible = "zephyr,memory-region", "arm,itcm";
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reg = <0x00000000 DT_SIZE_K(64)>;
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zephyr,memory-region = "ITCM";
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};
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dtcm: memory@20000000 {
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compatible = "zephyr,memory-region", "arm,dtcm";
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reg = <0x20000000 DT_SIZE_K(128)>;
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zephyr,memory-region = "DTCM";
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};
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ext_memory: memory@90000000 {
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compatible = "zephyr,memory-region";
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reg = <0x90000000 DT_SIZE_M(256)>; /* max addressable area */

dts/arm/st/h7/stm32h723.dtsi

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zephyr,memory-region = "SRAM4";
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};
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/* Data TCM RAM */
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dtcm: memory@20000000 {
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compatible = "zephyr,memory-region", "arm,dtcm";
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reg = <0x20000000 DT_SIZE_K(128)>;
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zephyr,memory-region = "DTCM";
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};
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/* Instruction TCM RAM (64KB as `TCM_AXI_SHARED` is `000`) */
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itcm: memory@0 {
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compatible = "zephyr,memory-region", "arm,itcm";
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reg = <0x00000000 DT_SIZE_K(64)>;
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zephyr,memory-region = "ITCM";
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};
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otghs_fs_phy: otghs_fs_phy {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;

dts/arm/st/h7/stm32h742.dtsi

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zephyr,memory-region = "SRAM4";
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};
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dtcm: memory@20000000 {
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compatible = "zephyr,memory-region", "arm,dtcm";
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reg = <0x20000000 DT_SIZE_K(128)>;
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zephyr,memory-region = "DTCM";
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};
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itcm: memory@0 {
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compatible = "zephyr,memory-region", "arm,itcm";
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reg = <0x00000000 DT_SIZE_K(64)>;
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zephyr,memory-region = "ITCM";
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};
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otghs_fs_phy: otghs_fs_phy {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;

dts/arm/st/h7/stm32h745Xi_m7.dtsi

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/delete-node/ cpu@1;
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};
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dtcm: memory@20000000 {
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compatible = "zephyr,memory-region", "arm,dtcm";
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reg = <0x20000000 DT_SIZE_K(128)>;
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zephyr,memory-region = "DTCM";
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};
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soc {
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flash-controller@52002000 {
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flash0: flash@8000000 {

dts/arm/st/h7/stm32h755Xi_m7.dtsi

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/delete-node/ cpu@1;
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};
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dtcm: memory@20000000 {
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compatible = "zephyr,memory-region", "arm,dtcm";
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reg = <0x20000000 DT_SIZE_K(128)>;
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zephyr,memory-region = "DTCM";
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};
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soc {
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flash-controller@52002000 {
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flash0: flash@8000000 {

dts/arm/st/h7/stm32h757Xi_m7.dtsi

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/delete-node/ cpu@1;
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};
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dtcm: memory@20000000 {
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compatible = "zephyr,memory-region", "arm,dtcm";
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reg = <0x20000000 DT_SIZE_K(128)>;
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zephyr,memory-region = "DTCM";
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};
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soc {
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flash-controller@52002000 {
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flash0: flash@8000000 {

dts/arm/st/h7/stm32h7a3.dtsi

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zephyr,memory-region = "SRAM5";
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};
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dtcm: memory@20000000 {
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compatible = "zephyr,memory-region", "arm,dtcm";
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reg = <0x20000000 DT_SIZE_K(128)>;
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zephyr,memory-region = "DTCM";
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};
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itcm: memory@0 {
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compatible = "zephyr,memory-region", "arm,itcm";
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reg = <0x00000000 DT_SIZE_K(64)>;
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zephyr,memory-region = "ITCM";
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};
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ext_memory2: memory@70000000 {
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compatible = "zephyr,memory-region";
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reg = <0x70000000 DT_SIZE_M(256)>; /* max addressable area */

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