Fallback to internal clock if problem with external clock present. The MCU clock in this case is 48MHz instead of 72MHz

Author: bbogush

firmware/Makefile

@@ -52,7 +52,7 @@ USB_SRCS=hw_config.c stm32_it.c usb_prop.c usb_desc.c usb_istr.c usb_pwr.c \
 
 
 SRCS=main.c system_stm32f10x.c syscalls.c fsmc_nand.c led.c uart.c jtag.c \
-  cdc.c nand_programmer.c nand_bad_block.c $(USB_SRCS)
+  clock.c cdc.c nand_programmer.c nand_bad_block.c $(USB_SRCS)
 
 OBJS=$(addprefix $(OBJ_DIR),$(SRCS:.c=.o)) \
   $(addprefix $(OBJ_DIR),$(STARTUP:.s=.o))

firmware/clock.c

@@ -0,0 +1,12 @@
+/*  Copyright (C) 2017 Bogdan Bogush <bogdan.s.bogush@gmail.com>
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 3.
+ */
+
+#include "clock.h"
+#include <stm32f10x.h>
+
+bool is_external_clock_avail()
+{
+    return (RCC->CR & RCC_CR_HSERDY) != RESET;
+}

firmware/clock.h

@@ -0,0 +1,13 @@
+/*  Copyright (C) 2017 Bogdan Bogush <bogdan.s.bogush@gmail.com>
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 3.
+ */
+ 
+#ifndef _CLOCK_H_
+#define _CLOCK_H_
+
+#include <stdbool.h>
+
+bool is_external_clock_avail();
+
+#endif

firmware/libs/spl/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c

@@ -1076,6 +1076,58 @@ static void SetSysClockTo72(void)
   else
   { /* If HSE fails to start-up, the application will have wrong clock 
          configuration. User can add here some code to deal with this error */
+
+    /* Fallback to internal HSI clock 8MHz. USB requires 72MHz or 48MHz due to
+     * devider 1 or 1.5. Maximum frequency that can be configured for PLL with
+     * HSI source is 64MHz so select 48MHz */
+
+    /* Disable HSE */
+    RCC->CR &= ~RCC_CR_HSEON;
+    /* Disable PLL */
+    RCC->CR &= ~RCC_CR_PLLON;
+
+    /* At this stage the HSI is already enabled */
+    
+    /* Enable Prefetch Buffer */
+    FLASH->ACR |= FLASH_ACR_PRFTBE;
+
+    /* Flash 2 wait state */
+    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
+
+    /* HCLK = SYSCLK */
+    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
+      
+    /* PCLK2 = HCLK */
+    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
+    
+    /* PCLK1 = HCLK */
+    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
+
+    /*  PLL configuration: PLLCLK = HSI/2 * 12 = 48 MHz */
+    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |
+                                        RCC_CFGR_PLLMULL));
+    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2 | RCC_CFGR_PLLMULL12);
+            
+    /* Enable PLL */
+    RCC->CR |= RCC_CR_PLLON;
+
+    /* Wait till PLL is ready */
+    while((RCC->CR & RCC_CR_PLLRDY) == 0)
+    {
+    }
+
+    /* Select PLL as system clock source */
+    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
+    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
+
+    /* Wait till PLL is used as system clock source */
+    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
+    {
+    }
+
+    /* Update frequency */
+    SystemCoreClockUpdate();
   }
 }
 #endif

firmware/main.c

@@ -10,6 +10,7 @@
 #include "uart.h"
 #include "jtag.h"
 #include "version.h"
+#include "clock.h"
 #include <stdio.h>
 
 int main()
@@ -18,6 +19,9 @@ int main()
     printf("\r\nNAND programmer ver: %d.%d.%d\r\n", SW_VERSION_MAJOR,
         SW_VERSION_MINOR, SW_VERSION_BUILD);
 
+    if (!is_external_clock_avail())
+        printf("External clock not detected. Fallback to internal clock.\r\n");
+
     printf("JTAG init...");
     jtag_init();
     printf("done.\r\n");

firmware/usb_cdc/hw_config.c

@@ -155,6 +155,7 @@ void Set_System(void)
 * Input          : None.
 * Return         : None.
 *******************************************************************************/
+#define CLK_48MHZ 48000000
 void Set_USBClock(void)
 {
 #if defined(STM32L1XX_MD) || defined(STM32L1XX_HD) || defined(STM32L1XX_MD_PLUS) 
@@ -163,8 +164,11 @@ void Set_USBClock(void)
 
 #else 
   /* Select USBCLK source */
-  RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_1Div5);
-  
+  if (SystemCoreClock == CLK_48MHZ)
+    RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1);
+  else
+    RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_1Div5);
+
   /* Enable the USB clock */
   RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE);
 #endif /* STM32L1XX_MD */