Update read/written registers for x86 conditional jump instructions (#2798)

* All JMPcc read and write instruction pointer

* JMPcc, 16-bit decode

* JMPcc, 32-bit decode

* JMPcc, 64-bit decode

Author: hainest

arch/X86/X86Mapping.c

@@ -1243,6 +1243,31 @@ void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
 					->groups[insn->detail->groups_count] =
 					X86_GRP_JUMP;
 				insn->detail->groups_count++;
+
+				switch (h->mode) {
+				default:
+					break;
+				case CS_MODE_16:
+					arr_replace(
+						insn->detail->regs_read,
+						insn->detail->regs_read_count,
+						X86_REG_EIP, X86_REG_IP);
+					arr_replace(
+						insn->detail->regs_write,
+						insn->detail->regs_write_count,
+						X86_REG_EIP, X86_REG_IP);
+					break;
+				case CS_MODE_64:
+					arr_replace(
+						insn->detail->regs_read,
+						insn->detail->regs_read_count,
+						X86_REG_EIP, X86_REG_RIP);
+					arr_replace(
+						insn->detail->regs_write,
+						insn->detail->regs_write_count,
+						X86_REG_EIP, X86_REG_RIP);
+					break;
+				}
 			}
 
 			switch (insns[i].id) {