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Commit 357952f

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reset_vcpu_simple test fix
Signed-off-by: Simon Davies <simongdavies@users.noreply.github.com>
1 parent 446c69f commit 357952f

1 file changed

Lines changed: 37 additions & 2 deletions

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  • src/hyperlight_host/src/hypervisor/hyperlight_vm

src/hyperlight_host/src/hypervisor/hyperlight_vm/x86_64.rs

Lines changed: 37 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1703,9 +1703,44 @@ mod tests {
17031703
if reset_xsave.len() >= 576 {
17041704
expected_xsave[512..576].copy_from_slice(&reset_xsave[512..576]);
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}
1706+
1707+
// Compute the end of valid XSAVE component data. In compacted format (MSHV/WHP),
1708+
// components are packed contiguously starting at offset 576. Bytes beyond the last
1709+
// component are undefined
1710+
let xcomp_bv = u64::from_le_bytes(
1711+
reset_xsave[520..528].try_into().unwrap_or([0u8; 8]),
1712+
);
1713+
let compacted = (xcomp_bv & (1u64 << 63)) != 0;
1714+
let valid_end = if compacted {
1715+
// Compacted format: compute end from CPUID component sizes
1716+
let supported = xsave_supported_components();
1717+
let mut offset = 576usize;
1718+
for comp_id in 2..63u32 {
1719+
if (supported & (1u64 << comp_id)) == 0 {
1720+
continue;
1721+
}
1722+
if (xcomp_bv & (1u64 << comp_id)) == 0 {
1723+
continue;
1724+
}
1725+
let (size, _, align_64) = xsave_component_info(comp_id);
1726+
if align_64 {
1727+
offset = offset.next_multiple_of(64);
1728+
}
1729+
offset += size;
1730+
}
1731+
offset
1732+
} else {
1733+
// Standard format (KVM): full buffer is valid
1734+
reset_xsave.len()
1735+
};
1736+
1737+
// Only compare bytes within the valid region
17061738
assert_eq!(
1707-
reset_xsave, expected_xsave,
1708-
"xsave should be zeroed except for hypervisor-specific fields"
1739+
&reset_xsave[..valid_end],
1740+
&expected_xsave[..valid_end],
1741+
"xsave should be zeroed except for hypervisor-specific fields \
1742+
(comparing bytes 0..{valid_end} of {} total)",
1743+
reset_xsave.len()
17091744
);
17101745

17111746
// Verify sregs are reset to defaults (CR3 is 0 as passed to reset_vcpu)

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