diff --git a/.github/workflows/demos_test.yml b/.github/workflows/demos_test.yml deleted file mode 100644 index 1851fce..0000000 --- a/.github/workflows/demos_test.yml +++ /dev/null @@ -1,77 +0,0 @@ -name: โœ… Test Build Demos - -on: - workflow_dispatch: - pull_request: - paths: - - "demos/**" - push: - paths: - - "demos/**" - branches: - - main - -concurrency: - group: ${{ github.workflow }}-${{ github.ref }} - cancel-in-progress: true - -jobs: - demo_check_lpc4074: - uses: libhal/ci/.github/workflows/app_builder2.yml@5.x.y - with: - compiler_profile: hal/tc/gcc - platform_profile: hal/mcu/lpc4074 - conan_version: 2.23.0 - dir: demos - library_dir: . - secrets: inherit - - demo_check_lpc4078: - uses: libhal/ci/.github/workflows/app_builder2.yml@5.x.y - with: - compiler_profile: hal/tc/gcc - platform_profile: hal/mcu/lpc4078 - conan_version: 2.23.0 - dir: demos - library_dir: . - secrets: inherit - - demo_check_stm32f103c8: - uses: libhal/ci/.github/workflows/app_builder2.yml@5.x.y - with: - compiler_profile: hal/tc/gcc - platform_profile: hal/mcu/stm32f103c8 - conan_version: 2.23.0 - dir: demos - library_dir: . - secrets: inherit - - demo_check_lpc4078_llvm: - uses: libhal/ci/.github/workflows/app_builder2.yml@5.x.y - with: - compiler_profile: hal/tc/llvm - platform_profile: hal/mcu/lpc4078 - conan_version: 2.23.0 - dir: demos - library_dir: . - secrets: inherit - - demo_check_stm32f103c8_llvm: - uses: libhal/ci/.github/workflows/app_builder2.yml@5.x.y - with: - compiler_profile: hal/tc/llvm - platform_profile: hal/mcu/stm32f103c8 - conan_version: 2.23.0 - dir: demos - library_dir: . - secrets: inherit - - demo_check_stm32f411re: - uses: libhal/ci/.github/workflows/app_builder2.yml@5.x.y - with: - compiler_profile: hal/tc/gcc - platform_profile: hal/mcu/stm32f411re - conan_version: 2.23.0 - dir: demos - library_dir: . - secrets: inherit diff --git a/.github/workflows/deploy_with_cache.yml b/.github/workflows/deploy_with_cache.yml index df2a273..2b43d2e 100644 --- a/.github/workflows/deploy_with_cache.yml +++ b/.github/workflows/deploy_with_cache.yml @@ -60,8 +60,12 @@ jobs: conan config install https://github.com/libhal/conan-config2.git conan hal setup - - name: ๐Ÿ”จ Build for cortex-m3 to cache compiler - run: conan create . -s:h build_type=Release -s:h os=baremetal -s:h arch=cortex-m3 --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing + - name: ๐Ÿ”จ Build for cortex-m33f to cache compiler + run: | + conan create . -s:h build_type=Debug -s:h os=baremetal -s:h arch=cortex-m33f \ + --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing \ + -o:h *:flash_clkdiv=2 -o:h *:rp_revision=a2 -o:h *:flash_size="(16 * 1024 * 1024)" -o:h *:use_w25q_flash=True \ + -o:h *:platform=rp2350-arm-s -o:h *:variant=rp2350b - name: ๐Ÿ“ฆ Create tarball of conan packages run: tar -czf conan-packages.tar.gz -C ~/.conan2 p @@ -74,7 +78,7 @@ jobs: retention-days: 1 # Build jobs for each architecture - build_cortex_m3: + build_cortex_m33f: needs: setup_compiler_cache runs-on: ubuntu-24.04 env: @@ -109,124 +113,26 @@ jobs: - name: ๐Ÿ“ฆ Extract conan packages tarball run: tar -xzf conan-packages.tar.gz -C ~/.conan2 - - name: ๐Ÿ“ฆ Create `Debug` package for cortex-m3 - run: conan create . -s:h build_type=Debug -s:h os=baremetal -s:h arch=cortex-m3 --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing - - - name: ๐Ÿ“ฆ Create `MinSizeRel` package for cortex-m3 - run: conan create . -s:h build_type=MinSizeRel -s:h os=baremetal -s:h arch=cortex-m3 --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing - - - name: ๐Ÿ“ฆ Create `Release` package for cortex-m3 - run: conan create . -s:h build_type=Release -s:h os=baremetal -s:h arch=cortex-m3 --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing - - - name: ๐Ÿ“ก Sign into JFrog Artifactory - if: ${{ inputs.version != 'latest' }} - env: - PASSWORD: ${{ secrets.JFROG_LIBHAL_TRUNK_ID_TOKEN }} - JFROG_USER: ${{ secrets.JFROG_LIBHAL_TRUNK_ID_TOKEN_USER }} - run: conan remote login -p $PASSWORD libhal $JFROG_USER - - - name: ๐Ÿ†™ Upload package version ${{ inputs.version }} to conan repo - if: ${{ inputs.version != 'latest' }} - run: conan upload "libhal-arm-mcu/${{ inputs.version }}" --confirm -r=libhal - - build_cortex_m4: - needs: setup_compiler_cache - runs-on: ubuntu-24.04 - env: - VERBOSE: 1 - steps: - - uses: actions/checkout@v4.1.1 - if: ${{ inputs.version != 'latest' }} - with: - submodules: true - repository: ${{ inputs.repo }} - ref: ${{ inputs.version }} - - - uses: actions/checkout@v4.1.1 - if: ${{ inputs.version == 'latest' }} - with: - submodules: true - repository: ${{ inputs.repo }} - - - name: ๐Ÿ” setup libhal + - name: ๐Ÿ“ฆ Create `Debug` package for cortex-m33f run: | - pipx install conan>=${{ inputs.conan_version }} - conan --version - conan config install https://github.com/libhal/conan-config2.git - conan hal setup - - - name: ๐Ÿ“ฅ Download conan package cache - uses: actions/download-artifact@v4 - with: - name: conan-packages-${{ inputs.upload_suffix }} - path: . - - - name: ๐Ÿ“ฆ Extract conan packages tarball - run: tar -xzf conan-packages.tar.gz -C ~/.conan2 - - - name: ๐Ÿ“ฆ Create `Debug` package for cortex-m4 - run: conan create . -s:h build_type=Debug -s:h os=baremetal -s:h arch=cortex-m4 --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing + conan create . -s:h build_type=Debug -s:h os=baremetal -s:h arch=cortex-m33f \ + --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing \ + -o:h *:flash_clkdiv=2 -o:h *:rp_revision=a2 -o:h *:flash_size="(16 * 1024 * 1024)" -o:h *:use_w25q_flash=True \ + -o:h *:platform=rp2350-arm-s -o:h *:variant=rp2350b - - name: ๐Ÿ“ฆ Create `MinSizeRel` package for cortex-m4 - run: conan create . -s:h build_type=MinSizeRel -s:h os=baremetal -s:h arch=cortex-m4 --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing - - - name: ๐Ÿ“ฆ Create `Release` package for cortex-m4 - run: conan create . -s:h build_type=Release -s:h os=baremetal -s:h arch=cortex-m4 --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing - - - name: ๐Ÿ“ก Sign into JFrog Artifactory - if: ${{ inputs.version != 'latest' }} - env: - PASSWORD: ${{ secrets.JFROG_LIBHAL_TRUNK_ID_TOKEN }} - JFROG_USER: ${{ secrets.JFROG_LIBHAL_TRUNK_ID_TOKEN_USER }} - run: conan remote login -p $PASSWORD libhal $JFROG_USER - - - name: ๐Ÿ†™ Upload package version ${{ inputs.version }} to conan repo - if: ${{ inputs.version != 'latest' }} - run: conan upload "libhal-arm-mcu/${{ inputs.version }}" --confirm -r=libhal - - build_cortex_m4f: - needs: setup_compiler_cache - runs-on: ubuntu-24.04 - env: - VERBOSE: 1 - steps: - - uses: actions/checkout@v4.1.1 - if: ${{ inputs.version != 'latest' }} - with: - submodules: true - repository: ${{ inputs.repo }} - ref: ${{ inputs.version }} - - - uses: actions/checkout@v4.1.1 - if: ${{ inputs.version == 'latest' }} - with: - submodules: true - repository: ${{ inputs.repo }} - - - name: ๐Ÿ” setup libhal + - name: ๐Ÿ“ฆ Create `MinSizeRel` package for cortex-m33f run: | - pipx install conan>=${{ inputs.conan_version }} - conan --version - conan config install https://github.com/libhal/conan-config2.git - conan hal setup + conan create . -s:h build_type=MinSizeRel -s:h os=baremetal -s:h arch=cortex-m33f \ + --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing \ + -o:h *:flash_clkdiv=2 -o:h *:rp_revision=a2 -o:h *:flash_size="(16 * 1024 * 1024)" -o:h *:use_w25q_flash=True \ + -o:h *:platform=rp2350-arm-s -o:h *:variant=rp2350b - - name: ๐Ÿ“ฅ Download conan package cache - uses: actions/download-artifact@v4 - with: - name: conan-packages-${{ inputs.upload_suffix }} - path: . - - - name: ๐Ÿ“ฆ Extract conan packages tarball - run: tar -xzf conan-packages.tar.gz -C ~/.conan2 - - - name: ๐Ÿ“ฆ Create `Debug` package for cortex-m4f - run: conan create . -s:h build_type=Debug -s:h os=baremetal -s:h arch=cortex-m4f --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing - - - name: ๐Ÿ“ฆ Create `MinSizeRel` package for cortex-m4f - run: conan create . -s:h build_type=MinSizeRel -s:h os=baremetal -s:h arch=cortex-m4f --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing - - - name: ๐Ÿ“ฆ Create `Release` package for cortex-m4f - run: conan create . -s:h build_type=Release -s:h os=baremetal -s:h arch=cortex-m4f --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing + - name: ๐Ÿ“ฆ Create `Release` package for cortex-m33f + run: | + conan create . -s:h build_type=Release -s:h os=baremetal -s:h arch=cortex-m33f \ + --version=${{ inputs.version }} -pr:h ${{ inputs.compiler_profile }} --build=missing \ + -o:h *:flash_clkdiv=2 -o:h *:rp_revision=a2 -o:h *:flash_size="(16 * 1024 * 1024)" -o:h *:use_w25q_flash=True \ + -o:h *:platform=rp2350-arm-s -o:h *:variant=rp2350b - name: ๐Ÿ“ก Sign into JFrog Artifactory if: ${{ inputs.version != 'latest' }} @@ -237,4 +143,4 @@ jobs: - name: ๐Ÿ†™ Upload package version ${{ inputs.version }} to conan repo if: ${{ inputs.version != 'latest' }} - run: conan upload "libhal-arm-mcu/${{ inputs.version }}" --confirm -r=libhal + run: conan upload "libhal-picosdk/${{ inputs.version }}" --confirm -r=libhal diff --git a/.github/workflows/library_test.yml b/.github/workflows/library_test.yml index 1d78e48..938da8e 100644 --- a/.github/workflows/library_test.yml +++ b/.github/workflows/library_test.yml @@ -24,10 +24,6 @@ concurrency: cancel-in-progress: true jobs: - ci: - uses: libhal/ci/.github/workflows/library_check.yml@5.x.y - secrets: inherit - deploy_gcc: uses: ./.github/workflows/deploy_with_cache.yml with: diff --git a/CMakeLists.txt b/CMakeLists.txt index 86c4c63..73096f1 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -14,160 +14,29 @@ cmake_minimum_required(VERSION 3.15) -if(DEFINED ENV{PICO_SDK_PATH}) set(PICO_CXX_ENABLE_EXCEPTIONS 1) set(PICO_NO_PICOTOOL 1) include($ENV{PICO_SDK_PATH}/external/pico_sdk_import.cmake) -endif() set(CMAKE_COLOR_DIAGNOSTICS ON) -project(libhal-arm-mcu LANGUAGES CXX C ASM) - -# Should probably refine this to actually not compile -# drivers for all platforms all the time, but for now this -# serves my purposes -if(NOT DEFINED ENV{PICO_SDK_PATH}) -set(source_list - src/system_controller.cpp - src/dwt_counter.cpp - src/interrupt.cpp - src/systick_timer.cpp - - # lpc40 - src/lpc40/adc.cpp - src/lpc40/can.cpp - src/lpc40/clock.cpp - src/lpc40/dac.cpp - src/lpc40/dma.cpp - src/lpc40/i2c.cpp - src/lpc40/input_pin.cpp - src/lpc40/interrupt_pin.cpp - src/lpc40/interrupt.cpp - src/lpc40/output_pin.cpp - src/lpc40/pin.cpp - src/lpc40/power.cpp - src/lpc40/pwm.cpp - src/lpc40/spi.cpp - src/lpc40/dma_spi.cpp - src/lpc40/stream_dac.cpp - src/lpc40/uart.cpp - - # stm32_generic - src/stm32_generic/i2c.cpp - src/stm32_generic/pwm.cpp - src/stm32_generic/quadrature_encoder.cpp - src/stm32_generic/spi.cpp - src/stm32_generic/timer.cpp - src/stm32_generic/uart.cpp - - # stm32f1 - src/stm32f1/can.cpp - src/stm32f1/can2.cpp - src/stm32f1/clock.cpp - src/stm32f1/gpio.cpp - src/stm32f1/independent_watchdog.cpp - src/stm32f1/input_pin.cpp - src/stm32f1/interrupt.cpp - src/stm32f1/output_pin.cpp - src/stm32f1/pin.cpp - src/stm32f1/power.cpp - src/stm32f1/pwm.cpp - src/stm32f1/quadrature_encoder.cpp - src/stm32f1/timer.cpp - src/stm32f1/uart.cpp - src/stm32f1/spi.cpp - src/stm32f1/adc.cpp - src/stm32f1/usart.cpp - src/stm32f1/usb.cpp - - # stm32f411 - src/stm32f411/clock.cpp - src/stm32f411/dma.cpp - src/stm32f411/i2c.cpp - src/stm32f411/input_pin.cpp - src/stm32f411/interrupt.cpp - src/stm32f411/output_pin.cpp - src/stm32f411/pin.cpp - src/stm32f411/power.cpp - src/stm32f411/spi.cpp - src/stm32f411/uart.cpp - - # stm32f40 - src/stm32f40/output_pin.cpp -) - -set( - test_sources - # cortex_m - tests/dwt_counter.test.cpp - tests/interrupt.test.cpp - tests/main.test.cpp - tests/systick_timer.test.cpp - - # lpc40 - tests/lpc40/adc.test.cpp - tests/lpc40/can.test.cpp - tests/lpc40/i2c.test.cpp - tests/lpc40/input_pin.test.cpp - tests/lpc40/interrupt_pin.test.cpp - tests/lpc40/output_pin.test.cpp - tests/lpc40/pwm.test.cpp - tests/lpc40/spi.test.cpp - tests/lpc40/stream_dac.test.cpp - tests/lpc40/uart.test.cpp - - # stm32f1 - tests/stm32f1/can.test.cpp - tests/stm32f1/can2.test.cpp - tests/stm32f1/output_pin.test.cpp - tests/stm32f1/uart.test.cpp - tests/stm32f1/spi.test.cpp - tests/stm32f1/adc.test.cpp - tests/stm32f1/usb.test.cpp - - # stm32f411 - tests/stm32f411/output_pin.test.cpp - tests/stm32f411/spi.test.cpp -) - -else() -set(source_list - src/rp/gpio.cpp - src/rp/serial.cpp - src/rp/i2c.cpp - src/rp/pwm.cpp - src/rp/adc.cpp - src/rp/spi.cpp - src/rp/time.cpp - src/system_controller.cpp - src/dwt_counter.cpp - src/interrupt.cpp -) +project(libhal-picosdk LANGUAGES CXX C ASM) pico_sdk_init() -set(pico_dep - hardware_gpio_headers - pico_time_headers - pico_stdio_headers - hardware_sync_headers - hardware_i2c_headers - hardware_pwm_headers - hardware_adc_headers - hardware_spi_headers - hardware_uart_headers - hardware_timer_headers - hardware_dma_headers -) - -endif() - libhal_test_and_make_library( - LIBRARY_NAME libhal-arm-mcu + LIBRARY_NAME libhal-picosdk SOURCES - ${source_list} + src/gpio.cpp + src/serial.cpp + src/i2c.cpp + src/pwm.cpp + src/adc.cpp + src/spi.cpp + src/time.cpp + src/dwt_counter.cpp src/terminate_handler.cpp + src/interrupt.cpp TEST_SOURCES ${test_sources} @@ -183,6 +52,16 @@ libhal_test_and_make_library( libhal::util nonstd::ring-span-lite nonstd::scope-lite - ${pico_dep} + hardware_gpio_headers + pico_time_headers + pico_stdio_headers + hardware_sync_headers + hardware_i2c_headers + hardware_pwm_headers + hardware_adc_headers + hardware_spi_headers + hardware_uart_headers + hardware_timer_headers + hardware_dma_headers ) diff --git a/README.md b/README.md index 59ac700..8c41efc 100644 --- a/README.md +++ b/README.md @@ -1,33 +1,15 @@ -# libhal-arm-mcu +# libhal-picosdk -[![โœ… Demos Build](https://github.com/libhal/libhal-arm-mcu/actions/workflows/demos_test.yml/badge.svg)](https://github.com/libhal/libhal-arm-mcu/actions/workflows/demos_test.yml) -[![โœ… Library Builds](https://github.com/libhal/libhal-arm-mcu/actions/workflows/library_test.yml/badge.svg)](https://github.com/libhal/libhal-arm-mcu/actions/workflows/library_test.yml) -[![GitHub stars](https://img.shields.io/github/stars/libhal/libhal-armcortex.svg)](https://github.com/libhal/libhal-armcortex/stargazers) -[![GitHub forks](https://img.shields.io/github/forks/libhal/libhal-armcortex.svg)](https://github.com/libhal/libhal-armcortex/network) -[![GitHub issues](https://img.shields.io/github/issues/libhal/libhal-armcortex.svg)](https://github.com/libhal/libhal-armcortex/issues) - -This repo contains libhal compatible libraries for numerous ARM Cortex-M -processor microcontrollers (MCUs). This is a platform library supporting -generic ARM processor APIs and peripheral drivers from many different -microcontrollers. - -> [!NOTE] -> CI is failing due to a memory leak detected via ASAN when executing the unit tests on Linux. -> Everything passes without an error or leak detected on MacOS builds. -> This is the current cause of the CI to failure. Otherwise the rest of CI is passing. +This repo is a libhal wrapper for the Raspberry Pi Pico C/C++ SDK. See +for information about libhal or for information about +the underlying library. ## ๐Ÿ“š Software APIs & Usage To learn about the available drivers and APIs see the headers -[`include/libhal-arm-mcu`](https://github.com/libhal/libhal-arm-mcu/tree/main/include/libhal-arm-mcu) +[`include/libhal-picosdk`](https://github.com/libhal/libhal-picosdk/tree/main/include/libhal-picosdk) directory. -To see how each driver is used see the -[`demos/`](https://github.com/libhal/libhal-arm-mcu/tree/main/demos) directory. - -Fully rendered Doxygen APIs will be provided when -[issue#37](https://github.com/libhal/libhal-arm-mcu/issues/37) is closed. - ## ๐Ÿงฐ Setup To get started with libhal, follow the @@ -53,84 +35,25 @@ old files with the latest versions. Now that you have the profiles installed, you can build demos and libraries for ARM microcontrollers. -## ๐Ÿ—๏ธ Building Demo Applications - -To build demos, start at the root of the repo and execute the following command: - -```bash -conan build demos -pr hal/mcu/lpc4078 -s hal/tc/arm-gcc -``` - -This will build the demos for the `lpc4078` microcontroller in `MinSizeRel` -mode. Replace `lpc4078` with any of the other complete profiles found in the -`profiles/hal/mcu`. You must also supply the compiler you plan to use. -`hal/tc/arm-gcc` is the currently support ARM GCC compiler for libhal which is -set to `14.3` - -Add the flag `-s build_type=Debug` to build in debug mode: - -```bash -conan build demos -pr hal/mcu/lpc4078 -s hal/tc/arm-gcc -s build_type=Debug -``` - -Build type `Debug`, `MinSizeRel`, and `Release` are all available. - ## ๐Ÿ’พ Flashing/Programming -There are a few ways to flash an LPC40 series MCU. The recommended methods are -via USB or using a debugger JTAG/SWD. - -### Flashing NXP MCUs - -[`nxpprog`](https://github.com/libhal/nxpprog) is a script for programming and -flashing LPC40 series chips over serial/UART. Using it will require a USB to -serial/uart adaptor. - -See the README on [`nxpprog`](https://github.com/libhal/nxpprog), for details on -how to use NXPPROG. - -To install `nxpprog`: - -```bash -pipx install nxpprog -``` - -To flash command is: - -```bash -nxpprog --control --binary demos/build/lpc4078/MinSizeRel/blinker.elf.bin --device /dev/tty.usbserial-10 -``` - -- Replace `demos/build/lpc4078/MinSizeRel/blinker.elf.bin` with the path to the - binary you'd like to flash. -- Replace `/dev/tty.usbserial-10` with the path to your serial port on your - machine. +It is possible to flash RP-series chips via the file manager GUI, or from the +command line using picosdk's tools. -### Flashing STM32 Processors +### Programming via Mass Storage Interface -[`stm32loader`](https://pypi.org/project/stm32loader/) is a script for -programming and flashing STM32 series chips over serial/UART. Using it will -require a USB to serial/uart adaptor. +When the Pico microcontrollers enter boot mode, they appear as a mass storage device +on USB. By copying a uf2 firmware file into the directory of the mass storage interface, +it is possible to flash the microcontroller with no external tools. -For more information, please refer to the README of -[`stm32loader`](https://pypi.org/project/stm32loader/). +### Programming using picotool -To install stm32loader: +By adding `picotool` as a dependency, it is possible to flash the RP chips. First, add it +as a `tool_requires` dependency in your project. Then, convert the `.elf` firmware to `.uf2` +via the `pico_add_extra_oututs()` CMake function. +Then run `source build/rp2350-arm-s/BUILDTYPEHERE/generators/conanbuild.sh`. This will add +picotool to your path. Then run `picotool load FIRMWAREFILE.uf2` to upload. -```bash -pipx install stm32loader -``` - -To flash command is: - -```bash -stm32loader -p /dev/tty.usbserial-10 -e -w -v demos/build/stm32f103c8/MinSizeRel/blinker.elf.bin -``` - -- Replace `demos/build/stm32f103c8/MinSizeRel/blinker.elf.bin` with the path to - the binary you'd like to flash. -- Replace `/dev/tty.usbserial-10` with the path to your serial port on your - machine. ### Using JTAG/SWD over PyOCD @@ -138,8 +61,8 @@ stm32loader -p /dev/tty.usbserial-10 -e -w -v demos/build/stm32f103c8/MinSizeRel processor devices over JTAG and SWD. This will require a JTAG or SWD debugger. The recommended debugger for the -LPC40 series of devices is the STLink v2 (cheap variants can be found on -Amazon). +RP-series chips is the Raspberry Pi Debug Adapter, although any debugger will +suffice. See [PyOCD Installation Page](https://pyocd.io/docs/installing) for installation details. @@ -147,8 +70,7 @@ details. For reference the flashing command is: ```bash -pyocd flash --target lpc4088 demos/build/lpc4078/MinSizeRel/blinker.elf.bin -pyocd flash --target stm32f103rc demos/build/stm32f103c8/MinSizeRel/blinker.elf.bin +pyocd flash --target rp2350 demos/build/lpc4078/MinSizeRel/blinker.elf.bin ``` Note that the targets for your exact part may not exist in `pyocd`. Because of @@ -156,7 +78,7 @@ this, it means that the bounds of the memory may not fit your device. It is up to you to make sure you do not flash a binary larger than what can fit on your device. -## ๐Ÿ“ฆ Adding `libhal-arm-mcu` to your project +## ๐Ÿ“ฆ Adding `libhal-picosdk` to your project This section assumes you are using the [`libhal-starter`](https://github.com/libhal/libhal-starter) @@ -174,7 +96,7 @@ Add the following to your `requirements()` method: ```python def requirements(self): - self.requires("libhal-arm-mcu/[^1.0.0]") + self.requires("libhal-picosdk/[^1.0.0]") ``` The version number can be changed to whatever is appropriate for your @@ -186,7 +108,7 @@ platform library. No change needed. To perform a test build simple run `conan build .` as is done above with the desired target platform profile. -## โŒ Using `libhal-arm-mcu` in your library +## โŒ Using `libhal-picosdk` in your library This library is a platform library and as such should only be depended upon by applications. Platform libraries do not require ABI stability and thus do not @@ -244,79 +166,8 @@ The patch number will increment if: 2. Any changes occur within the `/include/libhal-arm-mcu/experimental` directory. -For now, you cannot expect ABI or API stability with anything in the -`/include/libhal-arm-mcu/experimental` directory. - -## ๐Ÿ Startup & Initialization - -Startup is managed by the [`picolibc`](https://keithp.com/picolibc/) runtime. -In terms of startup `picolibc` has to manage doing two things. For one, it must -construct a minimal interrupt vector table with two entries. The 1st entry is -the address of the top of the stack. The 2nd entry is the address of the -function that will be executed on reset. `picolibc` sets this to its own -`_start` function. `_start` does the following: - -1. Sets the main stack registers -2. Write the `.data` section from read-only memory -3. Set the `.bss` section to all zeros -4. Enable FPU if present for the core architecture -5. Calls all globally constructed C++ objects -6. Calls `main()` - -If the `.data` or `.bss` sections must initialized manually, there are functions -provided: - -```C++ -#include - -hal::cortex_m::initialize_data_section(); -hal::cortex_m::initialize_bss_section(); -hal::cortex_m::initialize_floating_point_unit(); -``` - -### ๐ŸŽ๏ธ Setting Clock Speed - -To setting the CPU clock speed to the maximum of 120MHz, include the line below, -with the rest of the includes: - -```C++ -#include -#include -#include -// etc.. -#include -``` - -Next run the following command but replace `12.0_MHz` with the crystal -oscillator frequency connected to the microcontroller. This command REQUIRES -that there be a crystal oscillator attached to the microcontroller. Calling -this without the oscillator will cause the device to freeze as it will attempt -to use a clock that does not exist. - -```C++ -hal::lpc40::maximum(12.0_MHz); -hal::stm32f1::maximum(8.0_MHz); -hal::stm32f4::maximum(10.0_MHz); -// etc... -hal::rp2040::maximum(16.0_MHz); -``` - -To set the clock rate to the max speed using the internal oscillator: - -```C++ -hal::lpc40::maximum_speed_using_internal_oscillator(); -hal::stm32f1::maximum_speed_using_internal_oscillator(); -hal::stm32f4::maximum_speed_using_internal_oscillator(); -// etc... -hal::rp2040::maximum_speed_using_internal_oscillator(); -``` - -These APIs may not always exist for all systems, so be sure to check if the API -exists. - -#### ๐Ÿ•ฐ๏ธ Detailed Clock Tree Control - -Coming soon... +For now, you cannot expect ABI or API stability with anything in an `experimental` +namespace. ## ๐Ÿ”Ž On Chip Software Debugging @@ -325,7 +176,7 @@ Coming soon... In one terminal: ```bash -pyocd gdbserver --semihost -Osemihost_console_type=True --persist --target=lpc4088 +pyocd gdbserver --semihost -Osemihost_console_type=True --persist --target=rp2350 ``` In another terminal: @@ -393,11 +244,3 @@ See [`CONTRIBUTING.md`](CONTRIBUTING.md) for details. Apache 2.0; see [`LICENSE`](LICENSE) for details. -## Source of initial files put into this library - -The original files came from the soon to be archived repos: - -- [`libhal/libhal-lpc40`](https://github.com/libhal/libhal-lpc40) -- [`libhal/libhal-stm32f1`](https://github.com/libhal/libhal-stm32f1) -- [`libhal/libhal-stm32f4`](https://github.com/libhal/libhal-stm32f4) -- [`libhal/libhal-armcortex`](https://github.com/libhal/libhal-armcortex) diff --git a/conan/profiles/v1/lpc40 b/conan/profiles/v1/lpc40 deleted file mode 100644 index 8432cac..0000000 --- a/conan/profiles/v1/lpc40 +++ /dev/null @@ -1,8 +0,0 @@ -[settings] -build_type=MinSizeRel -os=baremetal -arch={{ arch }} -libc=custom - -[options] -*:platform={{ platform }} diff --git a/conan/profiles/v1/lpc4072 b/conan/profiles/v1/lpc4072 deleted file mode 100644 index ddde8c9..0000000 --- a/conan/profiles/v1/lpc4072 +++ /dev/null @@ -1,3 +0,0 @@ -{% set platform = "lpc4072" %} -{% set arch = "cortex-m4" %} -{% include "lpc40" %} diff --git a/conan/profiles/v1/lpc4074 b/conan/profiles/v1/lpc4074 deleted file mode 100644 index dd2b528..0000000 --- a/conan/profiles/v1/lpc4074 +++ /dev/null @@ -1,3 +0,0 @@ -{% set platform = "lpc4074" %} -{% set arch = "cortex-m4" %} -{% include "lpc40" %} diff --git a/conan/profiles/v1/lpc4076 b/conan/profiles/v1/lpc4076 deleted file mode 100644 index 0d4b246..0000000 --- a/conan/profiles/v1/lpc4076 +++ /dev/null @@ -1,3 +0,0 @@ -{% set platform = "lpc4076" %} -{% set arch = "cortex-m4f" %} -{% include "lpc40" %} diff --git a/conan/profiles/v1/lpc4078 b/conan/profiles/v1/lpc4078 deleted file mode 100644 index e9366cd..0000000 --- a/conan/profiles/v1/lpc4078 +++ /dev/null @@ -1,3 +0,0 @@ -{% set platform = "lpc4078" %} -{% set arch = "cortex-m4f" %} -{% include "lpc40" %} diff --git a/conan/profiles/v1/lpc4088 b/conan/profiles/v1/lpc4088 deleted file mode 100644 index 8146daf..0000000 --- a/conan/profiles/v1/lpc4088 +++ /dev/null @@ -1,3 +0,0 @@ -{% set platform = "lpc4088" %} -{% set arch = "cortex-m4f" %} -{% include "lpc40" %} diff --git a/conan/profiles/v1/stm32f1 b/conan/profiles/v1/stm32f1 deleted file mode 100644 index 11fb46e..0000000 --- a/conan/profiles/v1/stm32f1 +++ /dev/null @@ -1,8 +0,0 @@ -[settings] -build_type=MinSizeRel -os=baremetal -arch=cortex-m3 -libc=custom - -[options] -*:platform={{ platform }} diff --git a/conan/profiles/v1/stm32f103c4 b/conan/profiles/v1/stm32f103c4 deleted file mode 100644 index 31b8b32..0000000 --- a/conan/profiles/v1/stm32f103c4 +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103c4" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103c6 b/conan/profiles/v1/stm32f103c6 deleted file mode 100644 index 7dec66b..0000000 --- a/conan/profiles/v1/stm32f103c6 +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103c6" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103c8 b/conan/profiles/v1/stm32f103c8 deleted file mode 100644 index 0a0d24c..0000000 --- a/conan/profiles/v1/stm32f103c8 +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103c8" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103cb b/conan/profiles/v1/stm32f103cb deleted file mode 100644 index 9d94464..0000000 --- a/conan/profiles/v1/stm32f103cb +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103cb" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103r4 b/conan/profiles/v1/stm32f103r4 deleted file mode 100644 index 1d13cf2..0000000 --- a/conan/profiles/v1/stm32f103r4 +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103r4" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103r6 b/conan/profiles/v1/stm32f103r6 deleted file mode 100644 index 0cbbaa1..0000000 --- a/conan/profiles/v1/stm32f103r6 +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103r6" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103r8 b/conan/profiles/v1/stm32f103r8 deleted file mode 100644 index c7d81ce..0000000 --- a/conan/profiles/v1/stm32f103r8 +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103r8" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103rb b/conan/profiles/v1/stm32f103rb deleted file mode 100644 index 6792f13..0000000 --- a/conan/profiles/v1/stm32f103rb +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103rb" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103rc b/conan/profiles/v1/stm32f103rc deleted file mode 100644 index 72cc999..0000000 --- a/conan/profiles/v1/stm32f103rc +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103rc" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103rd b/conan/profiles/v1/stm32f103rd deleted file mode 100644 index 9948af5..0000000 --- a/conan/profiles/v1/stm32f103rd +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103rd" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103re b/conan/profiles/v1/stm32f103re deleted file mode 100644 index 2b3df0c..0000000 --- a/conan/profiles/v1/stm32f103re +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103re" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103rf b/conan/profiles/v1/stm32f103rf deleted file mode 100644 index 1cdbc8f..0000000 --- a/conan/profiles/v1/stm32f103rf +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103rf" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103rg b/conan/profiles/v1/stm32f103rg deleted file mode 100644 index 818b643..0000000 --- a/conan/profiles/v1/stm32f103rg +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103rg" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103t4 b/conan/profiles/v1/stm32f103t4 deleted file mode 100644 index 33622f4..0000000 --- a/conan/profiles/v1/stm32f103t4 +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103t4" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103t6 b/conan/profiles/v1/stm32f103t6 deleted file mode 100644 index 13fad1c..0000000 --- a/conan/profiles/v1/stm32f103t6 +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103t6" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103t8 b/conan/profiles/v1/stm32f103t8 deleted file mode 100644 index ecf034c..0000000 --- a/conan/profiles/v1/stm32f103t8 +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103t8" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103tb b/conan/profiles/v1/stm32f103tb deleted file mode 100644 index add1e93..0000000 --- a/conan/profiles/v1/stm32f103tb +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103tb" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103v8 b/conan/profiles/v1/stm32f103v8 deleted file mode 100644 index f070d74..0000000 --- a/conan/profiles/v1/stm32f103v8 +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103v8" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103vb b/conan/profiles/v1/stm32f103vb deleted file mode 100644 index bcb9566..0000000 --- a/conan/profiles/v1/stm32f103vb +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103vb" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103vc b/conan/profiles/v1/stm32f103vc deleted file mode 100644 index 62005aa..0000000 --- a/conan/profiles/v1/stm32f103vc +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103vc" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103vd b/conan/profiles/v1/stm32f103vd deleted file mode 100644 index 5b8d91d..0000000 --- a/conan/profiles/v1/stm32f103vd +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103vd" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103ve b/conan/profiles/v1/stm32f103ve deleted file mode 100644 index 66d6779..0000000 --- a/conan/profiles/v1/stm32f103ve +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103ve" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103vf b/conan/profiles/v1/stm32f103vf deleted file mode 100644 index ed510ef..0000000 --- a/conan/profiles/v1/stm32f103vf +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103vf" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103vg b/conan/profiles/v1/stm32f103vg deleted file mode 100644 index 771bcf7..0000000 --- a/conan/profiles/v1/stm32f103vg +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103vg" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103zc b/conan/profiles/v1/stm32f103zc deleted file mode 100644 index 106d794..0000000 --- a/conan/profiles/v1/stm32f103zc +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103zc" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103zd b/conan/profiles/v1/stm32f103zd deleted file mode 100644 index ac8353c..0000000 --- a/conan/profiles/v1/stm32f103zd +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103zd" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103ze b/conan/profiles/v1/stm32f103ze deleted file mode 100644 index df414b3..0000000 --- a/conan/profiles/v1/stm32f103ze +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103ze" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103zf b/conan/profiles/v1/stm32f103zf deleted file mode 100644 index f427a79..0000000 --- a/conan/profiles/v1/stm32f103zf +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103zf" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f103zg b/conan/profiles/v1/stm32f103zg deleted file mode 100644 index c7e1a92..0000000 --- a/conan/profiles/v1/stm32f103zg +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f103zg" %} -{% include "stm32f1" %} diff --git a/conan/profiles/v1/stm32f411 b/conan/profiles/v1/stm32f411 deleted file mode 100644 index 4e3a55a..0000000 --- a/conan/profiles/v1/stm32f411 +++ /dev/null @@ -1,8 +0,0 @@ -[settings] -build_type=MinSizeRel -os=baremetal -arch=cortex-m4f -libc=custom - -[options] -*:platform={{ platform }} diff --git a/conan/profiles/v1/stm32f411re b/conan/profiles/v1/stm32f411re deleted file mode 100644 index e4c3146..0000000 --- a/conan/profiles/v1/stm32f411re +++ /dev/null @@ -1,2 +0,0 @@ -{% set platform = "stm32f411re" %} -{% include "stm32f411" %} diff --git a/conanfile.py b/conanfile.py index 44d3097..786120b 100644 --- a/conanfile.py +++ b/conanfile.py @@ -24,38 +24,19 @@ required_conan_version = ">=2.0.14" -class libhal_arm_mcu_conan(ConanFile): - name = "libhal-arm-mcu" +class libhal_picosdk_conan(ConanFile): + name = "libhal-picosdk" license = "Apache-2.0" - homepage = "https://github.com/libhal/libhal-arm-mcu" + homepage = "https://github.com/libhal/libhal-picosdk" description = ( - "A collection of libhal drivers and libraries for the " - "Cortex M series ARM processors and microcontrollers." + "Drivers that adapt Raspberry Pi Pico C/C++ SDK to libhal." ) topics = ( "arm", "cortex", "cortex-m", "cortex-m0", - "cortex-m0plus", - "cortex-m1", - "cortex-m3", - "cortex-m4", - "cortex-m4f", - "cortex-m7", - "cortex-m23", - "cortex-m55", - "cortex-m35p", "cortex-m33", - "lpc", - "lpc40", - "lpc40xx", - "lpc4072", - "lpc4074", - "lpc4078", - "lpc4088", - "stm32f1", - "stm32f103", "rp2040", "rp2350", ) @@ -68,28 +49,23 @@ class libhal_arm_mcu_conan(ConanFile): "platform": ["ANY"], "use_libhal_exceptions": [True, False], "use_picolibc": [True, False], - "use_default_linker_script": [True, False], "variant": [None, "ANY"], "board": [None, "ANY"], "replace_std_terminate": [True, False], "use_semihosting": [True, False], - "flash_size": [None, "ANY"], - "flash_clkdiv": [None, "ANY"], - "rp_revision": [None, "ANY"], + "flash_size": ["ANY"], + "flash_clkdiv": ["ANY"], + "rp_revision": ["ANY"], "use_w25q_flash": [True, False], } default_options = { "platform": "ANY", - "use_libhal_exceptions": True, + "board": None, + "use_libhal_exceptions": False, "use_picolibc": True, - "use_default_linker_script": True, "replace_std_terminate": True, "use_semihosting": True, "variant": None, - "board": None, - "flash_size": None, - "flash_clkdiv": None, - "rp_revision": None, "use_w25q_flash": False, } @@ -97,7 +73,6 @@ class libhal_arm_mcu_conan(ConanFile): "platform": "Specifies which platform to provide binaries and build information for", "use_libhal_exceptions": "Reserved for backwards compatibility. This option is currently unused and will become functional when libhal-exceptions is feature complete.", "use_picolibc": "Use picolibc as the libc runtime for ARM GCC. Note: ARM's LLVM fork always uses picolibc and ignores this option.", - "use_default_linker_script": "Enable automatic linker script selection based on the specified platform", "replace_std_terminate": "Replace the default std::terminate handler to reduce binary size by avoiding verbose text rendering", "use_semihosting": "Enables semihosting support, allowing the MCU to perform host based I/O like writing to stdout or reading from files via the debug port. With LLVM from arm-toolchain, semihosting is enabled via the compiler and must be disabled via a build profile option and not this option.", } @@ -126,24 +101,9 @@ def requirements(self): "prebuilt-picolibc/" + CV, options={"crt0": CRT0, "oslib": OSLIB} ) - if str(self.options.platform).startswith("rp2"): - self.requires("picosdk/2.2.1-alpha") - self.tool_requires("pioasm/2.2.0") - - def handle_stm32f1_linker_scripts(self): - linker_script_name = list(str(self.options.platform)) - # Replace the MCU number and pin count number with 'x' (don't care) - # to map to the linker script - linker_script_name[8] = "x" - linker_script_name[9] = "x" - linker_script_name = "".join(linker_script_name) + self.requires("picosdk/2.2.1-alpha") + self.tool_requires("pioasm/2.2.0") - self.cpp_info.exelinkflags.extend( - [ - "-L" + str(Path(self.package_folder) / "linker_scripts"), - "-T" + str(Path("libhal-stm32f1") / linker_script_name + ".ld"), - ] - ) def _macro(self, string): return string.upper().replace("-", "_") @@ -152,20 +112,18 @@ def generate(self): virt = VirtualBuildEnv(self) virt.generate() tc = CMakeToolchain(self) - if str(self.options.platform).startswith("rp2"): - tc.cache_variables["DO_NOT_BUILD_BOOT_HAL"] = True - tc.preprocessor_definitions["PICO_STDIO_SHORT_CIRCUIT_CLIB_FUNCS"] = "0" - if self.options.board: - tc.cache_variables["PICO_BOARD"] = str(self.options.board) - if ( - self.options.flash_size - or self.options.flash_clkdiv - or self.options.rp_revision - ): - tc.cache_variables["PICO_BOARD_HEADER_DIRS"] = str( - self.build_folder - ) - self.generate_rp_header() + tc.cache_variables["DO_NOT_BUILD_BOOT_HAL"] = True + tc.preprocessor_definitions["PICO_STDIO_SHORT_CIRCUIT_CLIB_FUNCS"] = "0" + tc.cache_variables["PICO_BOARD"] = self.getboard() + if ( + self.options.flash_size + or self.options.flash_clkdiv + or self.options.rp_revision + ): + tc.cache_variables["PICO_BOARD_HEADER_DIRS"] = str( + self.build_folder + ) + self.generate_rp_header() if self.options.variant: tc.preprocessor_definitions[ "LIBHAL_VARIANT_" + self._macro(str(self.options.variant)) @@ -177,36 +135,30 @@ def generate(self): cmake = CMakeDeps(self) cmake.generate() + def getboard(self): + if not self.options.board: + return "libhal_picosdk" + return self.options.board.value + def validate(self): - if str(self.options.platform).startswith("rp2"): - if self.options.use_default_linker_script: + if ( + self.options.flash_size + or self.options.flash_clkdiv + or self.options.rp_revision + ): + if not self.options.flash_size: + raise ConanInvalidConfiguration("Flash size must be set") + if not str(self.options.flash_clkdiv).isnumeric(): raise ConanInvalidConfiguration( - "Default linker scripts are not compatible with RP chips, use pico-sdk linker scripts instead" + "Flash clock divider is invalid value" ) - if not self.options.board: - raise ConanInvalidConfiguration("RP board not specified") - if "rp2350" in str(self.options.platform): - if not self.options.variant: - raise ConanInvalidConfiguration("RP2350 variant not specified") - if self.options.variant not in ["rp2350a", "rp2350b"]: - raise ConanInvalidConfiguration("Invalid RP2350 variant specified") - if not self.options.board: - raise ConanInvalidConfiguration( - "Board must be specified during build" - ) - if ( - self.options.flash_size - or self.options.flash_clkdiv - or self.options.rp_revision - ): - if not self.options.flash_size: - raise ConanInvalidConfiguration("Flash size must be set") - if not str(self.options.flash_clkdiv).isnumeric(): - raise ConanInvalidConfiguration( - "Flash clock divider is invalid value" - ) - if self.options.rp_revision.value not in ["a1", "a2"]: - raise ConanInvalidConfiguration("RP revision is invalid") + if self.options.rp_revision.value not in ["a1", "a2"]: + raise ConanInvalidConfiguration("RP revision is invalid") + if "rp2350" in str(self.options.platform): + if not self.options.variant: + raise ConanInvalidConfiguration("RP2350 variant not specified") + if self.options.variant not in ["rp2350a", "rp2350b"]: + raise ConanInvalidConfiguration("Invalid RP2350 variant specified") super().validate() def package(self): @@ -217,28 +169,29 @@ def package(self): ): copy( self, - f"{self.options.board.value}.h", + f"{self.getboard()}.h", dst=Path(self.package_folder).joinpath("include", "picosdk-board-defs"), src=self.build_folder, ) super().package() def package_info(self): - self.cpp_info.libs = ["libhal-arm-mcu"] - self.cpp_info.set_property("cmake_target_name", "libhal::arm-mcu") + self.cpp_info.libs = ["libhal-picosdk"] + self.cpp_info.set_property("cmake_target_name", "libhal::picosdk") self.cpp_info.set_property( "cmake_target_aliases", - ["libhal::lpc40", "libhal::stm32f1", "libhal::stm32f4", "libhal::rp2350"], + ["libhal::rp2350"], ) PLATFORM = str(self.options.platform) self.buildenv_info.define("LIBHAL_PLATFORM", PLATFORM) - self.buildenv_info.define("LIBHAL_PLATFORM_LIBRARY", "arm-mcu") + self.buildenv_info.define("LIBHAL_PLATFORM_LIBRARY", "picosdk") if str(self.options.platform).startswith("rp2"): - self.buildenv_info.define( - "PICO_BOARD_HEADER_DIRS", - str(Path(self.package_folder, "include", "picosdk-board-defs")), - ) + if self.options.flash_size: + self.buildenv_info.define( + "PICO_BOARD_HEADER_DIRS", + str(Path(self.package_folder, "include", "picosdk-board-defs")), + ) defines = [] if self.options.variant: defines.append( @@ -301,29 +254,8 @@ def setup_baremetal(self, platform: str): ] ) - if self.options.use_default_linker_script: - LINKER_SCRIPTS_PATH = Path(self.package_folder) / "linker_scripts" - # If the platform matches the linker script, just use that linker - # script - self.cpp_info.exelinkflags.append("-L" + str(LINKER_SCRIPTS_PATH)) - - FULL_LINKER_PATH: Path = LINKER_SCRIPTS_PATH / (platform + ".ld") - # if the file exists, then we should use it as the linker - if FULL_LINKER_PATH.exists(): - self.output.info(f"linker file '{FULL_LINKER_PATH}' found!") - self.cpp_info.exelinkflags.append("-T" + platform + ".ld") - else: - # if there is no match, then the linker script could be a - # pattern based on the name of the platform - self.append_linker_using_platform(platform) - - if self.settings.compiler == "gcc": - self.cpp_info.exelinkflags.append("-Tpicolibc_gcc.ld") - if self.settings.compiler == "clang": - self.cpp_info.exelinkflags.append("-Tpicolibc_llvm.ld") - package_folder = Path(self.package_folder) - LIB_PATH = package_folder / "lib" / "liblibhal-arm-mcu.a" + LIB_PATH = package_folder / "lib" / "liblibhal-picosdk.a" self.cpp_info.exelinkflags.extend( [ # Ensure that all symbols are added to the linker's symbol table @@ -337,27 +269,14 @@ def setup_baremetal(self, platform: str): ] ) - def append_linker_using_platform(self, platform: str): - if platform.startswith("stm32f1"): - linker_script_name = list(str(self.options.platform)) - # Replace the MCU number and pin count number with 'x' (don't care) - # to map to the linker script - linker_script_name[8] = "x" - linker_script_name[9] = "x" - linker_script_name = "".join(linker_script_name) - self.cpp_info.exelinkflags.append("-T" + linker_script_name + ".ld") - return - # Add additional script searching queries here - def generate_rp_header(self): platform = str(self.options.platform.value) - pico_board = self.options.board.value + pico_board = self.getboard() a2 = "1" if self.options.rp_revision.value == "a2" else "0" + r2350a = "0" if platform.startswith("rp235"): if self.options.variant == "rp2350a": r2350a = "1" - else: - r2350a = "0" file = f"""#ifndef _{pico_board}_h #define _{pico_board}_h pico_board_cmake_set(PICO_PLATFORM, {platform}) diff --git a/datasheets/cpu/Arm-Cortex-M-Comparison-Table-v9.pdf b/datasheets/cpu/Arm-Cortex-M-Comparison-Table-v9.pdf deleted file mode 100644 index 162ff9b..0000000 Binary files a/datasheets/cpu/Arm-Cortex-M-Comparison-Table-v9.pdf and /dev/null differ diff --git a/datasheets/cpu/DDI0403E_e_armv7m_arm.pdf b/datasheets/cpu/DDI0403E_e_armv7m_arm.pdf deleted file mode 100644 index 945c133..0000000 Binary files a/datasheets/cpu/DDI0403E_e_armv7m_arm.pdf and /dev/null differ diff --git a/datasheets/cpu/DDI0553B_v_armv8m_arm.pdf b/datasheets/cpu/DDI0553B_v_armv8m_arm.pdf deleted file mode 100644 index 5624515..0000000 Binary files a/datasheets/cpu/DDI0553B_v_armv8m_arm.pdf and /dev/null differ diff --git a/datasheets/cpu/arm_cortex_m33_trm_100230_0100_07_en.pdf b/datasheets/cpu/arm_cortex_m33_trm_100230_0100_07_en.pdf deleted file mode 100644 index d8f74c4..0000000 Binary files a/datasheets/cpu/arm_cortex_m33_trm_100230_0100_07_en.pdf and /dev/null differ diff --git a/datasheets/lpc40/LPC408X_7X.pdf b/datasheets/lpc40/LPC408X_7X.pdf deleted file mode 100644 index 7d2a06a..0000000 Binary files a/datasheets/lpc40/LPC408X_7X.pdf and /dev/null differ diff --git a/datasheets/lpc40/UM10562.pdf b/datasheets/lpc40/UM10562.pdf deleted file mode 100644 index d9ff56e..0000000 Binary files a/datasheets/lpc40/UM10562.pdf and /dev/null differ diff --git a/datasheets/stm32f1/RM0008.pdf b/datasheets/stm32f1/RM0008.pdf deleted file mode 100644 index b29bd27..0000000 Binary files a/datasheets/stm32f1/RM0008.pdf and /dev/null differ diff --git a/datasheets/stm32f1/STM32F103x8.pdf b/datasheets/stm32f1/STM32F103x8.pdf deleted file mode 100644 index cc7cc61..0000000 Binary files a/datasheets/stm32f1/STM32F103x8.pdf and /dev/null differ diff --git a/datasheets/stm32f1/errata-en.CD00197763.pdf b/datasheets/stm32f1/errata-en.CD00197763.pdf deleted file mode 100644 index fe2cffd..0000000 Binary files a/datasheets/stm32f1/errata-en.CD00197763.pdf and /dev/null differ diff --git a/datasheets/stm32f411/RM0383.pdf b/datasheets/stm32f411/RM0383.pdf deleted file mode 100644 index 480d757..0000000 Binary files a/datasheets/stm32f411/RM0383.pdf and /dev/null differ diff --git a/datasheets/stm32f411/STM32F411xx.pdf b/datasheets/stm32f411/STM32F411xx.pdf deleted file mode 100644 index 9f65e50..0000000 Binary files a/datasheets/stm32f411/STM32F411xx.pdf and /dev/null differ diff --git a/demos/.clangd b/demos/.clangd deleted file mode 100644 index f8ff8cd..0000000 --- a/demos/.clangd +++ /dev/null @@ -1,3 +0,0 @@ -CompileFlags: - CompilationDatabase: . - BuiltinHeaders: QueryDriver diff --git a/demos/CMakeLists.txt b/demos/CMakeLists.txt deleted file mode 100644 index b74235d..0000000 --- a/demos/CMakeLists.txt +++ /dev/null @@ -1,102 +0,0 @@ -# Copyright 2024 - 2025 Khalil Estell and the libhal contributors -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -cmake_minimum_required(VERSION 4.0) - -if(DEFINED ENV{PICO_SDK_PATH}) -include($ENV{PICO_SDK_PATH}/external/pico_sdk_import.cmake) -endif() - -project(demos LANGUAGES CXX C ASM) - -find_package(libhal-arm-mcu CONFIG REQUIRED) - -if(DEFINED ENV{PICO_SDK_PATH}) -pico_sdk_init() - -pico_enable_stdio_usb(libhal::arm-mcu 1) -pico_enable_stdio_uart(libhal::arm-mcu 0) - -set(demo_deps - pico_stdlib - hardware_gpio - pico_stdio - hardware_i2c - hardware_adc - hardware_spi -) - -# not all of the demos work at the moment -set(demos - adc - blinker - # can - # dac - gpio - i2c - interrupt_pin - uart - pwm - pwm16 - spi - blank - # stream_dac - # watchdog - # timer - # usb_cdc_raw - # semihost -) - -else() - -set(demos - adc - blinker - can - dac - gpio - i2c - interrupt_pin - uart - pwm - pwm16 - spi - blank - stream_dac - watchdog - timer - usb_cdc_raw - semihost -) - -set(demo_deps - minimp3::minimp3 -) -endif() - -set(ENV{LIBHAL_PLATFORM_LIBRARY} arm-mcu) - -libhal_build_demos( - DEMOS - ${demos} - - PACKAGES - minimp3 - - INCLUDES - . - - LINK_LIBRARIES - ${demo_deps} -) diff --git a/demos/applications/adc.cpp b/demos/applications/adc.cpp deleted file mode 100644 index 0dbf62c..0000000 --- a/demos/applications/adc.cpp +++ /dev/null @@ -1,41 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include - -#include - -void application() -{ - auto clock = resources::clock(); - auto console = resources::console(); - auto adc = resources::adc(); - - hal::print(*console, "ADC Application Starting...\n"); - - while (true) { - using namespace std::chrono_literals; - auto percent = adc->read(); - // Get current uptime - auto uptime = clock->uptime(); - hal::print<128>(*console, - "%" PRId32 "%%: %" PRIu32 "ns\n", - static_cast(percent * 100), - static_cast(uptime)); - hal::delay(*clock, 100ms); - } -} diff --git a/demos/applications/blank.cpp b/demos/applications/blank.cpp deleted file mode 100644 index cd51fe9..0000000 --- a/demos/applications/blank.cpp +++ /dev/null @@ -1,19 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -void application() -{ -} diff --git a/demos/applications/blinker.cpp b/demos/applications/blinker.cpp deleted file mode 100644 index 24d95d2..0000000 --- a/demos/applications/blinker.cpp +++ /dev/null @@ -1,32 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include - -void application() -{ - auto clock = resources::clock(); - auto led = resources::status_led(); - - while (true) { - using namespace std::chrono_literals; - led->level(false); - hal::delay(*clock, 500ms); - led->level(true); - hal::delay(*clock, 500ms); - } -} diff --git a/demos/applications/can.cpp b/demos/applications/can.cpp deleted file mode 100644 index 4d37e67..0000000 --- a/demos/applications/can.cpp +++ /dev/null @@ -1,129 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include - -#include -#include - -void print_can_message(hal::serial& p_console, - hal::can_message const& p_message) -{ - hal::print<96>(p_console, - "๐Ÿ“ฉ Received new hal::can_message { \n" - " id: 0x%lX,\n" - " length: %u \n" - " payload = [ ", - p_message.id, - p_message.length); - - for (auto const& byte : p_message.payload) { - hal::print<8>(p_console, "0x%02X, ", byte); - } - - hal::print(p_console, "]\n}\n"); -} - -void application() -{ - using namespace hal::literals; - - auto clock = resources::clock(); - auto can_transceiver = resources::can_transceiver(); - auto can_bus_manager = resources::can_bus_manager(); - auto can_interrupt = resources::can_interrupt(); - auto can_id_filter = resources::can_identifier_filter(); - auto console = resources::console(); - - // Change the CAN baudrate here. - static constexpr auto baudrate = 100.0_kHz; - - hal::print(*console, "๐Ÿš€ Starting CAN demo!\n"); - - can_bus_manager->baud_rate(baudrate); - can_interrupt->on_receive([&console](hal::can_interrupt::on_receive_tag, - hal::can_message const& p_message) { - hal::print<64>( - *console, "Can message with id = 0x%lX from interrupt!\n", p_message.id); - }); - - hal::print<32>(*console, - "Receiver buffer size = %zu\n", - can_transceiver->receive_buffer().size()); - - constexpr auto allowed_id = 0x111; - can_id_filter->allow(allowed_id); - hal::print<64>( - *console, "๐Ÿ†” Allowing ID [0x%lX] through the filter!\n", allowed_id); - - hal::can_message_finder message_finder(*can_transceiver, 0x111); - - while (true) { - using namespace std::chrono_literals; - hal::can_message standard_message { - .id=0x112, - .extended=false, - .remote_request=false, - .length = 8, - .payload = { - 0xAA, 0xBB, 0xCC, 0xDD, 0xDE, 0xAD, 0xBE, 0xEF, - }, - }; - - hal::can_message standard_message2{ - .id = 0x333, - .length = 0, - }; - - hal::can_message extended_message{ - .id = 0x0123'4567, - .extended = true, - .length = 3, - .payload = { 0xAA, 0xBB, 0xCC }, - }; - - hal::can_message extended_message2 { - .id = 0x0222'0005, - .extended = true, - .length = 3, - .payload = { - 0xAA, 0xBB, 0xCC, - }, - }; - - hal::print(*console, "๐Ÿ“ฎ Sending 4x payloads...\n"); - - try { - can_transceiver->send(standard_message); - can_transceiver->send(standard_message2); - can_transceiver->send(extended_message); - can_transceiver->send(extended_message2); - } catch (hal::resource_unavailable_try_again const&) { - hal::print( - *console, - "โŒ CAN messages are not getting acknowledged by the bus! Trying " - "again...\n"); - } - - hal::delay(*clock, 1s); - - for (auto msg = message_finder.find(); msg.has_value(); - msg = message_finder.find()) { - print_can_message(*console, *msg); - } - } -} diff --git a/demos/applications/dac.cpp b/demos/applications/dac.cpp deleted file mode 100644 index 6973e3f..0000000 --- a/demos/applications/dac.cpp +++ /dev/null @@ -1,41 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include - -#include - -void application() -{ - auto dac = resources::dac(); - auto clock = resources::clock(); - auto console = resources::console(); - while (true) { - using namespace std::literals; - float f1 = 0.0f; - float f2 = 0.5f; - float f3 = 1.0f; - dac->write(f1); - hal::print<32>(*console, "Written %f\n", f1); - hal::delay(*clock, 5s); - dac->write(f2); - hal::print<32>(*console, "Written %f\n", f2); - hal::delay(*clock, 5s); - dac->write(f3); - hal::print<32>(*console, "Written %f\n", f3); - hal::delay(*clock, 5s); - } -} diff --git a/demos/applications/gpio.cpp b/demos/applications/gpio.cpp deleted file mode 100644 index 0e95072..0000000 --- a/demos/applications/gpio.cpp +++ /dev/null @@ -1,36 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -void application() -{ - auto clock = resources::clock(); - auto led = resources::status_led(); - auto button = resources::input_pin(); - - while (true) { - // Checking level for the lpc40xx drivers NEVER generates an error so this - // is fine. - if (button->level()) { - using namespace std::chrono_literals; - led->level(false); - hal::delay(*clock, 200ms); - led->level(true); - hal::delay(*clock, 200ms); - } - } -} diff --git a/demos/applications/i2c.cpp b/demos/applications/i2c.cpp deleted file mode 100644 index 97c5178..0000000 --- a/demos/applications/i2c.cpp +++ /dev/null @@ -1,53 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include - -#include - -void application() -{ - auto clock = resources::clock(); - auto console = resources::console(); - auto i2c = resources::i2c(); - - hal::print(*console, "Starting I2C Probe Demonstration!\n\n"); - hal::print( - *console, - "This application will probe the entire i2c address space looking for a\n" - "response. When it gets one it will print it out. This demonstration \n" - "can be used to identify the addresses of devices on your i2c bus.\n"); - - while (true) { - using namespace std::literals; - - constexpr hal::byte first_i2c_address = 0x08; - constexpr hal::byte last_i2c_address = 0x78; - - hal::print(*console, "I2C devices found: "); - - for (hal::byte address = first_i2c_address; address < last_i2c_address; - address++) { - // This can only fail if the device is not present - if (hal::probe(*i2c, address)) { - hal::print<12>(*console, "0x%02X ", address); - } - } - - hal::print(*console, "\n"); - hal::delay(*clock, 1s); - } -} diff --git a/demos/applications/interrupt_pin.cpp b/demos/applications/interrupt_pin.cpp deleted file mode 100644 index 331303d..0000000 --- a/demos/applications/interrupt_pin.cpp +++ /dev/null @@ -1,35 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -void application() -{ - auto led = resources::status_led(); - auto button = resources::interrupt_pin(); - - led->level(false); - button->configure({}); - - auto handler = [&led]([[maybe_unused]] bool p_level) { - auto previous_state = led->level(); - (void)led->level(!previous_state); - }; - - button->on_trigger(handler); - - while (true) { - continue; - } -} diff --git a/demos/applications/pwm.cpp b/demos/applications/pwm.cpp deleted file mode 100644 index 825b754..0000000 --- a/demos/applications/pwm.cpp +++ /dev/null @@ -1,58 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include - -void application() -{ - using namespace std::chrono_literals; - using namespace hal::literals; - - auto pwm = resources::pwm(); - auto clock = resources::clock(); - auto console = resources::console(); - - while (true) { - pwm->duty_cycle(0.0f); - pwm->frequency(1.0_kHz); - hal::print(*console, "Sweeping duty cycle from 0 to 1 \n"); - hal::delay(*clock, 1s); - float constexpr duty_cycle_step_count = 20; - float const duty_cycle_step = 1 / duty_cycle_step_count; - for (float duty_cycle = 0; duty_cycle < 1; duty_cycle += duty_cycle_step) { - hal::print<64>(*console, ">> Duty: %.2f \n", duty_cycle); - pwm->duty_cycle(duty_cycle); - hal::delay(*clock, 100ms); - } - - pwm->duty_cycle(0.0f); - - hal::print(*console, "Sweeping frequency from 1kHz to 20kHz\n"); - hal::print(*console, ">> pwm Duty Cycle = 50%\n"); - hal::delay(*clock, 1s); - pwm->duty_cycle(1.0f / 2); // 50% duty cycle - - for (float multiplier = 1; multiplier < 20; multiplier++) { - float frequency = 1000 /* Hz */ * multiplier; - pwm->frequency(frequency); - hal::print<64>(*console, ">> Freq: %f Hz\n", frequency); - hal::delay(*clock, 100ms); - } - - hal::print(*console, "\n"); - } -} diff --git a/demos/applications/pwm16.cpp b/demos/applications/pwm16.cpp deleted file mode 100644 index 68c3287..0000000 --- a/demos/applications/pwm16.cpp +++ /dev/null @@ -1,67 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include - -#include - -void application() -{ - using namespace std::chrono_literals; - using namespace hal::literals; - - auto pwm_frequency = resources::pwm_frequency(); - auto pwm_channel = resources::pwm_channel(); - auto console = resources::console(); - auto clock = resources::clock(); - - while (true) { - pwm_channel->duty_cycle(0); - pwm_frequency->frequency(1.0_kHz); - hal::print(*console, - "Sweeping duty cycle from 0% (0x0000) to 100% (0xFFFF)\n"); - hal::print<32>( - *console, ">> pwm Frequency = %" PRIu32 "Hz\n", pwm_channel->frequency()); - hal::delay(*clock, 1s); - auto constexpr duty_cycle_step_count = 20; - hal::u16 const duty_cycle_step = 0xFFFF / duty_cycle_step_count; - for (hal::u32 duty_cycle = 0; duty_cycle < 0xFFFF; - duty_cycle += duty_cycle_step) { - hal::print<64>( - *console, ">> Duty: 0x%04" PRIX32 " / 0xFFFF \n", duty_cycle); - pwm_channel->duty_cycle(duty_cycle); - hal::delay(*clock, 100ms); - } - - pwm_channel->duty_cycle(0); - - hal::print(*console, "Sweeping frequency from 1kHz to 20kHz\n"); - hal::print(*console, ">> pwm Duty Cycle = 50%\n"); - hal::delay(*clock, 1s); - pwm_channel->duty_cycle(0xFFFF / 2); // 50% duty cycle - - for (hal::u32 multiplier = 1; multiplier < 20; multiplier++) { - auto frequency = 1000 /* Hz */ * multiplier; - pwm_frequency->frequency(frequency); - hal::print<64>( - *console, ">> Freq: %" PRIu32 "Hz\n", pwm_channel->frequency()); - hal::delay(*clock, 100ms); - } - - hal::print(*console, "\n"); - } -} diff --git a/demos/applications/resources/README.md b/demos/applications/resources/README.md deleted file mode 100644 index 94f9fd7..0000000 --- a/demos/applications/resources/README.md +++ /dev/null @@ -1,56 +0,0 @@ -# Converting Resources to Code - -## Converting MP3 to mono unsigned pcm - -To unsigned PCM16: - -```bash -ffmpeg -i uniq-BOMBORA.trimmed.mp3 -ar 16000 -ac 1 -f u16le -acodec pcm_u16le uniq-BOMBORA.u16.pcm -``` - -To unsigned PCM8: - -```bash -ffmpeg -i uniq-BOMBORA.trimmed.mp3 -ar 16000 -ac 1 -f u8 -acodec pcm_u8 uniq-BOMBORA.u8.pcm -``` - -To convert the PCM data into a C header file: - -```bash -xxd -i uniq-BOMBORA.u8.pcm > uniq-BOMBORA.u8.pcm.h -xxd -i uniq-BOMBORA.u16.pcm > uniq-BOMBORA.u16.pcm.h -``` - -Finally, we need to add a few things to the header files. - -1. Add an include guard `#pragma once` at the top of each file -2. Make the array an `inline const` in order to coax the compiler into storing - the data in the `.rodata` section (flash memory). -3. Delete the length on the bottom. Its not necessary as the C style array's - length is known at compile time. - -Should look something like this: - -```C++ -#pragma once - -const inline unsigned char uniq_BOMBORA_u8_pcm[] = { - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - // ... -}; -``` - -> [!NOTE] -> PCM is the fully uncompressed representation of the data and as such it will -> take up a lot of flash memory. It may only be possible to fit a very small -> section of music data into the device at a time. diff --git a/demos/applications/resources/uniq-BOMBORA.mp3 b/demos/applications/resources/uniq-BOMBORA.mp3 deleted file mode 100644 index b946b54..0000000 Binary files a/demos/applications/resources/uniq-BOMBORA.mp3 and /dev/null differ diff --git a/demos/applications/resources/uniq-BOMBORA.trimmed.mp3 b/demos/applications/resources/uniq-BOMBORA.trimmed.mp3 deleted file mode 100644 index f514ddb..0000000 Binary files a/demos/applications/resources/uniq-BOMBORA.trimmed.mp3 and /dev/null differ diff --git a/demos/applications/resources/uniq-BOMBORA.u8.pcm b/demos/applications/resources/uniq-BOMBORA.u8.pcm deleted file mode 100644 index 9818c86..0000000 --- a/demos/applications/resources/uniq-BOMBORA.u8.pcm +++ /dev/null @@ -1,68 +0,0 @@ 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0xb9, 0xc2, 0xc1, 0xb5, 0xab, 0x9b, 0x83, 0x6f, 0x6a, 0x75, - 0x7a, 0x6d, 0x51, 0x35, 0x2e, 0x3f, 0x56, 0x68, 0x69, 0x67, 0x6b, 0x71, 0x7a, - 0x8a, 0xa1, 0xb5, 0xbb, 0xba, 0xb6, 0xab, 0x97, 0x82, 0x7c, 0x86, 0x93, 0x8d, - 0x75, 0x58, 0x4b, 0x56, 0x6b, 0x78 -}; diff --git a/demos/applications/semihost.cpp b/demos/applications/semihost.cpp deleted file mode 100644 index 2a8c2c6..0000000 --- a/demos/applications/semihost.cpp +++ /dev/null @@ -1,30 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -void application() -{ - auto clock = resources::clock(); - - std::puts("Starting 'semihost' application..."); - - while (true) { - using namespace std::chrono_literals; - std::puts("Hello, World!"); - hal::delay(*clock, 1s); - } -} diff --git a/demos/applications/spi.cpp b/demos/applications/spi.cpp deleted file mode 100644 index d1927c0..0000000 --- a/demos/applications/spi.cpp +++ /dev/null @@ -1,90 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include - -#include - -void application() -{ - using namespace std::chrono_literals; - using namespace hal::literals; - - auto clock = resources::clock(); - auto console = resources::console(); - auto spi = resources::spi(); - auto chip_select = resources::spi_chip_select(); - - chip_select->level(true); - - hal::print(*console, "Starting SPI Application...\n"); - - while (true) { - using namespace std::literals; - - std::array const payload{ 0xDE, 0xAD, 0xBE, 0xEF }; - std::array buffer{}; - - hal::print(*console, "Write operation\n"); - chip_select->level(false); - hal::write(*spi, payload); - chip_select->level(true); - hal::delay(*clock, 1s); - - hal::print(*console, "Read operation: [ "); - chip_select->level(false); - hal::read(*spi, buffer); - chip_select->level(true); - - for (auto const& byte : buffer) { - hal::print<32>(*console, "0x%02X ", byte); - } - - hal::print(*console, "]\n"); - hal::delay(*clock, 1s); - - hal::print(*console, "Full-duplex transfer\n"); - chip_select->level(false); - spi->transfer(payload, buffer); - chip_select->level(true); - hal::delay(*clock, 1s); - - hal::print(*console, "Half-duplex transfer\n"); - chip_select->level(false); - hal::write_then_read(*spi, payload, buffer); - chip_select->level(true); - hal::delay(*clock, 1s); - - { - std::array read_manufacturer_id{ hal::byte{ 0x9F } }; - std::array id_data{}; - - chip_select->level(false); - hal::delay(*clock, 250ns); // wait at least 250ns - hal::write_then_read(*spi, read_manufacturer_id, id_data, 0xA5); - chip_select->level(true); - - hal::print(*console, "SPI Flash Memory ID info: "); - hal::print(*console, "[ "); - for (auto const& byte : id_data) { - hal::print<32>(*console, "0x%02X ", byte); - } - hal::print(*console, "]\n"); - } - - hal::delay(*clock, 1s); - } -} diff --git a/demos/applications/stream_dac.cpp b/demos/applications/stream_dac.cpp deleted file mode 100644 index d6733c6..0000000 --- a/demos/applications/stream_dac.cpp +++ /dev/null @@ -1,31 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include "resources/uniq-BOMBORA.u8.pcm.hpp" - -void application() -{ - auto dac = resources::stream_dac(); - - while (true) { - // Change to 8'000.0f for LOFI - dac->write({ - .sample_rate = 16'000.0f, - .data = uniq_BOMBORA_u8_pcm, - }); - } -} diff --git a/demos/applications/timer.cpp b/demos/applications/timer.cpp deleted file mode 100644 index 9c8513c..0000000 --- a/demos/applications/timer.cpp +++ /dev/null @@ -1,113 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include - -#include -#include - -void application() -{ - using namespace std::chrono_literals; - - auto clock = resources::clock(); - auto console = resources::console(); - auto timed_interrupt = resources::timed_interrupt(); - - hal::print(*console, "Callback timer demo starting...\n\n"); - - hal::u64 start_timer = 0; - hal::u64 stop_timer = 0; - bool volatile interrupt_toggled = false; - auto cpu_frequency = static_cast(clock->frequency()); - - struct interrupt_capture_variables - { - hal::v5::strong_ptr clock; - hal::v5::strong_ptr console; - hal::u64& stop_timer; - bool volatile& interrupt_toggled; - }; - - auto capture_vars = hal::v5::make_strong_ptr( - resources::driver_allocator(), - clock, - console, - stop_timer, - interrupt_toggled); - - auto func_to_call = [capture_vars]() { - capture_vars->stop_timer = capture_vars->clock->uptime(); - hal::print<128>(*capture_vars->console, "\nCallback function executed!\n"); - capture_vars->interrupt_toggled = true; - }; - - hal::u64 accumulator = 0; - for (int i = 0; i < 10; i++) { - start_timer = clock->uptime(); - timed_interrupt->schedule(func_to_call, hal::time_duration(10s)); - stop_timer = clock->uptime(); - timed_interrupt->cancel(); - accumulator += (stop_timer - start_timer); - } - accumulator /= 10; - hal::print<128>(*console, - "Average amount of CC to schedule a callback is:%" PRIu64 - "\n\n", - accumulator); - - hal::print(*console, "Scheduling callback function to occur in 250ms...\n"); - start_timer = clock->uptime(); - timed_interrupt->schedule(func_to_call, 250ms); - while (interrupt_toggled == false) { - hal::print(*console, "Waiting...\n"); - hal::delay(*clock, 50ms); - } - hal::u64 scale_factor = 1'000'000; - auto time_elapsed = (stop_timer - start_timer) * scale_factor / cpu_frequency; - hal::print<128>(*console, "Time Elapsed:%" PRIu64 "us\n", time_elapsed); - - hal::delay(*clock, 1s); - hal::print(*console, "\nTesting is_scheduled() and cancel() function...\n"); - timed_interrupt->schedule(func_to_call, hal::time_duration(10s)); - hal::delay(*clock, 500ms); - auto is_scheduled = timed_interrupt->is_running(); - auto is_scheduled_string = (is_scheduled) ? "True" : "False"; - hal::print<128>( - *console, "Callback scheduled? (Expected True): %s\n", is_scheduled_string); - timed_interrupt->cancel(); - is_scheduled = timed_interrupt->is_running(); - is_scheduled_string = (is_scheduled) ? "True" : "False"; - hal::print<128>(*console, - "Callback scheduled? (Expected False): %s\n", - is_scheduled_string); - - hal::delay(*clock, 1000ms); - hal::print( - *console, - "\nTesting overwriting callback functionality (Should take 500ms)...\n"); - interrupt_toggled = false; - timed_interrupt->schedule(func_to_call, hal::time_duration(10s)); - start_timer = clock->uptime(); - timed_interrupt->schedule(func_to_call, hal::time_duration(500ms)); - while (interrupt_toggled == false) { - hal::print(*console, "Waiting...\n"); - hal::delay(*clock, 50ms); - } - time_elapsed = (stop_timer - start_timer) * scale_factor / cpu_frequency; - hal::print<128>(*console, "Time Elapsed:%" PRIu64 "us\n", time_elapsed); -} diff --git a/demos/applications/uart.cpp b/demos/applications/uart.cpp deleted file mode 100644 index 5a53892..0000000 --- a/demos/applications/uart.cpp +++ /dev/null @@ -1,43 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include - -#include - -void application() -{ - using namespace std::chrono_literals; - using namespace hal::literals; - - auto clock = resources::clock(); - auto console = resources::console(); - - while (true) { - using namespace std::chrono_literals; - using namespace std::string_view_literals; - - std::string_view message = "Hello, World!\n"; - hal::print(*console, message); - // Echo anything received - std::array read_buffer; - console->write(console->read(read_buffer).data); - - hal::delay(*clock, 1s); - } -} diff --git a/demos/applications/usb_cdc_raw.cpp b/demos/applications/usb_cdc_raw.cpp deleted file mode 100644 index cb81644..0000000 --- a/demos/applications/usb_cdc_raw.cpp +++ /dev/null @@ -1,579 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -using ctrl_receive_tag = hal::v5::usb::control_endpoint::on_receive_tag; -using bulk_receive_tag = hal::v5::usb::bulk_out_endpoint::on_receive_tag; - -bool host_command_available = false; - -void control_endpoint_handler(ctrl_receive_tag) -{ - host_command_available = true; -} - -void write_string_descriptor(hal::v5::usb::control_endpoint& p_control_endpoint, - hal::u8 p_descriptor_index, // NOLINT - std::size_t p_length, - std::span p_strings) -{ - // Our span of strings is zero indexed and p_descriptor_index is 1 indexed - // with respect to the p_string. - p_descriptor_index -= 1; - if (p_descriptor_index >= p_strings.size()) { - throw std::out_of_range("OOR"); - } - - auto const str = p_strings[p_descriptor_index]; - auto str_span = hal::as_bytes(str); - - std::array const header = { - static_cast(str_span.size() + 2), - 0x03, - }; - - auto const header_write_length = std::min(header.size(), p_length); - - p_control_endpoint.write( - hal::v5::make_scatter_bytes(std::span(header).first(header_write_length))); - p_length -= header_write_length; // deduce the amount written - - auto const string_write_length = std::min(str_span.size(), p_length); - if (string_write_length > 0) { - str_span = str_span.first(string_write_length); - p_control_endpoint.write(hal::v5::make_scatter_bytes(str_span)); - } - - p_control_endpoint.write({}); -} - -void application() -{ - using namespace hal::literals; - - auto clock = resources::clock(); - auto console = resources::console(); - - hal::print(*console, "Staring USB CDC application...\n"); - - using namespace std::chrono_literals; - - auto control_endpoint = resources::usb_control_endpoint(); - auto serial_data_ep_out = resources::usb_bulk_out_endpoint1(); - auto serial_data_ep_in = resources::usb_bulk_in_endpoint1(); - auto status_ep_out = resources::usb_interrupt_out_endpoint1(); - auto status_ep_in = resources::usb_interrupt_in_endpoint1(); - - hal::print(*console, "ctrl\n"); - - control_endpoint->on_receive(control_endpoint_handler); - hal::print(*console, "ctrl -> on_receive\n"); - - // Device Descriptor (18 bytes) - // NOLINTNEXTLINE - uint8_t const device_descriptor[] = { - 0x12, // bLength (18 bytes) - 0x01, // bDescriptorType (Device) - 0x00, 0x02, // bcdUSB (2.0) - 0x02, // bDeviceClass (0x02 CDC) - 0x02, // bDeviceSubClass (0x02 ACM) - 0x00, // bDeviceProtocol - 16, // bMaxPacketSize0 (16 bytes) - 0xEF, 0xBE, // idVendor (0xBEEF) - 0xAD, 0xDE, // idProduct (0xDEAD) - 0x00, 0x01, // bcdDevice (1.0) - 0x01, // iManufacturer (String #1) - 0x02, // iProduct (String #2) - 0x03, // iSerialNumber (String #3) - 0x01 // bNumConfigurations - }; - - // NOLINTNEXTLINE - hal::u8 config_descriptor[] = { - // Configuration Descriptor - 0x09, // bLength - 0x02, // bDescriptorType (Configuration) - 75, - 0x00, // wTotalLength (75 bytes) - 0x02, // bNumInterfaces - 0x01, // bConfigurationValue - 0x00, // iConfiguration (String Index) - 0x80, // bmAttributes (Bus Powered) - 0x32, // bMaxPower (100mA) - - // Interface Association Descriptor - 0x08, // bLength - 0x0B, // bDescriptorType (Interface Association) - 0x00, // bFirstInterface - 0x02, // bInterfaceCount - 0x02, // bFunctionClass (CDC) - 0x02, // bFunctionSubClass (Abstract Control Model) - 0x01, // bFunctionProtocol - 0x00, // iFunction (String Index) - - // Interface Descriptor (Control) - 0x09, // bLength - 0x04, // bDescriptorType (Interface) - 0x00, // bInterfaceNumber - 0x00, // bAlternateSetting - 0x01, // bNumEndpoints - 0x02, // bInterfaceClass (CDC) - 0x02, // bInterfaceSubClass (Abstract Control Model) - 0x01, // bInterfaceProtocol (AT Commands V.250) - 0x00, // iInterface (String Index) - - // CDC Header Functional Descriptor - 0x05, // bLength - 0x24, // bDescriptorType (CS_INTERFACE) - 0x00, // bDescriptorSubtype (Header) - 0x10, - 0x01, // bcdCDC (1.10) - - // CDC ACM Functional Descriptor - 0x04, // bLength - 0x24, // bDescriptorType (CS_INTERFACE) - 0x02, // bDescriptorSubtype (Abstract Control Management) - 0x02, // bmCapabilities - - // CDC Union Functional Descriptor - 0x05, // bLength - 0x24, // bDescriptorType (CS_INTERFACE) - 0x06, // bDescriptorSubtype (Union) - 0x00, // bControlInterface - 0x01, // bSubordinateInterface0 - - // CDC Call Management Functional Descriptor - 0x05, // bLength - 0x24, // bDescriptorType (CS_INTERFACE) - 0x01, // bDescriptorSubtype (Call Management) - 0x00, // bmCapabilities - 0x01, // bDataInterface - - // Endpoint Descriptor (Control IN) - 0x07, // bLength - 0x05, // bDescriptorType (Endpoint) - status_ep_in->info().number, // bEndpointAddress (IN 2) - 0x03, // bmAttributes (Interrupt) - static_cast(status_ep_in->info().size), - 0x00, // wMaxPacketSize 16 - 0x10, // bInterval (16 ms) - - // Interface Descriptor (Data) - 0x09, // bLength - 0x04, // bDescriptorType (Interface) - 0x01, // bInterfaceNumber - 0x00, // bAlternateSetting - 0x02, // bNumEndpoints - 0x0A, // bInterfaceClass (CDC-Data) - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0x00, // iInterface (String Index) - - // Endpoint Descriptor (Data OUT) - 0x07, // bLength - 0x05, // bDescriptorType (Endpoint) - serial_data_ep_out->info().number, // bEndpointAddress (OUT + 1) - 0x02, // bmAttributes (Bulk) - static_cast(serial_data_ep_out->info().size), - 0x00, // wMaxPacketSize 16 - 0x00, // bInterval (Ignored for Bulk) - - // Endpoint Descriptor (Data IN) - 0x07, // bLength - 0x05, // bDescriptorType (Endpoint) - serial_data_ep_in->info().number, // bEndpointAddress (IN + 1) - 0x02, // bmAttributes (Bulk) - static_cast(serial_data_ep_in->info().size), - 0x00, // wMaxPacketSize 16 - 0x00 // bInterval (Ignored for Bulk) - }; - - hal::print<64>(*console, - ">>>> status_ep_in->info().number = 0x%02X\n", - status_ep_in->info().number); - hal::print<64>(*console, - ">>>> status_ep_in->info().size = %d\n", - status_ep_in->info().size); - hal::print<64>(*console, - ">>>> serial_data_ep_out->info().number = 0x%02X\n", - serial_data_ep_out->info().number); - hal::print<64>(*console, - ">>>> serial_data_ep_out->info().size = %d\n", - serial_data_ep_out->info().size); - hal::print<64>(*console, - ">>>> serial_data_ep_in->info().number = 0x%02X\n", - serial_data_ep_in->info().number); - hal::print<64>(*console, - ">>>> serial_data_ep_in->info().size = %d\n", - serial_data_ep_in->info().size); - - // String Descriptor 0 (Language ID) - std::array const lang_descriptor{ - 0x04, // bLength - 0x03, // bDescriptorType (String) - 0x09, // wLANGID[0] (0x0409: English-US) - 0x04, // wLANGID[0] (0x0409: English-US) - }; - - using namespace std::string_view_literals; - - constexpr auto manufacturer_str = u"libhal inc"sv; - constexpr auto product_name_str = u"libhal USB device"sv; - constexpr auto serial_str = u"ab01"sv; - std::array strings = { - manufacturer_str, - product_name_str, - serial_str, - }; - - // Example notification with DSR and DCD set - // NOLINTNEXTLINE - [[maybe_unused]] static uint8_t constexpr serial_state_notification[] = { - 0xA1, // bmRequestType (Device to Host | Class | Interface) - 0x20, // bNotification (SERIAL_STATE) - 0x00, 0x00, // wValue (zero) - 0x00, 0x00, // wIndex (Interface number) - 0x02, 0x00, // wLength (2 bytes of data) - 0x03, 0x00 // serialState (DCD | DSR = 0x03) - }; - - bool serial_data_available = false; - - serial_data_ep_out->on_receive([&serial_data_available](bulk_receive_tag) { - serial_data_available = true; - }); - - // CDC Class-Specific Request Codes - constexpr hal::u8 cdc_set_line_coding = 0x20; - constexpr hal::u8 cdc_get_line_coding = 0x21; - constexpr hal::u8 cdc_set_control_line_state = 0x22; - constexpr hal::u8 cdc_send_break = 0x23; - - // Line Coding Structure (7 bytes) - static auto line_coding = std::to_array({ - 0x00, - 0x96, - 0x00, - 0x00, // Baud rate: 38400 (Little Endian) - 0x00, // Stop bits: 1 - 0x00, // Parity: None - 0x08 // Data bits: 8 - }); - - // Wait for the message number to increment - auto deadline = hal::future_deadline(*clock, 1s); - bool port_connected = false; - - auto handle_serial = [&serial_data_available, - &port_connected, - deadline, - &serial_data_ep_out, - &serial_data_ep_in, - &console, - &clock]() mutable { - if (serial_data_available) { - // Drain endpoint of content... - serial_data_available = false; - // NOTE: Pulling out only 3 bytes isn't for memory reduction but to see - // how well the read() API pulls data out from the endpoint memory. This - // was used to find bugs with odd numbered buffer sizes. - std::array buffer{}; - auto data_received = - serial_data_ep_out->read(hal::v5::make_writable_scatter_bytes(buffer)); - - hal::print(*console, "["); - while (data_received != 0) { - hal::write(*console, - std::span(buffer).first(data_received), - hal::never_timeout()); - data_received = serial_data_ep_out->read( - hal::v5::make_writable_scatter_bytes(buffer)); - } - hal::print(*console, "]"); - } - // Send a '.' every second - if (deadline < clock->uptime()) { - using namespace std::string_view_literals; - try { - hal::v5::write_and_flush(*serial_data_ep_in, hal::as_bytes("."sv)); - hal::print(*console, ">"); - deadline = hal::future_deadline(*clock, 1s); - } catch (hal::timed_out const&) { - hal::print(*console, - "\n\n\033[48;5;9mEP TIMEOUT! PORT DISCONNECTED!\033[0m\n\n"); - port_connected = false; - return; - } - } - }; - - hal::u8 configuration = 0; - - // Example handler for CDC class-specific setup packets - auto handle_cdc_setup = [&port_connected, &control_endpoint, &console]( - hal::u8 bmRequestType, // NOLINT - hal::u8 bRequest, // NOLINT - hal::u16 wValue // NOLINT - ) -> bool { - switch (bRequest) { - case cdc_get_line_coding: - if (bmRequestType == 0xA1) { // Direction: Device to Host - // Send current line coding - hal::v5::write_and_flush(*control_endpoint, line_coding); - hal::print(*console, "cdc_get_line_coding\n"); - return true; - } - break; - - case cdc_set_line_coding: - if (bmRequestType == 0x21) { // Direction: Host to Device - while (true) { - if (not host_command_available) { // nothing received - continue; - } - - std::array rx_buffer; - auto bytes_read = control_endpoint->read( - hal::v5::make_writable_scatter_bytes(rx_buffer)); - if (bytes_read == 0) { - continue; - } - auto host_command = std::span(rx_buffer).first(bytes_read); - host_command_available = false; - control_endpoint->write({}); - - hal::print<64>(*console, "{{ "); - for (auto const byte : host_command) { - hal::print<8>(*console, "0x%" PRIx8 ", ", byte); - } - hal::print<64>(*console, "}}\n"); - std::copy_n( - host_command.begin(), line_coding.size(), line_coding.begin()); - break; - } - // NOTE: there is no proper location to decide when a port is - // connected. - port_connected = true; - hal::print(*console, "cdc_set_line_coding+\n"); - return true; - } - break; - - case cdc_set_control_line_state: - if (bmRequestType == 0x21) { // Direction: Host to Device - // wValue contains the control signals: - // Bit 0: DTR state - // Bit 1: RTS state - bool const dtr = wValue & 0x01; - bool const rts = wValue & 0x02; - // Handle control line state change - // Most basic implementation just returns success - control_endpoint->write({}); - hal::print<32>(*console, "DTR = %d, RTS = %d\n", dtr, rts); - return true; - } - break; - - case cdc_send_break: - if (bmRequestType == 0x21) { // Direction: Host to Device - // wValue contains break duration in milliseconds - // Most basic implementation just returns success - control_endpoint->write({}); - hal::print(*console, "SEND_BREAK\n"); - return true; - } - break; - default: - return false; - } - return false; // Command not handled - }; - - auto command_count = 0; - - std::array, 2>, 2> - map = { - std::array, 2>{ - serial_data_ep_out, - serial_data_ep_in, - }, - { - status_ep_out, - status_ep_in, - }, - }; - - control_endpoint->connect(true); - hal::print(*console, "connect\n"); - - while (true) { - if (configuration == 1 && port_connected) { - handle_serial(); - } - - if (not host_command_available) { - continue; - } - - std::array rx_buffer; - auto bytes_read = - control_endpoint->read(hal::v5::make_writable_scatter_bytes(rx_buffer)); - if (bytes_read == 0) { - host_command_available = false; - continue; - } - - auto buffer = std::span(rx_buffer).first(bytes_read); - - auto print_buffer = [&buffer, &console]() { - for (auto const byte : buffer) { - hal::print<8>(*console, "0x%" PRIx8 ", ", byte); - } - }; - - // NOLINTBEGIN(readability-identifier-naming) - // Extract bmRequestType and bRequest - hal::u8 const bmRequestType = buffer[0]; - hal::u8 const bRequest = buffer[1]; - std::size_t const wValue = (buffer[3] << 8) | buffer[2]; - std::size_t const wIndex = (buffer[5] << 8) | buffer[4]; - std::size_t const wLength = (buffer[7] << 8) | buffer[6]; - // NOLINTEND(readability-identifier-naming) - - try { - if (bmRequestType == 0x00 && bRequest == 0x05) { - control_endpoint->write({}); - control_endpoint->set_address(buffer[2]); - hal::print<32>(*console, "ZLP+SET_ADDR[%d]\n", buffer[2]); - } else if (bmRequestType == 0x00 && bRequest == 0x09) { - hal::u8 const descriptor_index = buffer[2]; - // SET_CONFIGURATION - configuration = descriptor_index; - serial_data_ep_out->reset(); - status_ep_out->reset(); - control_endpoint->write({}); - hal::print<16>(*console, "SC%" PRIu8 "\n", descriptor_index); - } else if (bmRequestType == 0x80) { // Device-to-host - if (bRequest == 0x06) { // GET_DESCRIPTOR - hal::u8 const descriptor_index = buffer[2]; - hal::u8 const descriptor_type = buffer[3]; - switch (descriptor_type) { - case 0x01: { // Device Descriptor - hal::print<16>(*console, "DD%" PRIu16 "\n", wLength); - hal::v5::write_and_flush( - *control_endpoint, std::span(device_descriptor).first(wLength)); - hal::print(*console, "DD+\n"); - break; - } - case 0x02: // Configuration Descriptor - { - hal::print<32>(*console, "CD%" PRIu16 "\n", wLength); - hal::v5::write_and_flush( - *control_endpoint, std::span(config_descriptor).first(wLength)); - hal::print(*console, "CD+\n"); - break; - } - case 0x03: { // String Descriptor - hal::print<16>(*console, - "S%" PRIu8 ":%" PRIu16 "\n", - descriptor_index, - wLength); - if (descriptor_index == 0) { - auto const first = - std::min(lang_descriptor.size(), size_t{ wLength }); - auto const payload_span = - std::span(lang_descriptor).first(first); - hal::v5::write_and_flush(*control_endpoint, payload_span); - } else { - write_string_descriptor( - *control_endpoint, descriptor_index, wLength, strings); - } - hal::print(*console, "S+\n"); - break; - } - default: - hal::print(*console, "bmRequestType?\n"); - break; - } - } - } else if (hal::bit_extract(bmRequestType) == - 0x1) { - // Class-specific request - auto const handled = handle_cdc_setup(bmRequestType, bRequest, wValue); - if (handled) { - hal::print(*console, "CDC-CLASS+\n"); - } else { - hal::print(*console, "CDC-CLASS!\n"); - } - } else if (bmRequestType == 0x02) { - - // Standard USB request codes - constexpr hal::u8 get_status = 0x00; - constexpr hal::u8 clear_feature = 0x01; - constexpr hal::u8 set_feature = 0x03; - - auto const ep_select = wIndex & 0xF; - auto const direction = hal::bit_extract(wIndex); - auto& selected_ep = *map.at(ep_select - 1).at(direction); - - switch (bRequest) { - case get_status: - hal::v5::write_and_flush( - *control_endpoint, - std::to_array({ selected_ep.info().stalled, 0 })); - hal::print<16>( - *console, "STALLED: 0x%02" PRIx8, selected_ep.info().stalled); - break; - case clear_feature: - selected_ep.stall(false); - control_endpoint->write({}); - hal::print(*console, "CLEAR"); - break; - case set_feature: - hal::print(*console, "SET_FEATURE"); - break; - default: - hal::print<16>(*console, "DEFAULT:0x%02X", bRequest); - break; - } - hal::print<32>( - *console, " :EP[%" PRIu8 ", %d]\n", ep_select, direction); - } - - hal::print<16>(*console, "COMMAND[%zu]: {", command_count++); - print_buffer(); - hal::print(*console, "}\n\n"); - } catch (hal::timed_out const&) { - hal::print(*console, "EP write operation timed out!\n"); - } - } -} diff --git a/demos/applications/watchdog.cpp b/demos/applications/watchdog.cpp deleted file mode 100644 index d86c4c1..0000000 --- a/demos/applications/watchdog.cpp +++ /dev/null @@ -1,59 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -#include -#include -#include -#include -#include - -#include - -void application() -{ - using namespace std::chrono_literals; - using namespace hal::literals; - - auto console = resources::console(); - auto watchdog = resources::watchdog(); - constexpr auto wait_time = 5s; - - if (watchdog->check_flag()) { - hal::print(*console, "Reset by watchdog\n"); - watchdog->clear_flag(); - } else { - hal::print(*console, "Non-watchdog reset\n"); - } - - try { - watchdog->set_countdown_time(wait_time); - watchdog->start(); - } catch (hal::operation_not_supported e) { - hal::print(*console, "invalid time\n"); - } - - hal::print(*console, "Type somehting into the console to pet the watchdog\n"); - while (true) { - std::array read_buffer; - auto read = console->read(read_buffer).data; - if (!read.empty()) { - hal::print(*console, "woof!\n"); - watchdog->reset(); - } - } -} diff --git a/demos/applications/zero_copy_serial.cpp b/demos/applications/zero_copy_serial.cpp deleted file mode 100644 index c2fbdda..0000000 --- a/demos/applications/zero_copy_serial.cpp +++ /dev/null @@ -1,115 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include - -#include -#include - -/** - * @ingroup Serial - * @brief Write data to serial buffer and drop return value - * - * Only use this with serial ports with infallible write operations, meaning - * they will never return an error result. - * - * @tparam byte_array_t - data array type - * @param p_serial - serial port to write data to - * @param p_data - data to be sent over the serial port - */ -template -void print(hal::zero_copy_serial& p_serial, byte_array_t&& p_data) -{ - p_serial.write(hal::as_bytes(p_data)); -} - -/** - * @ingroup Serial - * @brief Write formatted string data to serial buffer and drop return value - * - * Uses snprintf internally and writes to a local statically allocated an array. - * This function will never dynamically allocate like how standard std::printf - * does. - * - * This function does NOT include the NULL character when transmitting the data - * over the serial port. - * - * @tparam buffer_size - Size of the buffer to allocate on the stack to store - * the formatted message. - * @tparam Parameters - printf arguments - * @param p_serial - serial port to write data to - * @param p_format - printf style null terminated format string - * @param p_parameters - printf arguments - */ -template -void print(hal::zero_copy_serial& p_serial, - char const* p_format, - Parameters... p_parameters) -{ - static_assert(buffer_size > 2); - constexpr int unterminated_max_string_size = - static_cast(buffer_size) - 1; - - std::array buffer{}; - int length = - std::snprintf(buffer.data(), buffer.size(), p_format, p_parameters...); - - if (length > unterminated_max_string_size) { - // Print out what was able to be written to the buffer - length = unterminated_max_string_size; - } - - p_serial.write(hal::as_bytes(buffer).first(length)); -} - -void application() -{ - using namespace std::chrono_literals; - using namespace hal::literals; - - auto clock = resources::clock(); - auto console = resources::zero_copy_serial(); - - auto previous_cursor = console->receive_cursor(); - - while (true) { - using namespace std::chrono_literals; - using namespace std::string_view_literals; - - std::string_view message = "Hello, World!\n"; - print(*console, message); - - auto const new_cursor = console->receive_cursor(); - print<64>(*console, "cursor = %zu\n", new_cursor); - - hal::usize byte_count = 0; - if (new_cursor < previous_cursor) { - byte_count = console->receive_buffer().size() - new_cursor; - // Echo anything received - console->write( - console->receive_buffer().subspan(previous_cursor, byte_count)); - previous_cursor = 0; - } else { - byte_count = new_cursor - previous_cursor; - // Echo anything received - console->write( - console->receive_buffer().subspan(previous_cursor, byte_count)); - previous_cursor = new_cursor; - } - - hal::delay(*clock, 1s); - } -} diff --git a/demos/captures/lpc4078_spi.sal b/demos/captures/lpc4078_spi.sal deleted file mode 100644 index 3bea7ae..0000000 Binary files a/demos/captures/lpc4078_spi.sal and /dev/null differ diff --git a/demos/conanfile.py b/demos/conanfile.py deleted file mode 100644 index 9c1bca4..0000000 --- a/demos/conanfile.py +++ /dev/null @@ -1,40 +0,0 @@ -#!/usr/bin/python -# -# Copyright 2024 - 2025 Khalil Estell and the libhal contributors -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -import os - -from conan import ConanFile -from conan.tools.cmake import CMake - -class demos(ConanFile): - python_requires = "libhal-bootstrap/[>=4.3.0 <5]" - python_requires_extend = "libhal-bootstrap.demo" - - def requirements(self): - self.requires("libhal-arm-mcu/latest") - self.requires("minimp3/cci.20211201") - - # This is kinda sketch, but needs to be done manually until https://github.com/conan-io/conan/issues/13372 - # gets implemented - def build(self): - cmake = CMake(self) - defs = { - "CMAKE_ASM_FLAGS_INIT": "-mcpu=cortex-m33 -mfloat-abi=soft", - "PICO_BOARD": "rp2350_micromod", - "PICO_CXX_ENABLE_EXCEPTIONS": "1" - } - cmake.configure(variables = defs) - cmake.build() diff --git a/demos/flash.sh b/demos/flash.sh deleted file mode 100755 index 645e735..0000000 --- a/demos/flash.sh +++ /dev/null @@ -1,11 +0,0 @@ -#!/usr/bin/sh - -set -e - -BUILDDIR=build/rp2350-arm-s/RelWithDebInfo -source $BUILDDIR/generators/conanbuild.sh - -picotool uf2 convert $BUILDDIR/$1.elf $BUILDDIR/$1.uf2 -picotool load $BUILDDIR/$1.uf2 -f -sleep 1 -plink -serial /dev/ttyACM0 -sercfg 115200,8,1,n,X diff --git a/demos/main.cpp b/demos/main.cpp deleted file mode 100644 index 3701ebc..0000000 --- a/demos/main.cpp +++ /dev/null @@ -1,95 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -#include -#include -#include -#include - -#include "resource_list.hpp" - -[[noreturn]] void terminate_handler() noexcept -{ - - // spin here forever - while (true) { - continue; - } -} - -int main() -{ - hal::set_terminate(terminate_handler); - - try { - application(); - } catch (hal::bad_optional_ptr_access const& e) { - auto console = resources::console(); - hal::print(*console, - "A resource required by the application was not" - "available!\n" - "Calling terminate!\n"); - - } // Allow any other exceptions to terminate the application - - std::terminate(); -} - -// Override global new operator -void* operator new(std::size_t) -{ - std::terminate(); -} - -// Override global new[] operator -void* operator new[](std::size_t) -{ - std::terminate(); -} - -void* operator new(unsigned int, std::align_val_t) -{ - std::terminate(); -} - -// Override global delete operator -void operator delete(void*) noexcept -{ -} - -// Override global delete[] operator -void operator delete[](void*) noexcept -{ -} - -// Optional: Override sized delete operators (C++14 and later) -void operator delete(void*, std::size_t) noexcept -{ -} - -void operator delete[](void*, std::size_t) noexcept -{ -} - -void operator delete[](void*, std::align_val_t) noexcept -{ -} - -void operator delete(void*, std::align_val_t) noexcept -{ -} diff --git a/demos/platforms/lpc4074.cpp b/demos/platforms/lpc4074.cpp deleted file mode 100644 index 4025f32..0000000 --- a/demos/platforms/lpc4074.cpp +++ /dev/null @@ -1,2 +0,0 @@ -// NOLINTNEXTLINE(bugprone-suspicious-include) -#include "lpc4078.cpp" diff --git a/demos/platforms/lpc4078.cpp b/demos/platforms/lpc4078.cpp deleted file mode 100644 index 6671b63..0000000 --- a/demos/platforms/lpc4078.cpp +++ /dev/null @@ -1,275 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -namespace resources { -using namespace hal::literals; - -std::pmr::polymorphic_allocator<> driver_allocator() -{ - static std::array driver_memory{}; - static std::pmr::monotonic_buffer_resource resource( - driver_memory.data(), - driver_memory.size(), - std::pmr::null_memory_resource()); - return &resource; -} - -hal::v5::optional_ptr clock_ptr; -hal::v5::strong_ptr clock() -{ - if (not clock_ptr) { - clock_ptr = hal::v5::make_strong_ptr( - driver_allocator(), - hal::lpc40::get_frequency(hal::lpc40::peripheral::cpu)); - } - return clock_ptr; -} -hal::v5::strong_ptr adc() -{ - return hal::v5::make_strong_ptr( - resources::driver_allocator(), hal::channel<4>); -} -hal::v5::strong_ptr console() -{ - static std::array uart0_buffer{}; - return hal::v5::make_strong_ptr(driver_allocator(), - 0, - uart0_buffer, - hal::serial::settings{ - .baud_rate = 115200, - }); -} - -hal::v5::optional_ptr led_ptr; -hal::v5::strong_ptr status_led() -{ - if (not led_ptr) { - led_ptr = hal::v5::make_strong_ptr( - driver_allocator(), 1, 10); - } - return led_ptr; -} - -hal::v5::strong_ptr i2c() -{ - return hal::v5::make_strong_ptr(driver_allocator(), - 2, - hal::i2c::settings{ - .clock_rate = 100.0_kHz, - }); -} - -hal::v5::strong_ptr pwm() -{ - return hal::v5::make_strong_ptr( - resources::driver_allocator(), 1, 6); -} - -hal::v5::strong_ptr can_transceiver() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr can_bus_manager() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr can_identifier_filter() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr can_interrupt() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr spi() -{ - return hal::v5::make_strong_ptr(driver_allocator(), 2); -} -hal::v5::strong_ptr spi_chip_select() -{ - return hal::v5::make_strong_ptr( - driver_allocator(), 1, 8); -} -hal::v5::strong_ptr stream_dac() -{ - return hal::v5::make_strong_ptr( - driver_allocator()); -} -hal::v5::strong_ptr input_pin() -{ - return hal::v5::make_strong_ptr( - driver_allocator(), 0, 29); -} -hal::v5::strong_ptr interrupt_pin() -{ - return hal::v5::make_strong_ptr( - driver_allocator(), 0, 29); -} - -hal::v5::strong_ptr timed_interrupt() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr pwm_channel() -{ - throw hal::operation_not_supported(nullptr); -} -hal::v5::strong_ptr pwm_frequency() -{ - throw hal::operation_not_supported(nullptr); -} -hal::v5::strong_ptr dac() -{ - return hal::v5::make_strong_ptr(driver_allocator()); -} -class lpc4078_watchdog : public custom::watchdog -{ - void start() override - { - throw hal::operation_not_supported(nullptr); - }; - void reset() override - { - throw hal::operation_not_supported(nullptr); - } - void set_countdown_time(hal::time_duration) override - { - throw hal::operation_not_supported(nullptr); - } - bool check_flag() override - { - throw hal::operation_not_supported(nullptr); - } - void clear_flag() override - { - throw hal::operation_not_supported(nullptr); - } -}; - -hal::v5::strong_ptr watchdog() -{ - return hal::v5::make_strong_ptr(driver_allocator()); -} - -[[noreturn]] void terminate_handler() noexcept -{ - if (not led_ptr && not clock_ptr) { - // spin here until debugger is connected - while (true) { - continue; - } - } - - // Otherwise, blink the led in a pattern - auto status_led = resources::status_led(); - auto clock = resources::clock(); - - while (true) { - using namespace std::chrono_literals; - status_led->level(false); - hal::delay(*clock, 100ms); - status_led->level(true); - hal::delay(*clock, 100ms); - status_led->level(false); - hal::delay(*clock, 100ms); - status_led->level(true); - hal::delay(*clock, 1000ms); - } -} - -hal::v5::strong_ptr usb_control_endpoint() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr -usb_interrupt_in_endpoint1() -{ - throw hal::operation_not_supported(nullptr); -} -hal::v5::strong_ptr -usb_interrupt_out_endpoint1() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr -usb_interrupt_in_endpoint2() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr -usb_interrupt_out_endpoint2() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr usb_bulk_in_endpoint1() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr usb_bulk_out_endpoint1() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr usb_bulk_in_endpoint2() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr usb_bulk_out_endpoint2() -{ - throw hal::operation_not_supported(nullptr); -} - -} // namespace resources - -void initialize_platform() -{ - using namespace hal::literals; - std::set_terminate(resources::terminate_handler); - hal::lpc40::maximum(12.0_MHz); -} diff --git a/demos/platforms/rp2350-arm-s.cpp b/demos/platforms/rp2350-arm-s.cpp deleted file mode 100644 index c6379a0..0000000 --- a/demos/platforms/rp2350-arm-s.cpp +++ /dev/null @@ -1,156 +0,0 @@ -#include "resource_list.hpp" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -namespace rp = hal::rp; - -namespace resources { -namespace h5 = hal::v5; -static std::array buffer = {}; -std::pmr::monotonic_buffer_resource memory(buffer.data(), - buffer.size(), - std::pmr::null_memory_resource()); - -std::pmr::polymorphic_allocator<> driver_allocator() -{ - return &memory; -} -template -using opt = h5::optional_ptr; - -template -using sptr = h5::strong_ptr; - -opt clk; -sptr clock() -{ - if (not clk) { - clk = h5::make_strong_ptr(&memory); - } - return clk; -} - -opt out; -sptr console() -{ - if (not out) { - out = h5::make_strong_ptr(&memory); - } - return out; -} - -opt led; -sptr status_led() -{ - if (not led) { - // Actually for adafruit board. Change once micromods arrive. - led = h5::make_strong_ptr(&memory, hal::pin<46>); - } - return led; -} - -opt adc0; -sptr adc() -{ - if (not adc0) { - adc0 = h5::make_strong_ptr(&memory, hal::pin<40>); - } - return adc0; -} - -opt g0; -sptr input_pin() -{ - if (not g0) { - g0 = h5::make_strong_ptr(&memory, hal::pin<0>); - } - return g0; -} - -opt i2c0; -sptr i2c() -{ - if (not i2c0) { - i2c0 = h5::make_strong_ptr( - &memory, hal::pin<16>, hal::pin<17>, hal::bus<0>); - } - return i2c0; -} - -opt g1; -hal::callback do_nothing = [](bool) {}; -sptr interrupt_pin() -{ - if (not g1) { - g1 = - h5::make_strong_ptr(&memory, hal::pin<1>, do_nothing); - } - return g1; -} - -// TODO: add timer -sptr timed_interrupt(); - -opt slice; -opt pwm_pin; - -sptr pwm_frequency() -{ - if (not slice) { - slice = h5::make_strong_ptr>(&memory, hal::channel<7>); - } - return slice; -} - -sptr pwm_channel() -{ - (void)pwm_frequency(); // Need to initalize this first - if (not pwm_pin) { - pwm_pin = h5::make_strong_ptr( - &memory, 31, hal::rp::v5::pwm_pin_configuration{}, hal::unsafe{}); - } - return pwm_pin; -} - -opt ppin; -sptr pwm() -{ - if (not ppin) { - ppin = h5::make_strong_ptr(&memory, hal::unsafe{}, 32); - } - return ppin; -} - -opt spi0; -sptr spi() -{ - if (not spi0) { - spi0 = h5::make_strong_ptr( - &memory, hal::pin<35>, hal::pin<36>, hal::pin<34>); - } - return spi0; -} - -opt spi_cs0; -sptr spi_chip_select() -{ - if (not spi_cs0) { - spi_cs0 = h5::make_strong_ptr(&memory, hal::pin<33>); - } - return spi_cs0; -} - -} // namespace resources diff --git a/demos/platforms/stm32f103c8.cpp b/demos/platforms/stm32f103c8.cpp deleted file mode 100644 index 1bb43fb..0000000 --- a/demos/platforms/stm32f103c8.cpp +++ /dev/null @@ -1,477 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -namespace resources { -using namespace hal::literals; -using st_peripheral = hal::stm32f1::peripheral; - -std::array driver_memory{}; -std::pmr::monotonic_buffer_resource resource(driver_memory.data(), - driver_memory.size(), - std::pmr::null_memory_resource()); - -std::pmr::polymorphic_allocator<> driver_allocator() -{ - return &resource; -} - -hal::v5::optional_ptr> gpio_a_ptr; -hal::v5::optional_ptr> gpio_b_ptr; -hal::v5::optional_ptr> gpio_c_ptr; - -hal::v5::strong_ptr> gpio_a() -{ - if (not gpio_a_ptr) { - gpio_a_ptr = - hal::v5::make_strong_ptr>( - driver_allocator()); - } - return gpio_a_ptr; -} - -hal::v5::strong_ptr> gpio_b() -{ - if (not gpio_b_ptr) { - gpio_b_ptr = - hal::v5::make_strong_ptr>( - driver_allocator()); - } - return gpio_b_ptr; -} - -hal::v5::strong_ptr> gpio_c() -{ - if (not gpio_c_ptr) { - gpio_c_ptr = - hal::v5::make_strong_ptr>( - driver_allocator()); - } - return gpio_c_ptr; -} - -hal::v5::optional_ptr clock_ptr; -hal::v5::strong_ptr clock() -{ - if (not clock_ptr) { - auto cpu_frequency = hal::stm32f1::frequency(hal::stm32f1::peripheral::cpu); - clock_ptr = hal::v5::make_strong_ptr( - driver_allocator(), cpu_frequency); - } - return clock_ptr; -} - -hal::v5::optional_ptr usb_ptr; -auto usb() -{ - using namespace std::chrono_literals; - if (not usb_ptr) { - usb_ptr = hal::v5::make_strong_ptr( - driver_allocator(), clock(), 100ms); - } - return usb_ptr; -} - -hal::v5::optional_ptr control_ep_ptr; -hal::v5::strong_ptr usb_control_endpoint() -{ - if (not control_ep_ptr) { - control_ep_ptr = - hal::acquire_usb_control_endpoint(driver_allocator(), usb()); - } - return control_ep_ptr; -} - -hal::v5::optional_ptr interrupt_in_ep1_ptr; -hal::v5::optional_ptr - interrupt_out_ep1_ptr; -hal::v5::strong_ptr -usb_interrupt_in_endpoint1() -{ - if (not interrupt_in_ep1_ptr) { - auto ep = hal::acquire_usb_interrupt_endpoint(driver_allocator(), usb()); - interrupt_in_ep1_ptr = ep.in; - interrupt_out_ep1_ptr = ep.out; - } - return interrupt_in_ep1_ptr; -} -hal::v5::strong_ptr -usb_interrupt_out_endpoint1() -{ - if (not interrupt_out_ep1_ptr) { - auto ep = hal::acquire_usb_interrupt_endpoint(driver_allocator(), usb()); - interrupt_in_ep1_ptr = ep.in; - interrupt_out_ep1_ptr = ep.out; - } - return interrupt_out_ep1_ptr; -} - -hal::v5::optional_ptr interrupt_in_ep2_ptr; -hal::v5::optional_ptr - interrupt_out_ep2_ptr; -hal::v5::strong_ptr -usb_interrupt_in_endpoint2() -{ - if (not interrupt_in_ep2_ptr) { - auto ep = hal::acquire_usb_interrupt_endpoint(driver_allocator(), usb()); - interrupt_in_ep2_ptr = ep.in; - interrupt_out_ep2_ptr = ep.out; - } - return interrupt_in_ep2_ptr; -} - -hal::v5::strong_ptr -usb_interrupt_out_endpoint2() -{ - if (not interrupt_out_ep2_ptr) { - auto ep = hal::acquire_usb_interrupt_endpoint(driver_allocator(), usb()); - interrupt_in_ep2_ptr = ep.in; - interrupt_out_ep2_ptr = ep.out; - } - return interrupt_out_ep2_ptr; -} - -hal::v5::optional_ptr bulk_in_ep1_ptr; -hal::v5::optional_ptr bulk_out_ep1_ptr; -hal::v5::strong_ptr usb_bulk_in_endpoint1() -{ - if (not bulk_in_ep1_ptr) { - auto ep = hal::acquire_usb_bulk_endpoint(driver_allocator(), usb()); - bulk_in_ep1_ptr = ep.in; - bulk_out_ep1_ptr = ep.out; - } - return bulk_in_ep1_ptr; -} - -hal::v5::strong_ptr usb_bulk_out_endpoint1() -{ - if (not bulk_out_ep1_ptr) { - auto ep = hal::acquire_usb_bulk_endpoint(driver_allocator(), usb()); - bulk_in_ep1_ptr = ep.in; - bulk_out_ep1_ptr = ep.out; - } - return bulk_out_ep1_ptr; -} - -hal::v5::optional_ptr bulk_in_ep2_ptr; -hal::v5::optional_ptr bulk_out_ep2_ptr; -hal::v5::strong_ptr usb_bulk_in_endpoint2() -{ - if (not bulk_in_ep2_ptr) { - auto ep = hal::acquire_usb_bulk_endpoint(driver_allocator(), usb()); - bulk_in_ep2_ptr = ep.in; - bulk_out_ep2_ptr = ep.out; - } - return bulk_in_ep2_ptr; -} - -hal::v5::strong_ptr usb_bulk_out_endpoint2() -{ - if (not bulk_out_ep2_ptr) { - auto ep = hal::acquire_usb_bulk_endpoint(driver_allocator(), usb()); - bulk_in_ep2_ptr = ep.in; - bulk_out_ep2_ptr = ep.out; - } - return bulk_out_ep2_ptr; -} - -hal::v5::strong_ptr console() -{ - return hal::v5::make_strong_ptr( - driver_allocator(), hal::port<1>, hal::buffer<128>); -} - -hal::v5::optional_ptr led_ptr; -hal::v5::strong_ptr status_led() -{ - if (not led_ptr) { - led_ptr = hal::acquire_output_pin(driver_allocator(), gpio_c(), 13); - } - return led_ptr; -} - -hal::v5::strong_ptr adc() -{ - static hal::atomic_spin_lock adc_lock; - static hal::stm32f1::adc adc(adc_lock); - return hal::acquire_adc(driver_allocator(), adc, hal::stm32f1::adc_pins::pb0); -} - -hal::v5::strong_ptr i2c() -{ - // TODO(#167): Use a version of bit_bang_i2c that accepts strong_ptr's - static auto sda_output_pin = - hal::acquire_output_pin(driver_allocator(), gpio_b(), 7); - static auto scl_output_pin = - hal::acquire_output_pin(driver_allocator(), gpio_b(), 6); - auto clock = resources::clock(); - return hal::v5::make_strong_ptr( - driver_allocator(), - hal::bit_bang_i2c::pins{ - .sda = &(*sda_output_pin), - .scl = &(*scl_output_pin), - }, - *clock); -} - -hal::v5::strong_ptr spi() -{ - return hal::v5::make_strong_ptr(driver_allocator(), - hal::bus<1>, - hal::spi::settings{ - .clock_rate = 250.0_kHz, - .clock_polarity = false, - .clock_phase = false, - }); -} - -hal::v5::strong_ptr spi_chip_select() -{ - return hal::acquire_output_pin(driver_allocator(), gpio_a(), 4); -} - -hal::v5::strong_ptr input_pin() -{ - return hal::acquire_input_pin(driver_allocator(), gpio_b(), 4); -} - -auto& timer1() -{ - static hal::stm32f1::advanced_timer timer1{}; - return timer1; -} - -hal::v5::strong_ptr timed_interrupt() -{ -#if 0 - static hal::stm32f1::general_purpose_timer timer2; - auto timer_callback_timer = timer2.acquire_timer(); - return hal::v5::make_strong_ptr( - driver_allocator(), std::move(timer_callback_timer)); -#endif - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr pwm() -{ - static auto timer_old_pwm = - timer1().acquire_pwm(hal::stm32f1::timer1_pin::pa8); - return hal::v5::make_strong_ptr( - driver_allocator(), std::move(timer_old_pwm)); -} - -hal::v5::strong_ptr pwm_channel() -{ - auto timer_pwm_channel = - timer1().acquire_pwm16_channel(hal::stm32f1::timer1_pin::pa8); - return hal::v5::make_strong_ptr( - driver_allocator(), std::move(timer_pwm_channel)); -} - -hal::v5::strong_ptr pwm_frequency() -{ - auto timer_pwm_frequency = timer1().acquire_pwm_group_frequency(); - return hal::v5::make_strong_ptr( - driver_allocator(), std::move(timer_pwm_frequency)); -} - -hal::v5::optional_ptr can_manager; - -void initialize_can() -{ - if (not can_manager) { - auto clock_ref = clock(); - can_manager = - hal::v5::make_strong_ptr( - driver_allocator(), - 32, - driver_allocator(), - 100'000, - *clock_ref, - std::chrono::milliseconds(1), - hal::stm32f1::can_pins::pb9_pb8); - } -} - -hal::v5::strong_ptr can_transceiver() -{ - initialize_can(); - return hal::acquire_can_transceiver(driver_allocator(), can_manager); -} - -hal::v5::strong_ptr can_bus_manager() -{ - initialize_can(); - return hal::acquire_can_bus_manager(driver_allocator(), can_manager); -} - -hal::v5::strong_ptr can_identifier_filter() -{ - initialize_can(); - return hal::acquire_can_identifier_filter(driver_allocator(), can_manager)[0]; -} - -hal::v5::strong_ptr can_interrupt() -{ - initialize_can(); - return hal::acquire_can_interrupt(driver_allocator(), can_manager); -} - -hal::v5::strong_ptr interrupt_pin() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr stream_dac() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr dac() -{ - throw hal::operation_not_supported(nullptr); -} - -// Watchdog implementation using global function pattern from original -class stm32f103c8_watchdog : public custom::watchdog -{ -public: - void start() override - { - m_stm_watchdog.start(); - } - - void reset() override - { - m_stm_watchdog.reset(); - } - - void set_countdown_time(hal::time_duration p_wait_time) override - { - m_stm_watchdog.set_countdown_time(p_wait_time); - } - - bool check_flag() override - { - return m_stm_watchdog.check_flag(); - } - - void clear_flag() override - { - m_stm_watchdog.clear_flag(); - } - -private: - hal::stm32f1::independent_watchdog m_stm_watchdog{}; -}; - -hal::v5::strong_ptr watchdog() -{ - return hal::v5::make_strong_ptr(driver_allocator()); -} - -[[noreturn]] void terminate_handler() noexcept -{ - if (not led_ptr && not clock_ptr) { - // spin here until debugger is connected - while (true) { - continue; - } - } - - // Otherwise, blink the led in a pattern - auto status_led = resources::status_led(); - auto clock = resources::clock(); - - while (true) { - using namespace std::chrono_literals; - status_led->level(false); - hal::delay(*clock, 100ms); - status_led->level(true); - hal::delay(*clock, 100ms); - status_led->level(false); - hal::delay(*clock, 100ms); - status_led->level(true); - hal::delay(*clock, 1000ms); - } -} - -} // namespace resources - -void initialize_platform() -{ - using namespace hal::literals; - std::set_terminate(resources::terminate_handler); - // Set the MCU to the maximum clock speed - - hal::stm32f1::configure_clocks(hal::stm32f1::clock_tree{ - .high_speed_external = 8.0_MHz, - .pll = { - .enable = true, - .source = hal::stm32f1::pll_source::high_speed_external, - .multiply = hal::stm32f1::pll_multiply::multiply_by_9, - .usb = { - .divider = hal::stm32f1::usb_divider::divide_by_1_point_5, - } - }, - .system_clock = hal::stm32f1::system_clock_select::pll, - .ahb = { - .divider = hal::stm32f1::ahb_divider::divide_by_1, - .apb1 = { - .divider = hal::stm32f1::apb_divider::divide_by_2, - }, - .apb2 = { - .divider = hal::stm32f1::apb_divider::divide_by_1, - .adc = { - .divider = hal::stm32f1::adc_divider::divide_by_6, - } - }, - }, - }); - hal::stm32f1::activate_mco_pa8( - hal::stm32f1::mco_source::pll_clock_divided_by_2); - - hal::stm32f1::release_jtag_pins(); -} diff --git a/demos/platforms/stm32f103zg.cpp b/demos/platforms/stm32f103zg.cpp deleted file mode 100644 index ef5b0e4..0000000 --- a/demos/platforms/stm32f103zg.cpp +++ /dev/null @@ -1,2 +0,0 @@ -// NOLINTNEXTLINE(bugprone-suspicious-include) -#include "stm32f103c8.cpp" diff --git a/demos/platforms/stm32f411re.cpp b/demos/platforms/stm32f411re.cpp deleted file mode 100644 index 3194b0c..0000000 --- a/demos/platforms/stm32f411re.cpp +++ /dev/null @@ -1,286 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -namespace resources { -using namespace hal::literals; - -std::pmr::polymorphic_allocator<> driver_allocator() -{ - static std::array driver_memory{}; - static std::pmr::monotonic_buffer_resource resource( - driver_memory.data(), - driver_memory.size(), - std::pmr::null_memory_resource()); - return &resource; -} - -hal::v5::optional_ptr clock_ptr; -hal::v5::strong_ptr clock() -{ - if (not clock_ptr) { - auto const cpu_frequency = - hal::stm32f411::frequency(hal::stm32f411::peripheral::cpu); - clock_ptr = hal::v5::make_strong_ptr( - driver_allocator(), cpu_frequency / 8); - } - return clock_ptr; -} - -hal::v5::strong_ptr console() -{ - return hal::v5::make_strong_ptr( - driver_allocator(), - hal::port<2>, - hal::buffer<128>, - hal::serial::settings{ .baud_rate = 115200 }); -} - -hal::v5::strong_ptr zero_copy_serial() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::optional_ptr led_ptr; -hal::v5::strong_ptr status_led() -{ - if (not led_ptr) { - led_ptr = hal::v5::make_strong_ptr( - driver_allocator(), hal::stm32f411::peripheral::gpio_a, 5); - } - return led_ptr; -} - -hal::v5::strong_ptr can_transceiver() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr can_bus_manager() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr can_identifier_filter() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr can_interrupt() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr adc() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr input_pin() -{ - return hal::v5::make_strong_ptr( - driver_allocator(), - hal::stm32f411::peripheral::gpio_c, - 13, - hal::input_pin::settings{ .resistor = hal::pin_resistor::pull_up }); -} - -hal::v5::strong_ptr i2c() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr interrupt_pin() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr pwm() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr timed_interrupt() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr pwm_channel() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr pwm_frequency() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr spi() -{ - return hal::v5::make_strong_ptr( - driver_allocator(), hal::runtime{}, 2, hal::spi::settings{}); -} - -hal::v5::strong_ptr spi_chip_select() -{ - return hal::v5::make_strong_ptr( - driver_allocator(), hal::stm32f411::peripheral::gpio_b, 13); -} - -hal::v5::strong_ptr stream_dac() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr dac() -{ - throw hal::operation_not_supported(nullptr); -} - -// Watchdog implementation using custom interface -class stm32f411re_watchdog : public custom::watchdog -{ -public: - void start() override - { - throw hal::operation_not_supported(nullptr); - } - - void reset() override - { - throw hal::operation_not_supported(nullptr); - } - - void set_countdown_time(hal::time_duration) override - { - throw hal::operation_not_supported(nullptr); - } - - bool check_flag() override - { - throw hal::operation_not_supported(nullptr); - } - - void clear_flag() override - { - throw hal::operation_not_supported(nullptr); - } -}; - -hal::v5::strong_ptr watchdog() -{ - return hal::v5::make_strong_ptr(driver_allocator()); -} - -[[noreturn]] void terminate_handler() noexcept -{ - if (not led_ptr && not clock_ptr) { - // spin here until debugger is connected - while (true) { - continue; - } - } - - // Otherwise, blink the led in a pattern - auto status_led = resources::status_led(); - auto clock = resources::clock(); - - while (true) { - using namespace std::chrono_literals; - status_led->level(false); - hal::delay(*clock, 100ms); - status_led->level(true); - hal::delay(*clock, 100ms); - status_led->level(false); - hal::delay(*clock, 100ms); - status_led->level(true); - hal::delay(*clock, 1000ms); - } -} - -hal::v5::strong_ptr usb_control_endpoint() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr -usb_interrupt_in_endpoint1() -{ - throw hal::operation_not_supported(nullptr); -} -hal::v5::strong_ptr -usb_interrupt_out_endpoint1() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr -usb_interrupt_in_endpoint2() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr -usb_interrupt_out_endpoint2() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr usb_bulk_in_endpoint1() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr usb_bulk_out_endpoint1() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr usb_bulk_in_endpoint2() -{ - throw hal::operation_not_supported(nullptr); -} - -hal::v5::strong_ptr usb_bulk_out_endpoint2() -{ - throw hal::operation_not_supported(nullptr); -} - -} // namespace resources - -void initialize_platform() -{ - using namespace hal::literals; - hal::set_terminate(resources::terminate_handler); - hal::stm32f411::maximum_speed_using_internal_oscillator(); -} diff --git a/demos/resource_list.hpp b/demos/resource_list.hpp deleted file mode 100644 index 1507185..0000000 --- a/demos/resource_list.hpp +++ /dev/null @@ -1,127 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. -#pragma once - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -namespace custom { -/** - * @brief A stand in interface until libhal supports an official watchdog - * interface. - * - */ -class watchdog -{ -public: - watchdog() = default; - virtual void start() = 0; - virtual void reset() = 0; - virtual void set_countdown_time(hal::time_duration p_wait_time) = 0; - virtual bool check_flag() = 0; - virtual void clear_flag() = 0; - virtual ~watchdog() = default; -}; -} // namespace custom - -namespace resources { -// ======================================================= -// Defined by each platform file -// ======================================================= -/** - * @brief Allocator for driver memory - * - * The expectation is that the implementation of this allocator is a - * std::pmr::monotonic_buffer_resource with static memory storage, meaning the - * memory is fixed in size and memory cannot be deallocated. This is fine for - * the demos. - * - * @return std::pmr::polymorphic_allocator<> - */ -std::pmr::polymorphic_allocator<> driver_allocator(); -/** - * @brief Steady clock that provides the current uptime - * - * @return hal::v5::strong_ptr - */ -hal::v5::strong_ptr clock(); -hal::v5::strong_ptr console(); -hal::v5::strong_ptr zero_copy_serial(); -hal::v5::strong_ptr status_led(); -hal::v5::strong_ptr can_transceiver(); -hal::v5::strong_ptr can_bus_manager(); -hal::v5::strong_ptr can_interrupt(); -hal::v5::strong_ptr can_identifier_filter(); -hal::v5::strong_ptr adc(); -hal::v5::strong_ptr input_pin(); -hal::v5::strong_ptr i2c(); -hal::v5::strong_ptr interrupt_pin(); -hal::v5::strong_ptr pwm(); -hal::v5::strong_ptr timed_interrupt(); -hal::v5::strong_ptr pwm_channel(); -hal::v5::strong_ptr pwm_frequency(); -hal::v5::strong_ptr spi(); -hal::v5::strong_ptr spi_chip_select(); -hal::v5::strong_ptr stream_dac(); -hal::v5::strong_ptr dac(); -hal::v5::strong_ptr watchdog(); -hal::v5::strong_ptr usb_control_endpoint(); - -hal::v5::strong_ptr -usb_interrupt_in_endpoint1(); -hal::v5::strong_ptr -usb_interrupt_out_endpoint1(); - -hal::v5::strong_ptr -usb_interrupt_in_endpoint2(); -hal::v5::strong_ptr -usb_interrupt_out_endpoint2(); - -hal::v5::strong_ptr usb_bulk_in_endpoint1(); -hal::v5::strong_ptr usb_bulk_out_endpoint1(); - -hal::v5::strong_ptr usb_bulk_in_endpoint2(); -hal::v5::strong_ptr usb_bulk_out_endpoint2(); - -inline void reset() -{ - hal::cortex_m::reset(); -} -inline void sleep(hal::time_duration p_duration) -{ - auto delay_clock = resources::clock(); - hal::delay(*delay_clock, p_duration); -} -} // namespace resources - -// Application function is implemented by one of the .cpp files. -void initialize_platform(); -void application(); diff --git a/demos/run.sh b/demos/run.sh deleted file mode 100644 index 8ec999f..0000000 --- a/demos/run.sh +++ /dev/null @@ -1,15 +0,0 @@ -#!/usr/bin/sh - -set -ex - -BUILDDIR=build/rp2350-arm-s/RelWithDebInfo - -conan build . -pr:h=rp2350b -pr:h=arm-gcc-12.3 --build=missing - -source $BUILDDIR/generators/conanbuild.sh - -picotool uf2 convert $BUILDDIR/blinker.elf $BUILDDIR/blinker.uf2 -picotool load $BUILDDIR/blinker.uf2 -f -sleep 1 -plink -serial /dev/ttyACM0 -sercfg 115200,8,1,n,X - diff --git a/include/libhal-arm-mcu/lpc40/adc.hpp b/include/libhal-arm-mcu/lpc40/adc.hpp deleted file mode 100644 index 10ecdde..0000000 --- a/include/libhal-arm-mcu/lpc40/adc.hpp +++ /dev/null @@ -1,97 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include - -#include "pin.hpp" - -namespace hal::lpc40 { -/** - * @brief Analog to digital converter - * - */ -class adc final : public hal::adc -{ -public: - /// Channel specific information - struct channel - { - /// Default and highest sampling rate is 1 MHz. Careful as changing this for - /// one channel changes this for all channels on the lpc40xx mcu. - hertz clock_rate = 1'000'000.0f; - /// ADC pin - pin adc_pin; - /// Channel data index - uint8_t index; - /// Pin mux function code - uint8_t pin_function; - }; - - /** - * @brief Get a predefined adc channel - * - * - ADC channel 0 is pin(0, 23) - * - ADC channel 1 is pin(0, 24) - * - ADC channel 2 is pin(0, 25) - * - ADC channel 3 is pin(0, 26) - * - ADC channel 4 is pin(1, 30) - * - ADC channel 5 is pin(1, 31) - * - ADC channel 6 is pin(0, 12) - * - ADC channel 7 is pin(0, 13) - * - * @param p_channel - Which adc channel to use - */ - adc(hal::channel_param auto p_channel) - : adc(get_predefined_channel_info(static_cast(p_channel()))) - { - static_assert(0 <= p_channel() && p_channel() <= 7, - "Available ADC channels are from 0 to 7"); - } - - /** - * @brief Construct a custom adc object based on the passed in channel - * information. - * - * Care should be taken to ensure that the adc's operating frequency does not - * go above 1MHz and that the the channel index is within the bounds of 0 - * to 7. Exceeding these bounds will result in a call to std::abort. - * - * Care should also be taken to ensure that two adc's constructed via this - * method do not overlap in index. - * - * The operating frequency is shared across all adc channels, which means that - * the last adc to be constructed will set sampling frequency for all - * channels. - * - * @param p_channel - Which adc channel to use - */ - adc(channel const& p_channel); - - adc(adc const& p_other) = delete; - adc& operator=(adc const& p_other) = delete; - adc(adc&& p_other) noexcept = delete; - adc& operator=(adc&& p_other) noexcept = delete; - ~adc() override = default; - -private: - channel get_predefined_channel_info(std::uint8_t p_channel); - float driver_read() override; - - uint32_t volatile* m_sample = nullptr; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/can.hpp b/include/libhal-arm-mcu/lpc40/can.hpp deleted file mode 100644 index 17d422d..0000000 --- a/include/libhal-arm-mcu/lpc40/can.hpp +++ /dev/null @@ -1,79 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include "constants.hpp" -#include "pin.hpp" - -namespace hal::lpc40 { -class can final : public hal::can -{ -public: - /// Contains all of the information for to control and configure a CAN BUS bus - /// on the LPC40xx platform. - struct port - { - /// Reference to transmit pin object - pin td; - /// Pin function code for transmit - std::uint8_t td_function_code; - /// Reference to read pin object - pin rd; - /// Pin function code for receive - std::uint8_t rd_function_code; - /// Peripheral's ID - peripheral id; - /// IRQ - irq irq_number; - /// Number of time quanta for sync bits - 1 - std::uint8_t sync_jump = 0; - /// Number of time quanta for tseg1 - 1 - std::uint8_t tseg1 = 6; - /// Number of time quanta for tseg2 - 1 - std::uint8_t tseg2 = 1; - }; - - can(std::uint8_t p_port, can::settings const& p_settings = {}); - can(port const& p_port, can::settings const& p_settings = {}); - - can(can const& p_other) = delete; - can& operator=(can const& p_other) = delete; - can(can&& p_other) noexcept = delete; - can& operator=(can&& p_other) noexcept = delete; - ~can() override; - -private: - void driver_configure(settings const& p_settings) override; - void driver_bus_on() override; - void driver_send(message_t const& p_message) override; - - void setup(can::port const& p_port, can::settings const& p_settings); - void configure_baud_rate(can::port const& p_port, - can::settings const& p_settings); - /** - * @note This interrupt handler is used by both CAN1 and CAN2. This should - * only be called for a single CAN port to service both receive - * handlers. - */ - void driver_on_receive( - hal::callback p_receive_handler) override; - - port m_port; - hal::callback m_receive_handler; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/clock.hpp b/include/libhal-arm-mcu/lpc40/clock.hpp deleted file mode 100644 index 50cb792..0000000 --- a/include/libhal-arm-mcu/lpc40/clock.hpp +++ /dev/null @@ -1,190 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include -#include -#include - -#include "constants.hpp" - -namespace hal::lpc40 { - -/// The frequency of the internal RC clock and the clock frequency at startup -static constexpr hertz irc_frequency = 12'000'000.0f; -/// The default clock divider for the peripheral clock -static constexpr u32 default_peripheral_divider = 4; - -/// USB oscillator source constants (not used) -enum class usb_clock_source : u8 -{ - /// Use IRC or external oscillator directly - system_clock = 0b00, - /// Use PLL0 main PLL as the clock source - pll0 = 0b01, - /// Use PLL1 alternative PLL as the clock source - pll1 = 0b10, -}; - -/// USB Clock divider constants -enum class usb_divider : u8 -{ - divide_by1 = 0, - divide_by2, - divide_by3, - divide_by4, -}; - -/// spifi clock options -enum class spifi_clock_source : u8 -{ - /// Use IRC or external oscillator directly - system_clock = 0b00, - /// Use PLL0 main PLL as the clock source - pll0 = 0b01, - /// Use PLL1 alternative PLL as the clock source - pll1 = 0b10, -}; - -/// Defines the codes for the flash access clock cycles required based on the -/// CPU clocks speed. -enum class flash_configuration : u16 -{ - /// Flash accesses use 1 CPU clock. Use for up to 20 MHz CPU clock with - /// power boost off. - clock1 = 0b0000 << 12, - /// Flash accesses use 2 CPU clocks. Use for up to 40 MHz CPU clock with - /// power boost off. - clock2 = 0b0001 << 12, - /// Flash accesses use 3 CPU clocks. Use for up to 60 MHz CPU clock with - /// power boost off. - clock3 = 0b0010 << 12, - /// Flash accesses use 4 CPU clocks. Use for up to 80 MHz CPU clock with - /// power boost off. - clock4 = 0b0011 << 12, - /// Flash accesses use 5 CPU clocks. Use for up to 100 MHz CPU clock with - /// power boost off. If CPU clock is above 100 MHz, use this but with power - /// boost on. - clock5 = 0b0100 << 12, - /// Flash accesses use 6 CPU clocks. "Safe" setting for any allowed - /// conditions. - clock6 = 0b0101 << 12, -}; - -/// Structure representing the lpc4078 clock tree -struct clock_tree -{ - /// the frequency of the input oscillator - hertz oscillator_frequency = irc_frequency; - /// set to true to use external XTC - bool use_external_oscillator = false; - /// phase locked loops config struct - struct pll_t - { - /// turn on/off a PLL - bool enabled = false; - /// increase the frequency of the PLL by the multiple - u8 multiply = 1; - }; - /// phase locked loops for both pll[0] and pll[1] - std::array pll = {}; - /// cpu clock control config struct - struct cpu_t - { - /// If true, use PLL0, if false, use system clock which is defined as - /// 12MHz - bool use_pll0 = false; - /// Divide the input clock from IRC or PLL0 - u8 divider = 1; - }; - /// cpu clock control - cpu_t cpu = {}; - - /// usb clock control config struct - struct usb_t - { - /// usb clock source - usb_clock_source clock = usb_clock_source::system_clock; - /// usb clock divider - usb_divider divider = usb_divider::divide_by1; - }; - /// usb clock control - usb_t usb = {}; - - /// spifi clock control config struct - struct spifi_t - { - /// spifi clock source - spifi_clock_source clock = spifi_clock_source::system_clock; - /// spifi clock divider - u8 divider = 1; - }; - /// spifi clock control - spifi_t spifi = {}; - - /// Defines the peripheral clock divider amount - u8 peripheral_divider = 4; - - /// Set true to make the EMC divider half as slow as the CPU divider. Set to - /// false to set it to equal that amount. - bool emc_half_cpu_divider = false; -}; - -/** - * @brief Set the lpc40xx MCU to the maximum clock speed (120MHz) possible - * - * This function REQUIRES an external crystal to be used. - * - * - CPU clock speed set to 120MHz - * - USB clock speed set to 120MHz - * - Peripheral clock set to 120MHZ - * - SPIFI clock set to 120MHz - * - PLL0 is set to 120MHz and used for everything - * - PLL1 is disabled and not used - * - * TODO(#65): explain the set of errors in better detail - * - * @param p_external_crystal_frequency - frequency of the crystal connected to - * the XTAL1 & XTAL2 - */ -void maximum(hertz p_external_crystal_frequency); - -/** - * @brief Get the operating frequency of the peripheral - * - * @param p_peripheral - id of the peripheral - * @return frequency - operating frequency of the peripheral - */ -hertz get_frequency(peripheral p_peripheral); - -/** - * @brief Determins if the external oscillator is currently enabled and in use - * - * @return true - external oscillator is in use currently - * @return false - external oscillator is NOT in use currently - */ -bool using_external_oscillator(); - -/** - * @brief Apply the clock configuration to hardware - * - * TODO(#65): explain the set of errors in better detail - */ -void configure_clocks(clock_tree const& p_clock_tree); - -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/constants.hpp b/include/libhal-arm-mcu/lpc40/constants.hpp deleted file mode 100644 index 5f310e1..0000000 --- a/include/libhal-arm-mcu/lpc40/constants.hpp +++ /dev/null @@ -1,155 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -/** - * @brief libhal drivers for the lpc40 series of microcontrollers from NXP - * - */ -namespace hal::lpc40 { -/// List of each peripheral and their power on id number for this platform -enum class peripheral : u8 -{ - lcd = 0, - timer0 = 1, - timer1 = 2, - uart0 = 3, - uart1 = 4, - pwm0 = 5, - pwm1 = 6, - i2c0 = 7, - uart4 = 8, - rtc = 9, - ssp1 = 10, - emc = 11, - adc = 12, - can1 = 13, - can2 = 14, - gpio = 15, - spifi = 16, - motor_control_pwm = 17, - quadrature_encoder = 18, - i2c1 = 19, - ssp2 = 20, - ssp0 = 21, - timer2 = 22, - timer3 = 23, - uart2 = 24, - uart3 = 25, - i2c2 = 26, - i2s = 27, - sdcard = 28, - gpdma = 29, - ethernet = 30, - usb = 31, - cpu, // always on - dac, // always on -}; - -/// List of interrupt request numbers for this platform -enum class irq : cortex_m::irq_t // NOLINT(performance-enum-size) -{ - /// Watchdog Timer Interrupt - wdt = 0, - /// Timer0 Interrupt - timer0 = 1, - /// Timer1 Interrupt - timer1 = 2, - /// Timer2 Interrupt - timer2 = 3, - /// Timer3 Interrupt - timer3 = 4, - /// UART0 Interrupt - uart0 = 5, - /// UART1 Interrupt - uart1 = 6, - /// UART2 Interrupt - uart2 = 7, - /// UART3 Interrupt - uart3 = 8, - /// PWM1 Interrupt - pwm1 = 9, - /// I2C0 Interrupt - i2c0 = 10, - /// I2C1 Interrupt - i2c1 = 11, - /// I2C2 Interrupt - i2c2 = 12, - /// Reserved - reserved0 = 13, - /// SSP0 Interrupt - ssp0 = 14, - /// SSP1 Interrupt - ssp1 = 15, - /// PLL0 Lock (Main PLL) Interrupt - pll0 = 16, - /// Real Time Clock Interrupt - rtc = 17, - /// External Interrupt 0 Interrupt - eint0 = 18, - /// External Interrupt 1 Interrupt - eint1 = 19, - /// External Interrupt 2 Interrupt - eint2 = 20, - /// External Interrupt 3 Interrupt - eint3 = 21, - /// A/D Converter Interrupt - adc = 22, - /// Brown-Out Detect Interrupt - bod = 23, - /// USB Interrupt - usb = 24, - /// CAN Interrupt - can = 25, - /// General Purpose DMA Interrupt - dma = 26, - /// I2S Interrupt - i2s = 27, - /// Ethernet Interrupt - enet = 28, - /// SD/MMC card I/F Interrupt - mci = 29, - /// Motor Control PWM Interrupt - mcpwm = 30, - /// Quadrature Encoder Interface Interrupt - qei = 31, - /// PLL1 Lock (USB PLL) Interrupt - pll1 = 32, - /// USB Activity interrupt - usbactivity = 33, - /// CAN Activity interrupt - canactivity = 34, - /// UART4 Interrupt - uart4 = 35, - /// SSP2 Interrupt - ssp2 = 36, - /// LCD Interrupt - lcd = 37, - /// GPIO Interrupt - gpio = 38, - /// PWM0 Interrupt - pwm0 = 39, - /// EEPROM Interrupt - eeprom = 40, - /// CMP0 Interrupt - cmp0 = 41, - /// CMP1 Interrupt - cmp1 = 42, - max, -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/dac.hpp b/include/libhal-arm-mcu/lpc40/dac.hpp deleted file mode 100644 index e6a7109..0000000 --- a/include/libhal-arm-mcu/lpc40/dac.hpp +++ /dev/null @@ -1,33 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -namespace hal::lpc40 { -/** - * @brief Digital to Analog converter - * - */ -class dac : public hal::dac -{ -public: - dac(); - ~dac() override = default; - -private: - void driver_write(float p_percentage) override; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/dma.hpp b/include/libhal-arm-mcu/lpc40/dma.hpp deleted file mode 100644 index b4b7ce7..0000000 --- a/include/libhal-arm-mcu/lpc40/dma.hpp +++ /dev/null @@ -1,125 +0,0 @@ -#pragma once - -#include - -#include -#include -#include - -namespace hal::lpc40 { - -constexpr uptr dma_reg_address = 0x2008'0000; -constexpr usize dma_max_transfer_size = (1 << 12) - 1; -constexpr usize dma_channel_count = 8; - -enum class dma_transfer_type : u8 -{ - /// Flow Control: DMA controller - memory_to_memory = 0b000, - /// Flow Control: DMA controller - memory_to_peripheral = 0b001, - /// Flow Control: DMA controller - peripheral_to_memory = 0b010, - /// Flow Control: DMA controller - peripheral_to_peripheral = 0b011, - /// Flow Control: Destination Peripheral - peripheral_to_peripheral_dp = 0b100, - /// Flow Control: Destination Peripheral - memory_to_peripheral_dp = 0b101, - /// Flow Control: Source Peripheral - peripheral_to_memory_sp = 0b110, - /// Flow Control: Source Peripheral - peripheral_to_peripheral_sp = 0b111 -}; - -enum class dma_channel_select : u8 -{ - channel0 = 0, - channel1, - channel2, - channel3, - channel4, - channel5, - channel6, - channel7, -}; - -enum class dma_transfer_width : u8 -{ - bit_8 = 0b000, - bit_16 = 0b001, - bit_32 = 0b010, -}; - -enum class dma_burst_size : u8 -{ - bytes_1 = 0b000, - bytes_4 = 0b001, - bytes_8 = 0b010, - bytes_16 = 0b011, - bytes_32 = 0b100, - bytes_64 = 0b101, - bytes_128 = 0b110, - bytes_256 = 0b111, -}; - -enum class dma_peripheral : u8 -{ - memory_or_timer0_match0 = 0, - sd_card_and_timer0_match1 = 1, - spi0_tx_and_timer1_match0 = 2, - spi0_rx_and_timer1_match1 = 3, - spi1_tx_and_timer2_match0 = 4, - spi1_rx_and_timer2_match1 = 5, - spi2_tx_and_i2s_channel_0 = 6, - spi2_rx_and_i2s_channel_1 = 7, - adc = 8, - dac = 9, - uart0_tx_and_uart3_tx = 10, - uart0_rx_and_uart3_rx = 11, - uart1_tx_and_uart4_tx = 12, - uart1_rx_and_uart4_rx = 13, - uart2_tx_and_timer3_match0 = 14, - uart2_rx_and_timer3_match1 = 15, -}; - -struct dma -{ - void const volatile* source; - void volatile* destination; - std::size_t length; - bool source_increment; - bool destination_increment; - dma_transfer_type transfer_type; - dma_transfer_width source_transfer_width; - dma_transfer_width destination_transfer_width; - dma_peripheral source_peripheral = dma_peripheral::memory_or_timer0_match0; - dma_peripheral destination_peripheral = - dma_peripheral::memory_or_timer0_match0; - dma_burst_size source_burst_size = dma_burst_size::bytes_1; - dma_burst_size destination_burst_size = dma_burst_size::bytes_1; -}; - -/** - * @brief Set the dma lock object - * - * This API is not thread safe and should be performed before dma is used - * between threads. The default dma lock object is a hal::atomic_spin_lock which - * is operating system agnostic but inefficient. If you are using an operating - * system, use this call to replace the original spin lock with the appropriate - * mutex. - * - * @param p_lock - basic lock to be used for locking dma across threads. Should - * be a OS safe mutex. - */ -void set_dma_lock(hal::basic_lock& p_lock); - -/** - * @brief Setup and start a dma transfer - * - * @param p_configuration - dma configuration - * @param p_interrupt_callback - callback when dma has completed - */ -void setup_dma_transfer(dma const& p_configuration, - hal::callback p_interrupt_callback); -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/dma_spi.hpp b/include/libhal-arm-mcu/lpc40/dma_spi.hpp deleted file mode 100644 index 59e9684..0000000 --- a/include/libhal-arm-mcu/lpc40/dma_spi.hpp +++ /dev/null @@ -1,84 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include -#include - -#include "constants.hpp" -#include "pin.hpp" - -namespace hal::lpc40 { -class dma_spi final : public hal::spi -{ -public: - /// Information used to configure the spi bus - struct bus_info - { - /// peripheral id used to power on the spi peripheral at creation - peripheral peripheral_id; - /// spi data pin - pin clock; - /// spi clock pin - pin data_out; - /// spi clock pin - pin data_in; - /// clock function code - u8 clock_function; - /// scl pin function code - u8 data_out_function; - /// scl pin function code - u8 data_in_function; - }; - - /** - * @brief Construct a new spi object - * - * @param p_bus - bus number to use - * @param p_waiter - provides the implementation strategy for the time the CPU - * waits until the transfer has completed. - * @param p_settings - spi settings to achieve - * @throws hal::operation_not_supported - if the p_bus is not 0, 1, or 2 or if - * the spi settings could not be achieved. - */ - dma_spi(u8 p_bus, - hal::io_waiter& p_waiter = hal::polling_io_waiter(), - spi::settings const& p_settings = {}); - /** - * @brief Construct a new spi object using bus info directly - * - * @param p_bus - Full bus information - */ - dma_spi(bus_info p_bus); - - dma_spi(dma_spi const& p_other) = delete; - dma_spi& operator=(dma_spi const& p_other) = delete; - dma_spi(dma_spi&& p_other) noexcept = delete; - dma_spi& operator=(dma_spi&& p_other) noexcept = delete; - ~dma_spi() override; - -private: - void driver_configure(settings const& p_settings) override; - void driver_transfer(std::span p_data_out, - std::span p_data_in, - hal::byte p_filler) override; - - hal::io_waiter* m_io_waiter; - bus_info m_bus; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/i2c.hpp b/include/libhal-arm-mcu/lpc40/i2c.hpp deleted file mode 100644 index fa38e8c..0000000 --- a/include/libhal-arm-mcu/lpc40/i2c.hpp +++ /dev/null @@ -1,128 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include - -#include "constants.hpp" -#include "pin.hpp" - -namespace hal::lpc40 { -/** - * @brief i2c driver for the lpc40 series of microcontrollers - * - * The lpc40 series i2c peripherals utilize a state machine and interrupts to - * handle transmitting and receiving data. This driver does the same. A - * `hal::io_waiter` may be passed to the constructor in order to control what - * the driver does when its waiting for the i2c transaction to complete. - */ -class i2c final : public hal::i2c -{ -public: - using write_iterator = std::span::iterator; - using read_iterator = std::span::iterator; - - /// port holds all of the information for an i2c bus on the LPC40xx - /// platform. - struct bus_info - { - /// peripheral id used to power on the i2c peripheral at creation - peripheral peripheral_id; - /// IRQ number for this i2c port. - irq irq_number; - /// i2c data pin - pin sda; - /// sda pin function code - std::uint8_t sda_function; - /// i2c clock pin - pin scl; - /// scl pin function code - std::uint8_t scl_function; - /// Clock rate duty cycle - float duty_cycle = 0.5f; - }; - - /** - * @brief Construct a new i2c object - * - * @param p_bus - i2c bus number, can be 0, 1, or 2. - * @param p_settings - i2c configuration settings - * @param p_waiter - A `hal::io_waiter` for controlling the driver's behavior - * while the cpu waits for the interrupt driven i2c transaction to finish. - * Note that if the waiter blocks the thread, then the timeout passed to - * transaction() will be ignored. If sleep is used, then the timeout will be - * checked after each waking interrupt fires off. - * @throws hal::operation_not_supported - if the settings or if the bus number - * is not 0, 1, or 2. - */ - i2c(u8 p_bus, - i2c::settings const& p_settings = {}, - hal::io_waiter& p_waiter = hal::polling_io_waiter()); - - /** - * @brief Construct a new i2c object using a bus info object - * - * @param p_bus_info - device specific bus information - * @param p_settings - i2c configuration settings - * @param p_waiter - A `hal::io_waiter` for controlling the driver's behavior - * while the cpu waits for the interrupt driven i2c transaction to finish. - * Note that if the waiter blocks the thread, then the timeout passed to - * transaction() will be ignored. If sleep is used, then the timeout will be - * checked after each waking interrupt fires off. - * @throws hal::operation_not_supported - if the settings or bus info - * designation could not be achieved. - */ - i2c(bus_info const& p_bus_info, - i2c::settings const& p_settings = {}, - hal::io_waiter& p_waiter = hal::polling_io_waiter()); - - i2c(i2c const& p_other) = delete; - i2c& operator=(i2c const& p_other) = delete; - i2c(i2c&& p_other) noexcept = delete; - i2c& operator=(i2c&& p_other) noexcept = delete; - ~i2c() override; - -private: - void driver_configure(settings const& p_settings) override; - void driver_transaction( - hal::byte p_address, - std::span p_data_out, - std::span p_data_in, - hal::function_ref p_timeout) override; - void setup_interrupt(); - void interrupt(); - - enum class error_state : u8 - { - no_error = 0, - no_such_device, - io_error, - arbitration_lost, - }; - - bus_info m_bus; - write_iterator m_write_iterator; - write_iterator m_write_end; - read_iterator m_read_iterator; - read_iterator m_read_end; - error_state m_status{}; - hal::byte m_address = hal::byte{ 0x00 }; - bool m_busy = false; - hal::io_waiter* m_waiter = nullptr; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/input_pin.hpp b/include/libhal-arm-mcu/lpc40/input_pin.hpp deleted file mode 100644 index 3646312..0000000 --- a/include/libhal-arm-mcu/lpc40/input_pin.hpp +++ /dev/null @@ -1,50 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::lpc40 { -/** - * @brief Input pin implementation for the lpc40xx - * - */ -class input_pin final : public hal::input_pin -{ -public: - /** - * @brief Construct a new input pin object - * - * @param p_port - selects pin port to use - * @param p_pin - selects pin within the port to use - * @param p_settings - initial pin settings - */ - input_pin(u8 p_port, u8 p_pin, input_pin::settings const& p_settings = {}); - - input_pin(input_pin const& p_other) = delete; - input_pin& operator=(input_pin const& p_other) = delete; - input_pin(input_pin&& p_other) noexcept = delete; - input_pin& operator=(input_pin&& p_other) noexcept = delete; - ~input_pin() override = default; - -private: - void driver_configure(settings const& p_settings) override; - bool driver_level() override; - - u8 m_port{}; - u8 m_pin{}; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/interrupt.hpp b/include/libhal-arm-mcu/lpc40/interrupt.hpp deleted file mode 100644 index 4b6a7fa..0000000 --- a/include/libhal-arm-mcu/lpc40/interrupt.hpp +++ /dev/null @@ -1,12 +0,0 @@ -#pragma once - -namespace hal::lpc40 { -/** - * @brief Initialize interrupts for the lpc40 series processors - * - * Only initializes after the first call. Does nothing afterwards. Can be - * called multiple times without issue. - * - */ -void initialize_interrupts(); -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/interrupt_pin.hpp b/include/libhal-arm-mcu/lpc40/interrupt_pin.hpp deleted file mode 100644 index 7e576a0..0000000 --- a/include/libhal-arm-mcu/lpc40/interrupt_pin.hpp +++ /dev/null @@ -1,51 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::lpc40 { -/** - * @brief Interrupt pin implementation for the lpc40xx - * - */ -class interrupt_pin final : public hal::interrupt_pin -{ -public: - /** - * @brief Construct a new interrupt pin object - * - * @param port - selects pin port to use - * @param pin - selects pin within the port to use - * @param p_settings - initial pin settings - */ - interrupt_pin(u8 port, // NOLINT - u8 pin, - settings const& p_settings = {}); - interrupt_pin(interrupt_pin const& p_other) = delete; - interrupt_pin& operator=(interrupt_pin const& p_other) = delete; - interrupt_pin(interrupt_pin&& p_other) noexcept = delete; - interrupt_pin& operator=(interrupt_pin&& p_other) noexcept = delete; - ~interrupt_pin() override; - -private: - void driver_configure(settings const& p_settings) override; - void driver_on_trigger(hal::callback p_callback) override; - - u8 m_port; - u8 m_pin; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/output_pin.hpp b/include/libhal-arm-mcu/lpc40/output_pin.hpp deleted file mode 100644 index b523cf3..0000000 --- a/include/libhal-arm-mcu/lpc40/output_pin.hpp +++ /dev/null @@ -1,51 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::lpc40 { -/** - * @brief Output pin implementation for the lpc40xx - * - */ -class output_pin final : public hal::output_pin -{ -public: - /** - * @brief Construct a new output pin object - * - * @param p_port - selects pin port to use - * @param p_pin - selects which pin within the port to use - * @param p_settings - initial pin settings - */ - output_pin(u8 p_port, u8 p_pin, output_pin::settings const& p_settings = {}); - - output_pin(output_pin const& p_other) = delete; - output_pin& operator=(output_pin const& p_other) = delete; - output_pin(output_pin&& p_other) noexcept = delete; - output_pin& operator=(output_pin&& p_other) noexcept = delete; - ~output_pin() override = default; - -private: - void driver_configure(settings const& p_settings) override; - void driver_level(bool p_high) override; - bool driver_level() override; - - u8 m_port{}; - u8 m_pin{}; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/pin.hpp b/include/libhal-arm-mcu/lpc40/pin.hpp deleted file mode 100644 index bceffae..0000000 --- a/include/libhal-arm-mcu/lpc40/pin.hpp +++ /dev/null @@ -1,143 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -namespace hal::lpc40 { -/** - * @brief lpc40xx pin multiplexing and control driver used drivers and apps - * seeking to tune the pins. - * - */ -class pin -{ -public: - // NOLINTBEGIN(bugprone-easily-swappable-parameters): This is an old API that - // should be updated later on the next breaking release. - /** - * @brief Construct a new pin mux and configuration driver - * - * See UM10562 page 99 for more details on which pins can be what function. - * - * @param p_port - selects pin port to use - * @param p_pin - selects pin within the port to use - */ - constexpr pin(u8 p_port, u8 p_pin) - : m_port(p_port) - , m_pin(p_pin) - { - } - // NOLINTEND(bugprone-easily-swappable-parameters) - - /// Default constructor - constexpr pin() = default; - - // NOLINTBEGIN(modernize-use-nodiscard): Allow return values to be dropped if - // they are not needed. - /** - * @brief Change the function of the pin (mux the pins function) - * - * @param p_function_code - the pin function code - * @return pin& - reference to this pin for chaining - */ - pin const& function(uint8_t p_function_code) const; - - /** - * @brief Set the internal resistor connection for this pin - * - * @param p_resistor - resistor type - * @return pin& - reference to this pin for chaining - */ - pin const& resistor(hal::pin_resistor p_resistor) const; - - /** - * @brief Disable or enable hysteresis mode for this pin - * - * @param p_enable - enable this mode, set to false to disable this mode - * @return pin& - reference to this pin for chaining - */ - pin const& hysteresis(bool p_enable) const; - - /** - * @brief invert the logic for this pin in input mode - * - * @param p_enable - enable this mode, set to false to disable this mode - * @return pin& - reference to this pin for chaining - */ - pin const& input_invert(bool p_enable) const; - - /** - * @brief enable analog mode for this pin (required for dac and adc drivers) - * - * @param p_enable - enable this mode, set to false to disable this mode - * @return pin& - reference to this pin for chaining - */ - pin const& analog(bool p_enable) const; - - /** - * @brief enable digital filtering (filter out noise on input lines) - * - * @param p_enable - enable this mode, set to false to disable this mode - * @return pin& - reference to this pin for chaining - */ - pin const& digital_filter(bool p_enable) const; - - /** - * @brief Enable high speed mode for i2c pins - * - * @param p_enable - enable this mode, set to false to disable this mode - * @return pin& - reference to this pin for chaining - */ - pin const& highspeed_i2c(bool p_enable = true) const; - - /** - * @brief enable high slew rate for pin - * - * @param p_enable - enable this mode, set to false to disable this mode - * @return pin& - reference to this pin for chaining - */ - pin const& high_slew_rate(bool p_enable = true) const; - - /** - * @brief enable high current drain for i2c lines - * - * @param p_enable - enable this mode, set to false to disable this mode - * @return pin& - reference to this pin for chaining - */ - pin const& i2c_high_current(bool p_enable = true) const; - - /** - * @brief Make the pin open drain (required for the i2c driver) - * - * @param p_enable - enable this mode, set to false to disable this mode - * @return pin& - reference to this pin for chaining - */ - pin const& open_drain(bool p_enable = true) const; - - /** - * @brief Enable dac mode (required for the dac driver) - * - * @param p_enable - enable this mode, set to false to disable this mode - * @return pin& - reference to this pin for chaining - */ - pin const& dac(bool p_enable = true) const; - - // NOLINTEND(modernize-use-nodiscard) -private: - u8 m_port{}; - u8 m_pin{}; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/power.hpp b/include/libhal-arm-mcu/lpc40/power.hpp deleted file mode 100644 index 25ffb31..0000000 --- a/include/libhal-arm-mcu/lpc40/power.hpp +++ /dev/null @@ -1,39 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include "constants.hpp" - -namespace hal::lpc40 { -/** - * @brief Power on the peripheral - * - */ -void power_on(peripheral p_peripheral); - -/** - * @brief Check if the peripheral is powered on - * - * @return true - peripheral is on - * @return false - peripheral is off - */ -[[nodiscard]] bool is_on(peripheral p_peripheral); - -/** - * @brief Power off peripheral - * - */ -void power_off(peripheral p_peripheral); -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/pwm.hpp b/include/libhal-arm-mcu/lpc40/pwm.hpp deleted file mode 100644 index 2f9fd58..0000000 --- a/include/libhal-arm-mcu/lpc40/pwm.hpp +++ /dev/null @@ -1,73 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include "constants.hpp" -#include "pin.hpp" - -namespace hal::lpc40 { -/** - * @brief pwm driver for the lpc40xx series of micro controllers - * - * This driver uses the dedicated PWM peripherals, PWM0, and PWM1 for generating - * pwm signals. Other methods would include using timers and the MotorPWM - * peripherals. - * - * NOTE: Channels within a PWM peripheral device are NOT independent. Meaning - * that changing the frequency of one channel changes the frequency for all - * channels within the peripheral block. - * - */ -class pwm final : public hal::pwm -{ -public: - /// Channel specific information - struct channel - { - /// peripheral id used to power on the pwm peripheral at creation - peripheral peripheral_id; - /// Pin to output pwm from - pin pwm_pin; - /// Channel index - u8 index; - /// Pin function code - u8 pin_function; - }; - - /** - * @brief Construct a new pwm object - * - * @param p_peripheral - Peripheral block, either 0 or 1 - * @param p_channel - PWM output channel within the peripheral block, from 1 - * to 6. - */ - pwm(u8 p_peripheral, u8 p_channel); - - pwm(pwm const& p_other) = delete; - pwm& operator=(pwm const& p_other) = delete; - pwm(pwm&& p_other) noexcept = delete; - pwm& operator=(pwm&& p_other) noexcept = delete; - ~pwm() override = default; - -private: - void driver_frequency(hertz p_frequency) override; - void driver_duty_cycle(float p_duty_cycle) override; - - channel m_channel; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/spi.hpp b/include/libhal-arm-mcu/lpc40/spi.hpp deleted file mode 100644 index 586b3f2..0000000 --- a/include/libhal-arm-mcu/lpc40/spi.hpp +++ /dev/null @@ -1,78 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include - -#include "constants.hpp" -#include "pin.hpp" - -namespace hal::lpc40 { -class spi final : public hal::spi -{ -public: - /// Information used to configure the spi bus - struct bus_info - { - /// peripheral id used to power on the spi peripheral at creation - peripheral peripheral_id; - /// spi data pin - pin clock; - /// spi clock pin - pin data_out; - /// spi clock pin - pin data_in; - /// clock function code - u8 clock_function; - /// scl pin function code - u8 data_out_function; - /// scl pin function code - u8 data_in_function; - }; - - /** - * @brief Construct a new spi object - * - * @param p_bus - bus number to use - * @param p_settings - spi settings to achieve - * @throws hal::operation_not_supported - if the p_bus is not 0, 1, or 2 or if - * the spi settings could not be achieved. - */ - spi(u8 p_bus, spi::settings const& p_settings = {}); - /** - * @brief Construct a new spi object using bus info directly - * - * @param p_bus - Full bus information - */ - spi(bus_info p_bus); - - spi(spi const& p_other) = delete; - spi& operator=(spi const& p_other) = delete; - spi(spi&& p_other) noexcept = delete; - spi& operator=(spi&& p_other) noexcept = delete; - ~spi() override; - -private: - void driver_configure(settings const& p_settings) override; - void driver_transfer(std::span p_data_out, - std::span p_data_in, - hal::byte p_filler) override; - - bus_info m_bus; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/stream_dac.hpp b/include/libhal-arm-mcu/lpc40/stream_dac.hpp deleted file mode 100644 index 9dcb689..0000000 --- a/include/libhal-arm-mcu/lpc40/stream_dac.hpp +++ /dev/null @@ -1,64 +0,0 @@ -#pragma once - -#include -#include - -namespace hal::lpc40 { -/** - * @brief 16-bit stream dac implementation - * - * Operated using DMA. The DMA request number is unique to the dac and thus does - * not conflict with any other driver. - * - * The lpc40 dac only supports up to 10-bit resolution so the 6 least - * significant bits will be ignored. - * - * Note that there is only a single dac on the lpc40 series and thus only one - * dac driver should be used in an application. - */ -class stream_dac_u16 final : public hal::stream_dac_u16 -{ -public: - stream_dac_u16(hal::io_waiter& p_waiter = hal::polling_io_waiter()); - stream_dac_u16(stream_dac_u16 const& p_other) = delete; - stream_dac_u16& operator=(stream_dac_u16 const& p_other) = delete; - stream_dac_u16(stream_dac_u16&& p_other) noexcept = delete; - stream_dac_u16& operator=(stream_dac_u16&& p_other) noexcept = delete; - ~stream_dac_u16() override = default; - -private: - void driver_write(hal::stream_dac_u16::samples const& p_samples) override; - - hal::io_waiter* m_waiter; -}; - -/** - * @brief 8-bit stream dac implementation - * - * Operated using DMA. The DMA request number is unique to the dac and thus does - * not conflict with any other driver. - * - * The lpc40 supports a right-aligned 10-bit resolution dac making it easy to - * DMA byte data to it by choosing the 2nd byte in the register. No additional - * preprocessing is necessary by the driver to DMA data from a byte stream to - * the DAC. - * - * Note that there is only a single dac on the lpc40 series and thus only one - * dac driver should be used in an application. - */ -class stream_dac_u8 final : public hal::stream_dac_u8 -{ -public: - stream_dac_u8(hal::io_waiter& p_waiter = hal::polling_io_waiter()); - stream_dac_u8(stream_dac_u8 const& p_other) = delete; - stream_dac_u8& operator=(stream_dac_u8 const& p_other) = delete; - stream_dac_u8(stream_dac_u8&& p_other) noexcept = delete; - stream_dac_u8& operator=(stream_dac_u8&& p_other) noexcept = delete; - ~stream_dac_u8() override = default; - -private: - void driver_write(hal::stream_dac_u8::samples const& p_samples) override; - - hal::io_waiter* m_waiter; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/lpc40/uart.hpp b/include/libhal-arm-mcu/lpc40/uart.hpp deleted file mode 100644 index 4fb1cff..0000000 --- a/include/libhal-arm-mcu/lpc40/uart.hpp +++ /dev/null @@ -1,92 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include "constants.hpp" -#include "pin.hpp" - -namespace hal::lpc40 { -/** - * @brief Implementation of the UART peripheral for the LPC40xx family of - * microcontrollers. - * - * @note that the baud rates less than or equal to the peripheral clock - * frequency / 48. Otherwise this peripheral cannot guarantee proper - * transmission or receive of bytes. - */ -class uart final : public hal::serial -{ -public: - /// Port contains all of the information that the lpc40 uart port needs to - /// operate. - struct port - { - /// Resource ID of the UART peripheral to power on at initialization. - peripheral id; - /// Interrupt request number - irq irq_number; - /// Reference to a uart transmitter pin - pin tx; - /// Reference to a uart receiver pin - pin rx; - /// Function code to set the transmit pin to uart transmitter - std::uint8_t tx_function; - /// Function code to set the receive pin to uart receiver - std::uint8_t rx_function; - }; - - /** - * @brief Retrieve a UART serial port - * - * @param p_port_number - which uart port number to return - * @param p_receive_working_buffer - uart serial receive working buffer - * @param p_settings - the initial settings for the uart driver - */ - uart(std::uint8_t p_port_number, - std::span p_receive_working_buffer, - serial::settings const& p_settings = {}); - /** - * @brief Construct a new uart object - * - * @param p_port - * @param p_receive_working_buffer - * @param p_settings - */ - uart(uart::port const& p_port, - std::span p_receive_working_buffer, - serial::settings const& p_settings = {}); - - uart(uart const& p_other) = delete; - uart& operator=(uart const& p_other) = delete; - uart(uart&& p_other) noexcept = delete; - uart& operator=(uart&& p_other) noexcept = delete; - ~uart() override = default; - -private: - void driver_configure(settings const& p_settings) override; - write_t driver_write(std::span p_data) override; - read_t driver_read(std::span p_data) override; - void driver_flush() override; - - void setup_receive_interrupt(); - void interrupt_handler(); - - port m_port; - nonstd::ring_span m_receive_buffer; -}; -} // namespace hal::lpc40 diff --git a/include/libhal-arm-mcu/startup.hpp b/include/libhal-arm-mcu/startup.hpp deleted file mode 100644 index bc74541..0000000 --- a/include/libhal-arm-mcu/startup.hpp +++ /dev/null @@ -1,91 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include - -// These need to be supplied by the linker script if the application developer -// in order to call hal::cortex::initialize_data_section() -extern "C" -{ - /** - * @brief this symbol is placed at the start of the data section in RAM. - * - */ - extern hal::u32 __data_start; // NOLINT: needed for linker script - /** - * @brief this symbol is place at the start of the data contents in ROM. This - * is where the globally defined values for each statically allocated variable - * is saved. - * - */ - extern hal::u32 __data_source; // NOLINT: needed for linker script - /** - * @brief This is the length of the data to be copied from ROM to RAM. - * - */ - extern hal::u32 __data_size; // NOLINT: needed for linker script - /** - * @brief this symbol is placed at the start of the bss section in RAM. - * - */ - extern hal::u32 __bss_start; // NOLINT: needed for linker script - /** - * @brief This is the length of the bss section to write zeros to. - * - */ - extern hal::u32 __bss_size; // NOLINT: needed for linker script -} - -namespace hal::cortex_m { -/** - * @brief Initialize the data section of RAM. This should be the first thing - * called in main() before using any global or statically allocated variables. - * It can also be called in the startup code before main is called. This is not - * done by crt0.s (C runtime startup code) because with an OS, when the - * executable is copied to RAM, the data section is also copied and those same - * locations can be reused for the application, removing the need to copy the - * data section. This will also happen if one loads an elf file to an MCU using - * a debugger. Typically the RAM section, but not BSS, is copied over. But in - * the case of the MCU without a debugger, the MCU will have to manage coping - * the contents from ROM to RAM itself. Systems should always assume they - * haven't been loaded by any means and should set the data section at the start - * of the application. - * - */ -inline void initialize_data_section() -{ - // Initialize statically allocated data by coping the data section from ROM to - // RAM. CRT0.o/.s does not perform .data section initialization so it must be - // done by initialize_platform. - auto data_size = reinterpret_cast(&__data_size); - memcpy(&__data_start, &__data_source, data_size); -} -/** - * @brief Initialize the BSS (uninitialized data section) to all zeros. - * - * Not required if the C Runtime 0 (crt0.s/.a/.o) is used as a startup routine. - */ -inline void initialize_bss_section() -{ - // Initialize statically allocated data by coping the data section from ROM to - // RAM. CRT0.o/.s does not perform .data section initialization so it must be - // done by initialize_platform. - auto bss_size = reinterpret_cast(&__bss_size); - memset(&__bss_start, 0, bss_size); -} -} // namespace hal::cortex_m diff --git a/include/libhal-arm-mcu/stm32_generic/i2c.hpp b/include/libhal-arm-mcu/stm32_generic/i2c.hpp deleted file mode 100644 index 16b8a7d..0000000 --- a/include/libhal-arm-mcu/stm32_generic/i2c.hpp +++ /dev/null @@ -1,134 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include -#include -#include -#include - -namespace hal::stm32_generic { -/** - * @brief A generic i2c implementation for all stm32 series MCUs - * - * This class is meant to only be used by platform libraries or drivers aiming - * to be platform libraries for stm32 devices. Application developers should - * use the driver specific to their platform instead of this class as they - * handle proper initialization for you. - * - */ -class i2c -{ -public: - /** - * @brief Construct a new i2c object - * Care must be taken when constructing this object. The constructor does not - * and cannot power on the i2c peripheral. Accessing the peripheral's - * registers without it be powered on (or provided a clock), will result in a - * memory fault as the peripheral cannot ACK the CPU when it attempts to - * access the peripheral's registers. The power management system for each - * peripheral across the stm32 series of MCUs is different, meaning its not - * something that can efficiently be manged by this generic driver. - * - * Things that needed to be done before construction: - * - * 1. Configure pins to be controlled by the i2c peripheral pointed to by the - * `p_peripheral_address` input parameter. - * 2. Power on the appropriate i2c peripheral - * - * After construction, execute the `configure()` function with the appropriate - * peripheral frequency and i2c settings. - * - * Performing these in this order will properly initialize the i2c driver and - * allow the usage of the `transfer()` API. Failing to execute these steps in - * this order will result in UB. - * - * NOTE: why does this driver get away with breaking the rule about - * construction means initialization? Because its constructor is marked unsafe - * meaning care needs to be taken when using this. - * - * @param p_i2c - i2c peripheral address - */ - i2c(void* p_i2c); - i2c(); - /** - * @brief Perform a transfer operation as defined in `hal::i2c::transaction` - * - * @param p_address - target i2c slave address - * @param p_data_out - outgoing data - * @param p_data_in - incoming data - * @param p_timeout - timeout function - */ - void transaction(hal::byte p_address, - std::span p_data_out, - std::span p_data_in, - hal::function_ref p_timeout); - /** - * @brief Configures i2c peripheral - * - * Because each stm32 series MCU has its own unique clock tree, there is no - * single, simple and space efficient may to determine the system's i2c clock - * speed. So the caller must supply the operating frequency of the i2c - * peripheral for this to work. This API is meant to be called by platform - * specific i2c drivers that have the necessary context and library apis to - * retrieve the i2c peripheral's clock rate. - * - * @param p_settings - i2c settings - * @param p_frequency - peripheral operating frequency - */ - void configure(hal::i2c::settings const& p_settings, hertz p_frequency); - /** - * @brief Handles i2c event interupt when using the above configuration. - * Insert this into the appropriate i2c peripheral event interupt. - * - */ - void handle_i2c_event() noexcept; - /** - * @brief Handles i2c error interupt when using the above configuration. - * Insert this into the appropriate i2c peripheral error interupt. - * - */ - void handle_i2c_error() noexcept; - /** - * @brief Destroy the i2c object - * - */ - ~i2c(); - -private: - enum class error_state : hal::u8 - { - no_error = 0, - no_such_device, - io_error, - arbitration_lost, - }; - enum class transmission_state : hal::u8 - { - transmitter, - reciever, - free, - }; - void* m_i2c; - std::span m_data_out; - std::span m_data_in; - error_state m_status{}; - hal::byte m_address = hal::byte{ 0x00 }; - transmission_state m_state = transmission_state::free; -}; -} // namespace hal::stm32_generic diff --git a/include/libhal-arm-mcu/stm32_generic/pwm.hpp b/include/libhal-arm-mcu/stm32_generic/pwm.hpp deleted file mode 100644 index 3473cc8..0000000 --- a/include/libhal-arm-mcu/stm32_generic/pwm.hpp +++ /dev/null @@ -1,161 +0,0 @@ -#pragma once - -#include - -#include -#include -#include -#include - -namespace hal::stm32_generic { - -struct pwm_channel_info -{ - /// Each Timer Peripheral has 2-4 channels, and this number allows the driver - /// to use the correct output pin - u8 channel; - /// Advanced timers work slightly different than general purpose ones. - bool is_advanced; -}; - -struct pwm_timer_frequency -{ - /// The target frequency all PWM channels within a timer will be set to - u32 pwm_frequency; - /// The timer's input clock frequency - u32 timer_clock_frequency; -}; - -/** - * @brief This class should not be constructed directly. - * - * The user should instantiate a General Purpose or Advanced timer class first, - * and then acquire a pwm pin through that class. - */ -class pwm_group_frequency final -{ -public: - /** - * @brief Construct generic stm32 pwm driver - * - * Care should be taken in constructing this outside of a platform specific - * timer class. If both a platform specific timer class and this object exist, - * care must be taken to ensure that the drivers do not conflict with each - * others. - * - * @param p_reg is a void pointer that points to the beginning of a timer - * peripheral - */ - pwm_group_frequency(hal::unsafe, void* p_reg); - - pwm_group_frequency(pwm_group_frequency const& p_other) = delete; - pwm_group_frequency& operator=(pwm_group_frequency const& p_other) = delete; - pwm_group_frequency(pwm_group_frequency&& p_other) = default; - pwm_group_frequency& operator=(pwm_group_frequency&& p_other) = default; - ~pwm_group_frequency() = default; - - /** - * @brief Set the frequency for all PWM channels controlled by the timer - * specified by the `p_reg` parameter passed at construction. - * - * @param p_timer_frequency - desired pwm frequency and input clock frequency - */ - void set_group_frequency(pwm_timer_frequency p_timer_frequency); - -private: - void* m_reg = nullptr; -}; - -/** - * @brief This class should not be constructed directly. - * - * The user should instantiate a General Purpose or Advanced timer class first, - * and then acquire a pwm pin through that class. - */ -class pwm final -{ -public: - /** - * @brief Construct generic stm32 pwm driver - * - * Care should be taken in constructing this outside of a platform specific - * timer class. If both a platform specific timer class and this object exist, - * care must be taken to ensure that the drivers do not conflict with each - * others. - * - * @param p_reg is a void pointer that points to the beginning of a timer - * peripheral - * @param p_settings consist of channel number, frequency of the timer, and a - * boolean to indicate whether the timer is advanced or not. - */ - pwm(hal::unsafe, void* p_reg, pwm_channel_info p_settings); - - /** - * @brief Construct pwm uninitialized - * - * The purpose of this is to send the settings through the initialize function - * instead, because the channel calculation and pin configuration is done in - * the constructor and the regular constructor cannot be initialized through - * the initializer list. - * - * If this constructor is used, it is unsafe to call any API of this class - * before calling the `initialize()` API with the correct inputs. Once that - * API has been called without failure, then the other APIs will become - * available. - */ - pwm(hal::unsafe) - { - } - - pwm(pwm const& p_other) = delete; - pwm& operator=(pwm const& p_other) = delete; - pwm(pwm&& p_other) = default; - pwm& operator=(pwm&& p_other) = default; - ~pwm() = default; - - /** - * @brief Initialize the driver if the `pwm(hal::unsafe)` was used - * - * This API must be called if the `pwm(hal::unsafe)` was used in order to - * initialize this class. - * - * @param p_reg - address of the timer's peripheral - * @param p_settings - pwm settings for the timer peripheral - */ - void initialize(hal::unsafe, void* p_reg, pwm_channel_info p_settings); - - /** - * @brief Acquire the operating frequency of the PWM channel - * - * @param p_timer_clock_frequency - the clock frequency driving the timer - * peripheral. - * @return u32 - the frequency of the PWM signal - */ - u32 frequency(u32 p_timer_clock_frequency); - - /** - * @brief Set pwm channel duty cycle using u16 value from 0x0000 to 0xFFFF - * - * @param p_duty_cycle - pwm duty cycle proportional value from 0x0000 to - * 0xFFFF. - */ - void duty_cycle(u16 p_duty_cycle); - - /** - * @brief Set the duty cycle using a float - * - * @param p_duty_cycle - value from - */ - inline void duty_cycle(float p_duty_cycle) - { - constexpr auto u16_max = std::numeric_limits::max(); - auto const clamped_duty_cycle = std::clamp(p_duty_cycle, 0.0f, 1.0f); - auto const u16_value = static_cast(clamped_duty_cycle * u16_max); - duty_cycle(u16_value); - } - -private: - void* m_reg = nullptr; - u32 volatile* m_compare_register_addr = nullptr; -}; -} // namespace hal::stm32_generic diff --git a/include/libhal-arm-mcu/stm32_generic/quadrature_encoder.hpp b/include/libhal-arm-mcu/stm32_generic/quadrature_encoder.hpp deleted file mode 100644 index 066725a..0000000 --- a/include/libhal-arm-mcu/stm32_generic/quadrature_encoder.hpp +++ /dev/null @@ -1,56 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once -#include -#include - -namespace hal::stm32_generic { - -/** - * @brief These are the 2 channels from the same timer that a user must use. - * They must be channel 1 and channel 2 of any timer. If channel 1 and channel 2 - * are flipped, the order of these parameters are important otherwise the - * counter will work in the opposite direction. - */ -struct encoder_channels -{ - u8 channel_a; - u8 channel_b; -}; -class quadrature_encoder : public hal::rotation_sensor -{ - -public: - quadrature_encoder(hal::unsafe, - encoder_channels channels, - void* p_reg, - u32 p_pulses_per_rotation); - quadrature_encoder(hal::unsafe); - - void initialize(hal::unsafe, - encoder_channels channels, - void* p_reg, - u32 p_pulses_per_rotation); - -private: - // should be able to take any timer pin, but the timer should be the same pin. - // when this encoder is acquired by gptimer or advanced timer, it will ensure - // that the channels are part of the same timer. - read_t driver_read() override; - void* m_reg = nullptr; - float m_pulses_per_rotation; -}; - -} // namespace hal::stm32_generic diff --git a/include/libhal-arm-mcu/stm32_generic/spi.hpp b/include/libhal-arm-mcu/stm32_generic/spi.hpp deleted file mode 100644 index f5be828..0000000 --- a/include/libhal-arm-mcu/stm32_generic/spi.hpp +++ /dev/null @@ -1,105 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include -#include - -namespace hal::stm32_generic { -/** - * @brief A generic spi implementation for all stm32f series MCUs - * - * This class is meant to only be used by platform libraries or drivers aiming - * to be platform libraries for stm32f devices. As an application develop, - * prefer to use the platform specific drivers instead as they handle all of the - * initialization for you. - * - */ -class spi -{ -public: - /** - * @brief Construct a new spi object - * - * Care must be taken when constructing this object. The constructor does not - * and cannot power on the spi peripheral. Accessing the peripheral's - * registers without it be powered on (or provided a clock), will result in a - * memory fault as the peripheral cannot ACK the CPU when it attempts to - * access the peripheral's registers. The power management system for each - * peripheral across the stm32 series of MCUs is different, meaning its not - * something that can efficiently be manged by this generic driver. - * - * After constructing this object, in order to use this driver the program - * must: - * - * 1. Configure pins to be controlled by the spi peripheral pointed to by the - * `p_peripheral_address` input parameter. - * 2. Power on the appropriate spi peripheral - * 3. Execute the `configure()` function with the appropriate peripheral - * frequency. - * - * Performing these in this order will properly initialize the spi driver and - * allow the usage of the `transfer()` API. Failing to execute these steps in - * this order will result in UB. - * - * NOTE: why does this driver get away with breaking the rule about - * construction means initialization? Because its constructor is marked unsafe - * meaning care needs to be taken when using this. - * - * @param p_peripheral_address - starting address of the spi peripheral - */ - spi(hal::unsafe, void* p_peripheral_address); - - spi(spi& p_other) = delete; - spi& operator=(spi& p_other) = delete; - spi(spi&& p_other) noexcept = delete; - spi& operator=(spi&& p_other) noexcept = delete; - ~spi(); - - /** - * @brief Configure the SPI peripheral - * - * Because each stm32f series MCU has its own unique clock tree, there is no - * single, simple and space efficient may to determine the system's spi clock - * speed. So the caller must supply the operating frequency of the spi - * peripheral for this to work. This API is meant to be called by platform - * specific spi drivers that have the necessary context and library apis to - * retrieve the spi peripheral's clock rate. - * - * @param p_settings - spi settings - * @param p_peripheral_clock_speed - peripheral's operating clock rate - */ - void configure(hal::spi::settings const& p_settings, - hal::hertz p_peripheral_clock_speed); - - /** - * @brief Perform a transfer operation as defined in `hal::spi::transfer` - * - * @param p_data_out - outgoing data - * @param p_data_in - incoming data - * @param p_filler - output filler bytes if the outgoing data runs out before - * the incoming data. - */ - void transfer(std::span p_data_out, - std::span p_data_in, - hal::byte p_filler); - -private: - void* m_peripheral_address; -}; -} // namespace hal::stm32_generic diff --git a/include/libhal-arm-mcu/stm32_generic/timer.hpp b/include/libhal-arm-mcu/stm32_generic/timer.hpp deleted file mode 100644 index 5217a6f..0000000 --- a/include/libhal-arm-mcu/stm32_generic/timer.hpp +++ /dev/null @@ -1,120 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include -#include - -namespace hal::stm32_generic { - -/** - * @brief Implements shared timer setup and control logic common to all STM32 - * series. - * - * This class provides the common functionality for timer configuration and - * control, abstracting the parts of the timer interface that remain consistent - * across different STM32 series. It is intended to be used by series-specific - * implementations, which handle MCU-specific configuration details and pass - * any required parameters to these generic functions. - */ -class timer final -{ -public: - /** - * @brief Construct timer uninitialized - * - * The purpose of this is to send the settings through the initialize function - * instead, because all the settings are series-specific. Therefore in the - * series-specific implementations of the timer, the address is deduced from - * the timer, as well as all the interrupt configuration is done, then they - * are passed to initialize. - * - * If this constructor is used, it is unsafe to call any API of this class - * before calling the `initialize()` API with the correct inputs. Once that - * API has been called without failure, then the other APIs will become - * available. - */ - timer(hal::unsafe); - - /** - * @brief Determine if the timer is currently running - * - * @return true - if a callback has been scheduled and has not been invoked - * yet, false otherwise. - */ - [[nodiscard]] bool is_running(); - - /** - * @brief Stops a scheduled event from happening. - * - * Does nothing if the timer is not currently running. - * - * Note that there must be sufficient time between the this call finishing and - * the scheduled event's termination. If this call is too close to when the - * schedule event expires, this function may not complete before the timer - * interrupt is triggered. - */ - void cancel(); - - /** - * @brief Schedule an interrupt to occur for this timer - * - * If this is called and the timer has already scheduled an event (in other - * words, `is_running()` returns true), then the previous scheduled event will - * be canceled and the new scheduled event will be started. - * - * If the delay time result in a tick period of 0, then the timer will execute - * after 1 tick period. For example, if the tick period is 1ms and the - * requested time delay is 500us, then the event will be scheduled for 1ms. - * - * If the tick period is 1ms and the requested time is 2.5ms then the event - * will be scheduled after 2 tick periods or in 2ms. - * - * @param p_delay - the amount of time until the timer expires - * @param p_timer_clock_frequency - the clock driving the timer - * @throws hal::argument_out_of_domain - if p_delay cannot be achieved. - */ - void schedule(hal::time_duration p_delay, u32 p_timer_clock_frequency); - - /** - * @brief Initialize the timer with the series-specific settings - * - * This is where the constructed uninitialized timer gets initialized. It gets - * all the series-specific settings passed to it that it needs, and it - * handles them appropriately. - * - * @param p_peripheral_address - the address of the chosen timer peripheral - * @param initialize_interrupts_function - the function needed to initialize - * interrupts for the specific series stm32. For example, for the stm32f1 - * series, the function passed would be - * `hal::stm32f1::initialize_interrupts()`. - * @param p_irq - the irq number for the chosen timer - * @param p_handler - the platform specific interrupt handler to be installed - * @throws hal::device_or_resource_busy - if the timer interrupt vector is - * already in use. - */ - void initialize(hal::unsafe, - void* p_peripheral_address, - void (*initialize_interrupts_function)(), - cortex_m::irq_t p_irq, - cortex_m::interrupt_pointer p_handler); - -private: - /// Stores the base address of the timer - void* m_reg = nullptr; -}; -} // namespace hal::stm32_generic diff --git a/include/libhal-arm-mcu/stm32_generic/uart.hpp b/include/libhal-arm-mcu/stm32_generic/uart.hpp deleted file mode 100644 index 22a7027..0000000 --- a/include/libhal-arm-mcu/stm32_generic/uart.hpp +++ /dev/null @@ -1,105 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include - -namespace hal::stm32_generic { -class uart -{ -public: - uart(void* p_uart, std::span p_receive_buffer); - /** - * @brief STM32 Common write function - * - * @param p_data Writes the data to the UART registers - * @return serial::write_t - */ - serial::write_t uart_write(std::span p_data); - /** - * @brief - * - * @param p_data Where the data gets copied to - * @param p_dma_cursor_position Where the DMA is set to - * @return serial::read_t - */ - serial::read_t uart_read(std::span& p_data, - u32 const& p_dma_cursor_position); - /** - * @brief Configures the serial port based on the settings - * - * @param p_settings - serial settings - * @param p_frequency - frequency of the input clock to the peripheral - */ - void configure(serial::settings const& p_settings, hertz p_frequency); - - u32 volatile* data_register(); - void flush(u32 p_dma_cursor_position); - u32 buffer_size(); - -private: - void configure_baud_rate(hertz p_frequency, - serial::settings const& p_settings); - void configure_format(serial::settings const& p_settings); - - void* m_uart; - std::span m_receive_buffer; - u16 m_read_index; -}; - -class zero_copy_usart -{ -public: - zero_copy_usart(void* p_uart, std::span p_receive_buffer); - /** - * @brief STM32 Common write function - * - * @param p_data Writes the data to the UART registers - * @return serial::write_t - */ - serial::write_t uart_write(std::span p_data); - /** - * @brief - * - * @param p_data Where the data gets copied to - * @param p_dma_cursor_position Where the DMA is set to - * @return serial::read_t - */ - serial::read_t uart_read(std::span& p_data, - u32 const& p_dma_cursor_position); - /** - * @brief Configures the serial port based on the settings - * - * @param p_settings - serial settings - * @param p_frequency - frequency of the input clock to the peripheral - */ - void configure(serial::settings const& p_settings, u32 p_frequency); - - u32 volatile* data_tx_register(); - bool tx_busy(); - u32 volatile* data_rx_register(); - -private: - void configure_baud_rate(hertz p_frequency, - serial::settings const& p_settings); - void configure_format(serial::settings const& p_settings); - - void* m_uart; - std::span m_receive_buffer; - u16 m_read_index; -}; -} // namespace hal::stm32_generic diff --git a/include/libhal-arm-mcu/stm32f1/adc.hpp b/include/libhal-arm-mcu/stm32f1/adc.hpp deleted file mode 100644 index 62f1cc5..0000000 --- a/include/libhal-arm-mcu/stm32f1/adc.hpp +++ /dev/null @@ -1,171 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include -#include -#include - -namespace hal::stm32f1 { - -/** - * @brief Defines the pins which can be used for analog input for adc1 and - * adc2. - */ -enum class adc_pins : hal::u8 -{ - pa0 = 0, - pa1 = 1, - pa2 = 2, - pa3 = 3, - pa4 = 4, - pa5 = 5, - pa6 = 6, - pa7 = 7, - pb0 = 8, - pb1 = 9, - pc0 = 10, - pc1 = 11, - pc2 = 12, - pc3 = 13, - pc4 = 14, - pc5 = 15, -}; - -/** - * @brief Manager for the stm32f1 series' onboard adc peripheral. Used to - * construct and manage channel objects that are tied to an adc. This also - * applies to the MCU variants that have more than one adc available. - * - */ -class adc_manager -{ -public: - template - friend class adc; - - class channel; - - /** - * @brief Creates and configures an adc channel under the calling adc - * peripheral manager. - * - * @param p_pin - The pin to be used for the channels analog input. - * @return channel - is an implementation of the `hal::adc` interface that - * represents a channel on the ADC peripheral. - */ - channel acquire_channel(adc_pins p_pin); - - adc_manager(adc_manager const& p_other) = delete; - adc_manager& operator=(adc_manager const& p_other) = delete; - adc_manager(adc_manager&& p_other) noexcept = delete; - adc_manager& operator=(adc_manager&& p_other) noexcept = delete; - -protected: - /** - * @brief Construct a new adc peripheral manager object. - * - * @param p_id - The specified adc peripheral ID to manage and use. - * @param p_lock - An externally declared lock to use for thread safety when - * trying to read from the adc's. This can be a basic_lock or any type that - * derives from it. - */ - adc_manager(peripheral p_id, hal::basic_lock& p_lock); - - float read_channel(adc_pins p_pin); - void setup(); - - /// The lock to be used for thread safety with adc reads. - hal::basic_lock* m_lock; - /// A pointer to track the location of the registers for the specified adc - /// peripheral. - void* m_reg; - /// Peripheral ID used off the peripheral on object destruction - peripheral m_id; -}; - -template -class adc final : public adc_manager -{ -public: - adc(hal::basic_lock& p_lock) - : adc_manager(select, p_lock) - { - } -}; - -/** - * @brief This class implements the `hal::adc` interface. - * - * Creates channels to be used by the adc peripheral manager to read certain - * pins' analog input. - * - */ -class adc_manager::channel : public hal::adc -{ -public: - /** - * @brief Constructs a channel object. - * - * @param p_adc - The adc peripheral manager that this channel belongs to. - * @param p_pin - The pin that will be used for this channels analog input. - */ - template - channel(stm32f1::adc& p_adc, adc_pins p_pin) - : m_manager(&p_adc) - , m_pin(p_pin) - { - } - channel(channel const& p_other) = delete; - channel& operator=(channel const& p_other) = delete; - channel(channel&& p_other) noexcept = default; - channel& operator=(channel&& p_other) noexcept = default; - ~channel() override; - -private: - friend class adc_manager; - - /** - * @brief Constructs a channel object. - * - * @param p_manager - The adc peripheral manager that this channel belongs to. - * @param p_pin - The pin that will be used for this channels analog input. - */ - channel(adc_manager& p_manager, adc_pins p_pin); - - float driver_read() override; - - /// The adc peripheral manager that manages this channel. - adc_manager* m_manager; - /// The pin that is used for this channel. - adc_pins m_pin; -}; - -template -hal::v5::strong_ptr acquire_adc( - std::pmr::polymorphic_allocator<> p_allocator, - stm32f1::adc& p_adc, - adc_pins p_pin) -{ - return hal::v5::make_strong_ptr( - p_allocator, p_adc, p_pin); -} -} // namespace hal::stm32f1 - -namespace hal { -using hal::stm32f1::acquire_adc; -} diff --git a/include/libhal-arm-mcu/stm32f1/can.hpp b/include/libhal-arm-mcu/stm32f1/can.hpp deleted file mode 100644 index da94040..0000000 --- a/include/libhal-arm-mcu/stm32f1/can.hpp +++ /dev/null @@ -1,505 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include -#include -#include -#include - -#include "pin.hpp" - -namespace hal::stm32f1 { -class [[deprecated]] can final : public hal::can -{ -public: - can(can::settings const& p_settings = {}, - can_pins p_pins = can_pins::pa11_pa12); - void enable_self_test(bool p_enable); - ~can() override; - -private: - void driver_configure(settings const& p_settings) override; - void driver_bus_on() override; - void driver_send(message_t const& p_message) override; - void driver_on_receive(hal::callback p_handler) override; -}; - -/** - * @brief Peripheral manager for the sole CAN BUS port on the stm32f1xx MCU - * - */ -class [[deprecated]] can_peripheral_manager final -{ -public: - /** - * @brief Named parameter for enabling self test at driver construction - * - */ - enum class self_test : hal::u8 - { - off = 0, - on = 1, - }; - - /** - * @brief Contains a filter and word index, used by filter implementations to - * determine which bits in the filter registers to modify. - * - */ - struct filter_resource - { - hal::u8 filter_index = 0; - hal::u8 word_index = 0; - bool filter_for_remote_request = false; - }; - - /** - * @brief Defines what a "disabled" ID would be - * - * The stm32 bxCAN system uses a series of filter bank registers. Each can be - * used to either create 4x identifier filters, 2x mask filters, 2x extended - * identifier filters or 1x extended mask filter. Entire filter bank can be - * disabled/enabled, but not on a sub-bank basis. So to support "disabling a - * filter, we simply provide IDs that we expect to never appear on the CAN bus - * and use those as a "disabled" filter state. - * - */ - enum class fifo_assignment : std::uint8_t - { - fifo1 = 0, - fifo2 = 1, - }; - - /** - * @brief Implementation of the `hal::can_transceiver` interface. - * - */ - class transceiver : public hal::can_transceiver - { - public: - transceiver(transceiver const&) = delete; - transceiver& operator=(transceiver const&) = delete; - transceiver(transceiver&&) = default; - transceiver& operator=(transceiver&&) = default; - ~transceiver() override; - - private: - friend class can_peripheral_manager; - - explicit transceiver(std::span p_receive_buffer); - - u32 driver_baud_rate() override; - void driver_send(can_message const& p_message) override; - std::span driver_receive_buffer() override; - std::size_t driver_receive_cursor() override; - }; - - /** - * @brief Implementation of the `hal::can_interrupt` interface. - * - */ - class interrupt : public hal::can_interrupt - { - public: - interrupt(interrupt const&) = delete; - interrupt& operator=(interrupt const&) = delete; - interrupt(interrupt&&) = default; - interrupt& operator=(interrupt&&) = default; - ~interrupt() override; - - private: - friend class can_peripheral_manager; - - interrupt(); - - void driver_on_receive(optional_receive_handler p_callback) override; - }; - - /** - * @brief Implementation of the `hal::can_bus_manager` interface. - * - */ - class bus_manager : public hal::can_bus_manager - { - public: - bus_manager(bus_manager const&) = delete; - bus_manager& operator=(bus_manager const&) = delete; - bus_manager(bus_manager&&) = default; - bus_manager& operator=(bus_manager&&) = default; - ~bus_manager() override; - - private: - friend class can_peripheral_manager; - - bus_manager() = default; - - void driver_baud_rate(hal::u32 p_hertz) override; - /** - * @brief Selects the filtering mode for the device - * @deprecated Do not use this API. It does nothing when called. - * - * @param p_accept - acceptance mode - */ - void driver_filter_mode(accept p_accept) override; - void driver_on_bus_off(optional_bus_off_handler p_callback) override; - void driver_bus_on() override; - }; - - /** - * @brief Implementation of the `hal::can_identifier_filter` interface. - * - */ - class identifier_filter : public hal::can_identifier_filter - { - public: - identifier_filter(identifier_filter const&) = delete; - identifier_filter& operator=(identifier_filter const&) = delete; - identifier_filter(identifier_filter&&) = default; - identifier_filter& operator=(identifier_filter&&) = default; - - private: - friend class can_peripheral_manager; - - identifier_filter() = default; - - explicit identifier_filter(filter_resource p_resource); - void driver_allow(std::optional p_id) override; - - filter_resource m_resource; - }; - - /** - * @brief Manages a single filter bank which supports up to 4x identifier - * filters. - * - * When this object is destroyed, the filter ban is deactivated and the filter - * bank is freed to be used by other filters. - * - */ - class identifier_filter_set - { - public: - /** - * @brief 4x identifier filters - * - * Each is given a portion of the filter bank to use for their own filtering - * needs. - * - */ - std::array filter; - - identifier_filter_set(identifier_filter_set const&) = delete; - identifier_filter_set& operator=(identifier_filter_set const&) = delete; - identifier_filter_set(identifier_filter_set&&) = default; - identifier_filter_set& operator=(identifier_filter_set&&) = default; - ~identifier_filter_set(); - - private: - friend class can_peripheral_manager; - - explicit identifier_filter_set(hal::u8 p_filter_index, - fifo_assignment p_fifo); - }; - - /** - * @brief Implementation of the `hal::can_extended_identifier_filter` - * interface. - * - */ - class extended_identifier_filter : public hal::can_extended_identifier_filter - { - public: - extended_identifier_filter(extended_identifier_filter const&) = delete; - extended_identifier_filter& operator=(extended_identifier_filter const&) = - delete; - extended_identifier_filter(extended_identifier_filter&&) = default; - extended_identifier_filter& operator=(extended_identifier_filter&&) = - default; - - private: - friend class can_peripheral_manager; - - explicit extended_identifier_filter(filter_resource p_resource); - void driver_allow(std::optional p_id) override; - - filter_resource m_resource; - }; - - /** - * @brief Manages a single filter bank which supports up to 2x extended - * identifier filters. - * - * When this object is destroyed, the filter ban is deactivated and the filter - * bank is freed to be used by other filters. - * - */ - class extended_identifier_filter_set - { - public: - /** - * @brief 2x extended identifier filters - * - * Each is given a portion of the filter bank to use for their own filtering - * needs. - * - */ - std::array filter; - - extended_identifier_filter_set(extended_identifier_filter_set const&) = - delete; - extended_identifier_filter_set& operator=( - extended_identifier_filter_set const&) = delete; - extended_identifier_filter_set(extended_identifier_filter_set&&) = default; - extended_identifier_filter_set& operator=( - extended_identifier_filter_set&&) = default; - ~extended_identifier_filter_set(); - - private: - friend class can_peripheral_manager; - explicit extended_identifier_filter_set(hal::u8 p_filter_index, - fifo_assignment p_fifo); - }; - - /** - * @brief Implementation of the `hal::can_mask_filter` interface. - * - */ - class mask_filter : public hal::can_mask_filter - { - public: - mask_filter(mask_filter const&) = delete; - mask_filter& operator=(mask_filter const&) = delete; - mask_filter(mask_filter&&) = default; - mask_filter& operator=(mask_filter&&) = default; - - private: - friend class can_peripheral_manager; - - explicit mask_filter(filter_resource p_resource); - void driver_allow(std::optional p_filter_pair) override; - - filter_resource m_resource; - }; - - class mask_filter_set - { - public: - /** - * @brief 2x mask filters - * - * Each is given a portion of the filter bank to use for their own filtering - * needs. - * - */ - std::array filter; - - mask_filter_set(mask_filter_set const&) = delete; - mask_filter_set& operator=(mask_filter_set const&) = delete; - mask_filter_set(mask_filter_set&&) = default; - mask_filter_set& operator=(mask_filter_set&&) = default; - ~mask_filter_set(); - - private: - friend class can_peripheral_manager; - explicit mask_filter_set(hal::u8 p_filter_index, fifo_assignment p_fifo); - }; - - /** - * @brief Implementation of the `hal::can_extended_mask_filter` interface. - * - * NOTE: extended_mask_filter does not have a "set" object because this - * implementation requires the full filter bank. - */ - class extended_mask_filter : public hal::can_extended_mask_filter - { - public: - extended_mask_filter(extended_mask_filter const&) = delete; - extended_mask_filter& operator=(extended_mask_filter const&) = delete; - extended_mask_filter(extended_mask_filter&&) = default; - extended_mask_filter& operator=(extended_mask_filter&&) = default; - ~extended_mask_filter() override; - - private: - friend class can_peripheral_manager; - explicit extended_mask_filter(hal::u8 p_filter_index, - fifo_assignment p_fifo); - - void driver_allow(std::optional p_filter_pair) override; - - hal::u8 m_filter_index; - }; - - /** - * @brief Defines what a "disabled" ID would be - * - * The stm32 bxCAN system uses a series of filter bank registers. Each can be - * used to either create 4x identifier filters, 2x mask filters, 2x extended - * identifier filters or 1x extended mask filter. Entire filter bank can be - * disabled/enabled, but not on a sub-bank basis. So to support "disabling a - * filter, we simply provide IDs that we expect to never appear on the CAN bus - * and use those as a "disabled" filter state. - * - * If {0, 0} doesn't work for you, you can choose your own sentinel value as a - * "disable id" - * - */ - struct disable_ids - { - u16 standard = 0; - u32 extended = 0; - }; - - static constexpr disable_ids disable{ .standard = 0, .extended = 0 }; - /** - * @brief Construct a new can peripheral manager object - * - * @deprecated Calling this constructor is problematic as it can halt the - * system if a hardware can transceiver is not connected to the CAN RX and CAN - * TX pins. Use the constructor that accepts a `hal::steady_clock` and timeout - * time instead. - * - * @param p_baud_rate - set baud rate of the device - * @param p_pins - CAN bus RX and TX pin selection - * @param p_disabled_ids - IDs to use as filtering values when a filter is set - * to be disabled. Choose IDs you expect will never appear on the CAN BUS. - * @param p_self_test - enable self test on construction - * @throw hal::operation_not_supported - if the baud rate is not usable - */ - [[deprecated("Calling this constructor is problematic as it can halt the " - "system if a hardware can transceiver is not connected to the " - "CAN RX and CAN TX pins. Use the constructor that accepts a " - "`hal::steady_clock` and timeout time instead.")]] - can_peripheral_manager(hal::u32 p_baud_rate, - can_pins p_pins = can_pins::pa11_pa12, - disable_ids p_disabled_ids = disable, - bool p_self_test = false); - - /** - * @brief Construct a new can peripheral manager object - * - * @param p_baud_rate - set baud rate of the device - * @param p_clock - a steady clock used to determine if initialization has - * exceeded the p_timeout_time. - * @param p_timeout_time - the amount of time to wait for initialization - * before throwing `hal::timed_out`. - * @param p_pins - CAN bus RX and TX pin selection - * @param p_enable_self_test - determines if self test is enabled at - * construction. - * @param p_disabled_ids - IDs to use as filtering values when a filter is set - * to be disabled. Choose IDs you expect will never appear on the CAN BUS. - * @throw hal::operation_not_supported - if the baud rate is not usable - * @throw hal::timed_out - if can peripheral initialization - */ - can_peripheral_manager( - hal::u32 p_baud_rate, - hal::steady_clock& p_clock, - hal::time_duration p_timeout_time = std::chrono::milliseconds(1), - can_pins p_pins = can_pins::pa11_pa12, - self_test p_enable_self_test = self_test::off, - disable_ids p_disabled_ids = disable); - - can_peripheral_manager(can_peripheral_manager const&) = delete; - can_peripheral_manager& operator=(can_peripheral_manager const&) = delete; - can_peripheral_manager(can_peripheral_manager&&) = delete; - can_peripheral_manager& operator=(can_peripheral_manager&&) = delete; - - void enable_self_test(bool p_enable); - - /** - * @brief Acquire an `hal::can_transceiver` implementation - * - * @return transceiver - object implementing the `hal::can_transceiver` - * interface for this can peripheral. - */ - [[deprecated( - "The returned object has lifetime safety issues when moved. Please use the " - "`hal::acquire_transceiver(manager);` function instead.")]] - transceiver acquire_transceiver(std::span p_receive_buffer); - - /** - * @brief Acquire an `hal::can_bus_manager` implementation - * - * @return bus_manager - object implementing the `hal::can_bus_manager` - * interface for this can peripheral. - */ - [[deprecated( - "The returned object has lifetime safety issues when moved. Please use the " - "`hal::acquire_bus_manager(manager);` function instead.")]] - bus_manager acquire_bus_manager(); - - /** - * @brief Acquire an `hal::can_interrupt` implementation - * - * @return interrupt - object implementing the `hal::can_interrupt` interface - * for this can peripheral. - */ - [[deprecated( - "The returned object has lifetime safety issues when moved. Please use the " - "`hal::acquire_interrupt(manager);` function instead.")]] - interrupt acquire_interrupt(); - - /** - * @brief Acquire a set of 4x standard identifier filters - * - * @return identifier_filter_set - A set of 4x identifier filters. When - * destroyed, releases the filter resource it held on to. - */ - [[deprecated( - "The returned object has lifetime safety issues when moved. Please use the " - "`hal::acquire_identifier_filter(manager);` function instead.")]] - identifier_filter_set acquire_identifier_filter( - fifo_assignment p_fifo = fifo_assignment::fifo1); - - /** - * @brief Acquire a pair of two extended identifier filters - * - * @return extended_identifier_filter_set - A set of 2x extended identifier - * filters. - */ - [[deprecated( - "The returned object has lifetime safety issues when moved. Please use the " - "`hal::acquire_extended_identifier_filter(manager);` function instead.")]] - extended_identifier_filter_set acquire_extended_identifier_filter( - fifo_assignment p_fifo = fifo_assignment::fifo1); - - /** - * @brief Acquire a pair of mask filters - * - * @return mask_filter_set - A set of 2x standard mask filters - */ - [[deprecated( - "The returned object has lifetime safety issues when moved. Please use the " - "`hal::acquire_mask_filter(manager);` function instead.")]] - mask_filter_set acquire_mask_filter( - fifo_assignment p_fifo = fifo_assignment::fifo1); - - /** - * @brief An extended mask filters - * - * @return extended_mask_filter - An extended mask filter - */ - [[deprecated( - "The returned object has lifetime safety issues when moved. Please use the " - "`hal::acquire_extended_mask_filter(manager);` function instead.")]] - extended_mask_filter acquire_extended_mask_filter( - fifo_assignment p_fifo = fifo_assignment::fifo1); - - ~can_peripheral_manager(); -}; -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/can2.hpp b/include/libhal-arm-mcu/stm32f1/can2.hpp deleted file mode 100644 index d85e425..0000000 --- a/include/libhal-arm-mcu/stm32f1/can2.hpp +++ /dev/null @@ -1,308 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "pin.hpp" - -namespace hal::stm32f1 { -/** - * @brief Defines what a "disabled" ID would be - * - * The stm32 bxCAN system uses a series of filter bank registers. Each can be - * used to either create 4x identifier filters, 2x mask filters, 2x extended - * identifier filters or 1x extended mask filter. Entire filter bank can be - * disabled/enabled, but not on a sub-bank basis. So to support "disabling a - * filter, we simply provide IDs that we expect to never appear on the CAN bus - * and use those as a "disabled" filter state. - * - */ -enum class can_fifo : std::uint8_t -{ - select1 = 0, - select2 = 1, -}; - -/** - * @brief Named parameter for enabling self test at driver construction - * - */ -enum class can_self_test : hal::u8 -{ - off = 0, - on = 1, -}; - -/** - * @brief Contains a filter and word index, used by filter implementations to - * determine which bits in the filter registers to modify. - * - */ -struct can_filter_resource -{ - hal::u8 filter_index = 0; - hal::u8 word_index = 0; - bool filter_for_remote_request = false; -}; - -class can_peripheral_manager_v2 -{ -public: - /** - * @brief Construct a new can peripheral manager v2 object - * - * @param p_allocator - allocator used to allocate receive buffer - * @param p_message_count - number of messages the receive buffer will hold - * @param p_clock - a steady clock used to determine if initialization has - * exceeded the p_timeout_time. - * @param p_timeout_time - the amount of time to wait for initialization - * before throwing `hal::timed_out`. - * @param p_baud_rate - set baud rate of the device - * @param p_pins - CAN bus RX and TX pin selection - * @param p_enable_self_test - determines if self test is enabled at - * construction. - * @throw hal::operation_not_supported - if the baud rate is not usable - * @throw hal::timed_out - if can peripheral initialization - */ - can_peripheral_manager_v2( - hal::usize p_message_count, - std::pmr::polymorphic_allocator<> p_allocator, - hal::u32 p_baud_rate, - hal::steady_clock& p_clock, - hal::time_duration p_timeout_time = std::chrono::milliseconds(1), - can_pins p_pins = can_pins::pa11_pa12, - can_self_test p_enable_self_test = can_self_test::off); - - can_peripheral_manager_v2(can_peripheral_manager_v2 const&) = delete; - can_peripheral_manager_v2& operator=(can_peripheral_manager_v2 const&) = - delete; - can_peripheral_manager_v2(can_peripheral_manager_v2&&) = delete; - can_peripheral_manager_v2& operator=(can_peripheral_manager_v2&&) = delete; - ~can_peripheral_manager_v2(); - - /** - * @brief Enable/disable self test mode - * - * Self test mode allows message loopback. This mode allows messages sent from - * this device's can transceiver to be received back by this device. - * - * @param p_enable - enable self test mode - */ - void enable_self_test(bool p_enable); - - /** - * @brief Set can peripheral's baud rate - * - * @param p_hertz - baud rate in hertz - */ - void baud_rate(hal::u32 p_hertz); - - /** - * @brief Get can peripheral's baud rate - * - * @return hal::u32 - baud rate in hertz - */ - hal::u32 baud_rate() const; - - /** - * @brief Send a can message - * - * @param p_message - */ - void send(can_message const& p_message); - - /** - * @brief Set callback on message reception - * - * @param p_callback - callback to be called on each received message - */ - void on_receive( - hal::can_interrupt::optional_receive_handler const& p_callback); - - /** - * @brief Exit "bus-off" state if the device is in that state. - * - * If the device is already bus-on then nothing happens. - * - */ - void bus_on(); - - /** - * @brief Get a view of the circular receive buffer - * - * @return std::span - span of received messages - */ - std::span receive_buffer() - { - return { m_buffer.data(), m_buffer.capacity() }; - } - - /** - * @brief Get the current write index of the circular receive buffer - * - * @return std::size_t - current write position in the buffer - */ - std::size_t receive_cursor() - { - return m_buffer.write_index(); - } - - /** - * @brief Scan through the acquired banks and return the index to an available - * one. - * - * @return hal::u8 - returns the index of the filter banks that has been - * acquired for the caller. - * @throws hal::resource_unavailable_try_again - if no filter banks are - * available - */ - [[nodiscard("This value must be saved in order to be cleared later")]] hal::u8 - available_filter(); - - /** - * @brief Release filter bank - * - * NOTE: This should only be used by the internal drivers and not by callers - * otherwise, resources can be forgotten. - * - * @param p_filter_bank - filter to release - */ - void release_filter(hal::u8 p_filter_bank); - -private: - std::bitset<28> m_acquired_banks{}; - hal::v5::circular_buffer m_buffer; - hal::u32 m_current_baud_rate = 0; - can_interrupt::optional_receive_handler m_receive_handler{}; -}; - -/** - * @brief Acquire a `hal::can_transceiver` from the stm32f1 - * can_peripheral_manager - * - * @param p_allocator - allocator used to the driver - * @param p_manager - Manager for which to extract the can_transceiver - * circular buffer in can hold. - * @return hal::v5::strong_ptr - can transceiver - */ -hal::v5::strong_ptr acquire_can_transceiver( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager); - -/** - * @brief Acquire a `hal::can_bus_manager` from the stm32f1 - * can_peripheral_manager. - * - * @param p_allocator - allocator for the object - * @param p_manager - Manager for which to extract the can_bus_manager - * @return hal::v5::strong_ptr - */ -hal::v5::strong_ptr acquire_can_bus_manager( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager); - -/** - * @brief Acquire an `hal::can_interrupt` implementation - * - * @param p_allocator - allocator used to the driver - * @param p_manager - Manager for which to extract the can_interrupt - * @return hal::v5::strong_ptr - object implementing the - * `hal::can_interrupt` interface for this can peripheral. - */ -hal::v5::strong_ptr acquire_can_interrupt( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager); - -/** - * @brief Acquire a set of 4x standard identifier filters - * - * @param p_allocator - allocator used to the driver - * @param p_manager - Manager for which to extract the filter - * @param p_fifo - Select the FIFO to store the received message - * @return std::array, 4> - - * A set of 4x identifier filters. When destroyed, releases the filter resource - * it held on to. - */ -std::array, 4> -acquire_can_identifier_filter( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo = can_fifo::select1); - -/** - * @brief Acquire a pair of two extended identifier filters - * - * @param p_allocator - allocator used to the driver - * @param p_manager - Manager for which to extract the filter - * @param p_fifo - Select the FIFO to store the received message - * @return std::array, - * 2> - A set of 2x extended identifier filters. - */ -std::array, 2> -acquire_can_extended_identifier_filter( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo = can_fifo::select1); - -/** - * @brief Acquire a pair of mask filters - * - * @param p_allocator - allocator used to the driver - * @param p_manager - Manager for which to extract the filter - * @param p_fifo - Select the FIFO to store the received message - * @return std::array, 2> - A set of - * 2x standard mask filters - */ -std::array, 2> -acquire_can_mask_filter( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo = can_fifo::select1); - -/** - * @brief Acquire a single extended identifier mask filter - * - * @param p_allocator - allocator used to the driver - * @param p_manager - Manager for which to extract the filter - * @param p_fifo - Select the FIFO to store the received message - * @return hal::v5::strong_ptr - extended mask - * filter - */ -hal::v5::strong_ptr -acquire_can_extended_mask_filter( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo = can_fifo::select1); - -} // namespace hal::stm32f1 - -namespace hal { -using stm32f1::acquire_can_bus_manager; -using stm32f1::acquire_can_extended_identifier_filter; -using stm32f1::acquire_can_extended_mask_filter; -using stm32f1::acquire_can_identifier_filter; -using stm32f1::acquire_can_interrupt; -using stm32f1::acquire_can_mask_filter; -using stm32f1::acquire_can_transceiver; -} // namespace hal diff --git a/include/libhal-arm-mcu/stm32f1/clock.hpp b/include/libhal-arm-mcu/stm32f1/clock.hpp deleted file mode 100644 index 20e2c97..0000000 --- a/include/libhal-arm-mcu/stm32f1/clock.hpp +++ /dev/null @@ -1,205 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include "constants.hpp" - -namespace hal::stm32f1 { - -using namespace hal::literals; - -/// Constant for the frequency of the LSE -constexpr auto internal_low_speed_oscillator = 20.0_kHz; - -/// Constant for the frequency of the HSE -constexpr auto internal_high_speed_oscillator = 8.0_MHz; - -/// Constant for the frequency of the Flash Controller -constexpr auto flash_clock = internal_high_speed_oscillator; - -/// Constant for the frequency of the Watch Dog Peripheral -constexpr auto watchdog_clock_rate = internal_low_speed_oscillator; - -/// Available dividers for the APB bus -enum class apb_divider : std::uint8_t -{ - divide_by_1 = 0, - divide_by_2 = 0b100, - divide_by_4 = 0b101, - divide_by_8 = 0b110, - divide_by_16 = 0b111, -}; - -/// Available dividers for the AHB bus -enum class ahb_divider : std::uint8_t -{ - divide_by_1 = 0, - divide_by_2 = 0b1000, - divide_by_4 = 0b1001, - divide_by_8 = 0b1010, - divide_by_16 = 0b1011, - divide_by_64 = 0b1100, - divide_by_128 = 0b1101, - divide_by_256 = 0b1110, - divide_by_512 = 0b1111, -}; - -/// Available dividers for the ADC bus -enum class adc_divider : std::uint8_t -{ - divide_by_2 = 0b00, - divide_by_4 = 0b01, - divide_by_6 = 0b10, - divide_by_8 = 0b11, -}; - -/// Available clock sources available for the system clock -enum class system_clock_select : std::uint8_t -{ - high_speed_internal = 0b00, - high_speed_external = 0b01, - pll = 0b10, -}; - -/// PLL frequency multiplication options. -enum class pll_multiply : std::uint8_t -{ - multiply_by_2 = 0b0000, - multiply_by_3 = 0b0001, - multiply_by_4 = 0b0010, - multiply_by_5 = 0b0011, - multiply_by_6 = 0b0100, - multiply_by_7 = 0b0101, - multiply_by_8 = 0b0110, - multiply_by_9 = 0b0111, - multiply_by_10 = 0b1000, - multiply_by_11 = 0b1001, - multiply_by_12 = 0b1010, - multiply_by_13 = 0b1011, - multiply_by_14 = 0b1100, - multiply_by_15 = 0b1101, - multiply_by_16 = 0b1110, -}; - -/// Available clock sources for the RTC -enum class rtc_source : std::uint8_t -{ - no_clock = 0b00, - low_speed_internal = 0b01, - low_speed_external = 0b10, - high_speed_external_divided_by_128 = 0b11, -}; - -/// Available clock sources for the PLL -enum class pll_source : std::uint8_t -{ - internal_8mhz_divided_by_2 = 0b0, - high_speed_external = 0b1, - high_speed_external_divided_by_2 = 0b11, -}; - -/// Available dividers for the USB peripheral -enum class usb_divider : std::uint8_t -{ - /// Divide by 1.5 - divide_by_1_point_5 = 0, - divide_by_1 = 1, -}; - -struct clock_tree -{ - /// Defines the frequency of the high speed external clock signal - hal::hertz high_speed_external = 0.0_MHz; - - /// Defines the frequency of the low speed external clock signal. - hal::hertz low_speed_external = 0.0_MHz; - - /// Defines the configuration of the PLL - struct pll_t - { - bool enable = false; - pll_source source = pll_source::internal_8mhz_divided_by_2; - pll_multiply multiply = pll_multiply::multiply_by_2; - struct usb_divider_t - { - usb_divider divider = usb_divider::divide_by_1_point_5; - } usb = {}; - } pll = {}; - - /// Defines which clock source will be use for the system. - /// @warning System will lock up in the following situations: - /// - Select PLL, but PLL is not enabled - /// - Select PLL, but PLL frequency is too high - /// - Select High Speed External, but the frequency is kept at - /// 0_Mhz. - system_clock_select system_clock = system_clock_select::high_speed_internal; - - /// Defines the configuration for the RTC - struct rtc_t - { - bool enable = false; - rtc_source source = rtc_source::no_clock; - } rtc = {}; - - /// Defines the configuration of the dividers beyond system clock mux. - struct ahb_t - { - ahb_divider divider = ahb_divider::divide_by_1; - /// Maximum rate of 36 MHz - struct apb1_t - { - apb_divider divider = apb_divider::divide_by_1; - } apb1 = {}; - - /// Maximum rate of 72 MHz - struct apb2_t - { - apb_divider divider = apb_divider::divide_by_1; - /// Maximum of 14 MHz - struct adc_t - { - adc_divider divider = adc_divider::divide_by_2; - } adc = {}; - } apb2 = {}; - } ahb = {}; -}; - -/// @attention If configuration of the system clocks is desired, one should -/// consult the user manual of the target MCU in use to determine -/// the valid clock configuration values that can/should be used. -/// The Initialize() method is only responsible for configuring the -/// clock system based on configurations in the -/// clock_configuration. Incorrect configurations may result in a -/// hard fault or cause the clock system(s) to supply incorrect -/// clock rate(s). -/// -/// @see Figure 11. Clock Tree -/// https://www.st.com/resource/en/reference_manual/cd00171190-stm32f101xx-stm32f102xx-stm32f103xx-stm32f105xx-and-stm32f107xx-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf#page=126 -void configure_clocks(clock_tree p_clock_tree); - -/// @return the clock rate frequency of a peripheral -hal::hertz frequency(peripheral p_id); - -/** - * @brief Sets every bus to its maximum possible frequency using the internal - * oscillator - * - * NOTE: USB cannot be used in this configuration. - */ -void maximum_speed_using_internal_oscillator(); -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/constants.hpp b/include/libhal-arm-mcu/stm32f1/constants.hpp deleted file mode 100644 index 61afb92..0000000 --- a/include/libhal-arm-mcu/stm32f1/constants.hpp +++ /dev/null @@ -1,270 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::stm32f1 { - -/// Number of bits between each enable register -static constexpr u32 bus_id_offset = 32; -/// Bit position of AHB -static constexpr u32 ahb_bus = bus_id_offset * 0; -/// Bit position of APB1 -static constexpr u32 apb1_bus = bus_id_offset * 1; -/// Bit position of AHB2 -static constexpr u32 apb2_bus = bus_id_offset * 2; -/// Bit position of systems outside of any bus -static constexpr u32 beyond_bus = bus_id_offset * 3; - -/// List of each peripheral and their power on id number for this platform -enum class peripheral : u8 -{ - dma1 = ahb_bus + 0, - dma2 = ahb_bus + 1, - sram = ahb_bus + 2, - flitf = ahb_bus + 4, - crc = ahb_bus + 6, - fsmc = ahb_bus + 8, - sdio = ahb_bus + 10, - - timer2 = apb1_bus + 0, - timer3 = apb1_bus + 1, - timer4 = apb1_bus + 2, - timer5 = apb1_bus + 3, - timer6 = apb1_bus + 4, - timer7 = apb1_bus + 5, - timer12 = apb1_bus + 6, - timer13 = apb1_bus + 7, - timer14 = apb1_bus + 8, - window_watchdog = apb1_bus + 11, - spi2 = apb1_bus + 14, - spi3 = apb1_bus + 15, - usart2 = apb1_bus + 17, - usart3 = apb1_bus + 18, - uart4 = apb1_bus + 19, - uart5 = apb1_bus + 20, - i2c1 = apb1_bus + 21, - i2c2 = apb1_bus + 22, - usb = apb1_bus + 23, - can1 = apb1_bus + 25, - backup_clock = apb1_bus + 27, - power = apb1_bus + 28, - dac = apb1_bus + 29, - - afio = apb2_bus + 0, - gpio_a = apb2_bus + 2, - gpio_b = apb2_bus + 3, - gpio_c = apb2_bus + 4, - gpio_d = apb2_bus + 5, - gpio_e = apb2_bus + 6, - gpio_f = apb2_bus + 7, - gpio_g = apb2_bus + 8, - adc1 = apb2_bus + 9, - adc2 = apb2_bus + 10, - timer1 = apb2_bus + 11, - spi1 = apb2_bus + 12, - timer8 = apb2_bus + 13, - usart1 = apb2_bus + 14, - adc3 = apb2_bus + 15, - timer9 = apb2_bus + 19, - timer10 = apb2_bus + 20, - timer11 = apb2_bus + 21, - - cpu = beyond_bus + 0, - system_timer = beyond_bus + 1, - i2s = beyond_bus + 2, - -}; - -/// List of interrupt request numbers for this platform -enum class irq : cortex_m::irq_t // NOLINT(performance-enum-size) -{ - /// Window WatchDog - window_watchdog = 0, - /// PVD through EXTI Line detection - pvd = 1, - /// Tamper - tamper = 2, - /// RTC - rtc = 3, - /// FLASH - flash = 4, - /// RCC - rcc = 5, - /// EXTI Line0 - exti0 = 6, - /// EXTI Line1 - exti1 = 7, - /// EXTI Line2 - exti2 = 8, - /// EXTI Line3 - exti3 = 9, - /// EXTI Line4 - exti4 = 10, - /// DMA1 Channel 1 - dma1_channel1 = 11, - /// DMA1 Channel 2 - dma1_channel2 = 12, - /// DMA1 Channel 3 - dma1_channel3 = 13, - /// DMA1 Channel 4 - dma1_channel4 = 14, - /// DMA1 Channel 5 - dma1_channel5 = 15, - /// DMA1 Channel 6 - dma1_channel6 = 16, - /// DMA1 Channel 7 - dma1_channel7 = 17, - /// ADC1 - adc1 = 18, - /// ADC1 and ADC2 - adc1_2 = 18, - /// USB Device High Priority or CAN1 TX - usb_hp_can1_tx = 19, - /// USB Device High Priority or CAN1 TX - can1_tx = 19, - /// USB Device Low Priority or CAN1 RX0 - usb_lp_can1_rx0 = 20, - /// USB Device Low Priority or CAN1 RX0 - can1_rx0 = 20, - /// CAN1 RX1 - can1_rx1 = 21, - /// CAN1 SCE - can1_sce = 22, - /// External Line[9:5] - exti9_5 = 23, - /// TIM1 Break - tim1_brk = 24, - /// TIM1 Break and TIM15 - tim1_brk_tim15 = 24, - /// TIM1 Break and TIM9 - tim1_brk_tim9 = 24, - /// TIM1 Update - tim1_up = 25, - /// TIM1 Update and TIM16 - tim1_up_tim16 = 25, - /// TIM1 Update and TIM10 - tim1_up_tim10 = 25, - /// TIM1 Trigger and Commutation - tim1_trg_com = 26, - /// TIM1 Trigger and Commutation - tim1_trg_com_tim11 = 26, - /// TIM1 Capture Compare - tim1_cc = 27, - /// TIM2 - tim2 = 28, - /// TIM3 - tim3 = 29, - /// TIM4 - tim4 = 30, - /// I2C1 Event - i2c1_ev = 31, - /// I2C1 Error - i2c1_er = 32, - /// I2C2 Event - i2c2_ev = 33, - /// I2C2 Error - i2c2_er = 34, - /// SPI1 - spi1 = 35, - /// SPI2 - spi2 = 36, - /// USART1 - usart1 = 37, - /// USART2 - usart2 = 38, - /// USART3 - usart3 = 39, - /// External Line[15:10] - exti15_10 = 40, - /// RTC Alarm through EXTI Line - rtcalarm = 41, - /// USB Device WakeUp - usbwakeup = 42, - /// HDMI-CEC - cec = 42, - /// USB OTG FS WakeUp - otg_fs_wkup = 42, - /// TIM8 Break - tim8_brk = 43, - /// TIM12 - tim12 = 43, - /// TIM8 Break and TIM12 - tim8_brk_tim12 = 43, - /// TIM8 Update - tim8_up = 44, - /// TIM13 - tim13 = 44, - /// TIM8 Update and TIM13 - tim8_up_tim13 = 44, - /// TIM8 Trigger and Commutation - tim8_trg_com = 45, - /// TIM14 - tim14 = 45, - /// TIM8 Trigger and Commutation - tim8_trg_com_tim14 = 45, - /// TIM8 Capture Compare - tim8_cc = 46, - /// ADC3 - adc3 = 47, - /// FSMC - fsmc = 48, - /// SDIO - sdio = 49, - /// TIM5 - tim5 = 50, - /// SPI3 - spi3 = 51, - /// UART4 - uart4 = 52, - /// UART5 - uart5 = 53, - /// TIM6 and DAC underrun - tim6_dac = 54, - /// TIM6 - tim6 = 54, - /// TIM7 - tim7 = 55, - /// DMA2 Channel 1 - dma2_channel1 = 56, - /// DMA2 Channel 2 - dma2_channel2 = 57, - /// DMA2 Channel 3 - dma2_channel3 = 58, - /// DMA2 Channel 4 and Channel 5 - dma2_channel4_5 = 59, - /// DMA2 Channel 4 - dma2_channel4 = 59, - /// DMA2 Channel 5 - dma2_channel5 = 60, - /// Ethernet - eth = 61, - /// Ethernet Wakeup through EXTI line - eth_wkup = 62, - /// CAN2 TX - can2_tx = 63, - /// CAN2 RX0 - can2_rx0 = 64, - /// CAN2 RX1 - can2_rx1 = 65, - /// CAN2 SCE - can2_sce = 66, - /// USB OTG FS - otg_fs = 67, - max, -}; -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/dma.hpp b/include/libhal-arm-mcu/stm32f1/dma.hpp deleted file mode 100644 index cfba97a..0000000 --- a/include/libhal-arm-mcu/stm32f1/dma.hpp +++ /dev/null @@ -1,23 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -namespace hal::stm32f1 { -/// Maximum length of a buffer that the stm32f1xxx series dma controller can -/// handle. -constexpr u32 max_dma_length = 65'535; -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/gpio.hpp b/include/libhal-arm-mcu/stm32f1/gpio.hpp deleted file mode 100644 index c280229..0000000 --- a/include/libhal-arm-mcu/stm32f1/gpio.hpp +++ /dev/null @@ -1,241 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include -#include -#include -#include - -#include "constants.hpp" -#include "pin.hpp" - -namespace hal::stm32f1 { -/** - * @brief Implementation of the GPIO port manager class - * - * This class has a private constructor and can only be used via its derived - * class `gpio` class. - * - */ -class gpio_manager -{ -public: - template - friend class gpio; - - gpio_manager(gpio_manager&) = delete; - gpio_manager& operator=(gpio_manager&) = delete; - gpio_manager(gpio_manager&&) noexcept = default; - gpio_manager& operator=(gpio_manager&&) noexcept = default; - /** - * @brief Destroy the gpio port manager object - * - * This actually does nothing as this driver cannot disable the GPIO port - * peripherals if other pins are used within the application. - */ - ~gpio_manager() = default; - - class input; - class output; - class interrupt; - - input acquire_input_pin(u8 p_pin, input_pin::settings const& p_settings = {}); - output acquire_output_pin(u8 p_pin, - output_pin::settings const& p_settings = {}); - interrupt acquire_interrupt_pin( - u8 p_pin, - interrupt_pin::settings const& p_settings = {}); - -private: - friend hal::v5::strong_ptr acquire_input_pin( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr p_manager, - u8 p_pin, - input_pin::settings const& p_settings); - - friend hal::v5::strong_ptr acquire_output_pin( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr p_manager, - u8 p_pin, - output_pin::settings const& p_settings); - - gpio_manager(peripheral p_select); - peripheral m_port; -}; - -/** - * @brief Gpio manager for the gpio ports A through to G. - * - * Use the acquire APIs in order to get input and output pins. If a pin is - * already in use, the `hal::device_or_resource_busy` will be thrown. - * - * @tparam select - gpio peripheral port selection. Only peripheral::gpio_a to - * peripheral::gpio_g. - */ -template -class gpio final : public gpio_manager -{ -public: - static_assert(select == peripheral::gpio_a or /* line break */ - select == peripheral::gpio_b or - select == peripheral::gpio_c or - select == peripheral::gpio_d or - select == peripheral::gpio_e or - select == peripheral::gpio_f or /* line break */ - select == peripheral::gpio_g, - "Only peripheral gpio_(a to g) is allowed for this class"); - gpio() - : gpio_manager(select) - { - } - ~gpio() = default; -}; - -class gpio_manager::input final : public hal::input_pin -{ -public: - template - input(gpio const&, u8 p_pin, settings const& p_settings = {}) - : input(port, p_pin, p_settings) - { - } - -private: - friend class gpio_manager; - - friend hal::v5::strong_ptr acquire_input_pin( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr p_manager, - u8 p_pin, - input_pin::settings const& p_settings); - - input(peripheral p_port, u8 p_pin, settings const& p_settings); - - void driver_configure(settings const& p_settings) override; - bool driver_level() override; - - pin_select m_pin; -}; - -class gpio_manager::output final : public hal::output_pin -{ -public: - template - output(gpio const&, u8 p_pin, settings const& p_settings = {}) - : output(port, p_pin, p_settings) - { - } - -private: - friend class gpio_manager; - - friend hal::v5::strong_ptr acquire_output_pin( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr p_manager, - u8 p_pin, - output_pin::settings const& p_settings); - - output(peripheral p_port, u8 p_pin, settings const& p_settings); - - void driver_configure(settings const& p_settings) override; - void driver_level(bool p_high) override; - bool driver_level() override; - - pin_select m_pin; -}; - -class gpio_manager::interrupt final : public hal::interrupt_pin -{ -public: - template - interrupt(gpio const&, u8 p_pin, settings const& p_settings = {}) - : interrupt(port, p_pin, p_settings) - { - } - -private: - friend class gpio_manager; - - interrupt(peripheral p_port, u8 p_pin, settings const& p_settings); - - void setup_interrupt(); - void driver_configure(settings const& p_settings) override; - void driver_on_trigger(hal::callback p_callback) override; - - cortex_m::irq_t get_irq(); - - pin_select m_pin; -}; - -/** - * @brief Acquire an input pin from a gpio port - * - * Input pins returned from this API are not considered consumed by the manager. - * Thus an exception representing an exhausted resource is not thrown. This - * allows the caller to acquire the same pin multiple times if they wish, - * without error. The only consequence is the generation of additional ref - * counted control blocks for each instance. To conserve memory, it is better to - * acquire the pin once and pass that around to multiple readers. - * - * @param p_allocator - allocator used to allocate the memory for the object - * @param p_manager - the manager for the gpio port to acquire an input pin - * from. For example, if you want pin A1, you will need the manager for port A - * and pass the number `1` to parameter `p_pin`. - * @param p_pin - The pin number to acquire from this port - * @param p_settings - initial settings for the input pin. - * @return hal::v5::strong_ptr - input pin acquired from gpio - * port. - */ -hal::v5::strong_ptr acquire_input_pin( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - u8 p_pin, - input_pin::settings const& p_settings = {}); - -/** - * @brief Acquire an output pin from a gpio port - * - * Output pins returned from this API are considered consumed by the manager. - * This means that only one instance of an output pin from this gpio manager can - * be acquired at a time. Attempting to create two instances of the same output - * pin, having two writers to that peripheral, will result in the exception - * `hal::device_or_resource_busy` being called with the instance value set to - * the gpio_manager's address. - * - * @param p_allocator - allocator used to allocate the memory for the object - * @param p_manager - the manager for the gpio port to acquire an output pin - * from. For example, if you want pin A1, you will need the manager for port A - * and pass the number `1` to parameter `p_pin` - * @param p_pin - The pin number to acquire from this port - * @param p_settings - initial settings for the output pin - * @return hal::v5::strong_ptr - output pin acquired from gpio - * port. - * @throw hal::device_or_resource_busy - if the output pin was already acquired - * somewhere else in the program. - */ -hal::v5::strong_ptr acquire_output_pin( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - u8 p_pin, - output_pin::settings const& p_settings = {}); -} // namespace hal::stm32f1 - -namespace hal { -using stm32f1::acquire_input_pin; -using stm32f1::acquire_output_pin; -} // namespace hal diff --git a/include/libhal-arm-mcu/stm32f1/independent_watchdog.hpp b/include/libhal-arm-mcu/stm32f1/independent_watchdog.hpp deleted file mode 100644 index accd016..0000000 --- a/include/libhal-arm-mcu/stm32f1/independent_watchdog.hpp +++ /dev/null @@ -1,52 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once -#include - -namespace hal::stm32f1 { - -class independent_watchdog -{ -public: - /** - * @brief start the watchdog countdown - */ - void start(); - /** - * @brief resets the watchdog countdown - */ - void reset(); - /** - * @brief configures the watchdog countdown frequency and counter to specified - * time - * - * @param p_wait_time coundown time till the watchdog resets - * - * the actual wait time may be 66%-133% of the specified time due to clock - * variance (sec. 7.2.5, pg. 96) - */ - void set_countdown_time(hal::time_duration p_wait_time); - - /** - * @brief checks if watchdog reset flag is set - */ - bool check_flag(); - /** - * @brief clears reset flags - */ - void clear_flag(); -}; - -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/input_pin.hpp b/include/libhal-arm-mcu/stm32f1/input_pin.hpp deleted file mode 100644 index 05659d0..0000000 --- a/include/libhal-arm-mcu/stm32f1/input_pin.hpp +++ /dev/null @@ -1,50 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::stm32f1 { -/** - * @brief Input pin implementation for the stm32f10x - * @deprecated Use the `hal::gpio` class instead. This will be - * removed in the next later stage. - * - * Input pin only seems to support floating pins, does not support pull up or - * pull down - * - */ -class input_pin final : public hal::input_pin -{ -public: - /** - * @brief Get the input pin object - * - * @param p_port - selects pin port to use - * @param p_pin - selects which pin within the port to use - * @throws hal::argument_out_of_domain - if the port and pin are not valid - */ - input_pin(u8 p_port, // NOLINT - u8 p_pin); // NOLINT - -private: - void driver_configure(settings const& p_settings) override; - bool driver_level() override; - - u8 m_port{}; - u8 m_pin{}; -}; -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/interrupt.hpp b/include/libhal-arm-mcu/stm32f1/interrupt.hpp deleted file mode 100644 index 9cca0a8..0000000 --- a/include/libhal-arm-mcu/stm32f1/interrupt.hpp +++ /dev/null @@ -1,26 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -namespace hal::stm32f1 { -/** - * @brief Initialize interrupts for the stm32f1 series processors - * - * Only initializes after the first call. Does nothing afterwards. Can be - * called multiple times without issue. - * - */ -void initialize_interrupts(); -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/output_pin.hpp b/include/libhal-arm-mcu/stm32f1/output_pin.hpp deleted file mode 100644 index fc8847c..0000000 --- a/include/libhal-arm-mcu/stm32f1/output_pin.hpp +++ /dev/null @@ -1,50 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::stm32f1 { -/** - * @brief Output pin implementation for the stm32::f10x - * @deprecated Use the `hal::gpio` class instead. This will be - * removed in the next later stage. - * - */ -class output_pin final : public hal::output_pin -{ -public: - /** - * @brief Get the output pin object - * - * @param p_port - selects pin port to use - * @param p_pin - selects which pin within the port to use - * @param p_settings - initial pin settings - * @throws hal::argument_out_of_domain - if the port and pin are not valid - */ - output_pin(u8 p_port, // NOLINT - u8 p_pin, // NOLINT - output_pin::settings p_settings = {}); - -private: - void driver_configure(settings const& p_settings) override; - void driver_level(bool p_high) override; - bool driver_level() override; - - u8 m_port{}; - u8 m_pin{}; -}; -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/pin.hpp b/include/libhal-arm-mcu/stm32f1/pin.hpp deleted file mode 100644 index 4f0fef9..0000000 --- a/include/libhal-arm-mcu/stm32f1/pin.hpp +++ /dev/null @@ -1,77 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -namespace hal::stm32f1 { -/** - * @brief Structure to hold a port & pin selection - * - */ -struct pin_select -{ - /// @brief Port letter: must be a capitol letter from 'A' to 'G' - u8 port; - /// @brief Pin number: must be between 0 to 15 - u8 pin; -}; - -/** - * @brief Make JTAG pins not associated with SWD available as IO - * - * The GPIO pins PB3, PB4, and PA15 are default initalized to be used for JTAG - * purposes. If you are using SWD and want to use these pins as GPIO or as - * other alternative functions, this function MUST be called. - * - */ -void release_jtag_pins(); - -/** - * @brief Main (Master) Clock Output options - * - * The following options are available to be sent to the output of the MCO pin - */ -enum class mco_source : std::uint8_t -{ - system_clock = 0b100, - high_speed_internal = 0b101, - high_speed_external = 0b110, - pll_clock_divided_by_2 = 0b111, -}; - -/** - * @brief Output a clock on the PA8 pin - * - * @param p_source - source clock to channel to the PA8 pin - */ -void activate_mco_pa8(mco_source p_source); - -/** - * @brief Reset pin back to default - */ -void reset_mco_pa8(); - -/** - * @brief Remap pins for can bus peripheral - * - */ -enum class can_pins : std::uint8_t -{ - pa11_pa12 = 0b00, - pb9_pb8 = 0b10, - pd0_pd1 = 0b11, -}; -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/pwm.hpp b/include/libhal-arm-mcu/stm32f1/pwm.hpp deleted file mode 100644 index 08531d7..0000000 --- a/include/libhal-arm-mcu/stm32f1/pwm.hpp +++ /dev/null @@ -1,3 +0,0 @@ -#pragma once - -#include diff --git a/include/libhal-arm-mcu/stm32f1/spi.hpp b/include/libhal-arm-mcu/stm32f1/spi.hpp deleted file mode 100644 index 8832987..0000000 --- a/include/libhal-arm-mcu/stm32f1/spi.hpp +++ /dev/null @@ -1,57 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include - -#include "constants.hpp" - -namespace hal::stm32f1 { -class spi : public hal::spi -{ -public: - /** - * @brief Construct a new spi driver - * - * @param p_bus - spi bus number from 1 to 3 - * @param p_settings - initial spi settings - */ - spi(hal::bus_param auto p_bus, spi::settings const& p_settings = {}) - : spi(p_bus(), p_settings) - { - static_assert(1 <= p_bus() and p_bus() <= 3, - "stm32f1 only supports ports from 1 to 3"); - } - - spi(spi& p_other) = delete; - spi& operator=(spi& p_other) = delete; - spi(spi&& p_other) noexcept = delete; - spi& operator=(spi&& p_other) noexcept = delete; - ~spi() override; - -private: - spi(std::uint8_t p_bus_number, spi::settings const& p_settings = {}); - - void driver_configure(settings const& p_settings) override; - void driver_transfer(std::span p_data_out, - std::span p_data_in, - hal::byte p_filler) override; - - peripheral m_peripheral_id; - stm32_generic::spi m_spi_driver; -}; -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/timer.hpp b/include/libhal-arm-mcu/stm32f1/timer.hpp deleted file mode 100644 index c858488..0000000 --- a/include/libhal-arm-mcu/stm32f1/timer.hpp +++ /dev/null @@ -1,951 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -namespace hal::stm32f1 { -/** - * @brief Default pins for the various timer peripherals. - * - * These pins can perform any timer operation. - */ -enum class timer_pins : u8 -{ - pa0 = 0, - pa1 = 1, - pa2 = 2, - pa3 = 3, - pa6 = 4, - pa7 = 5, - pb0 = 6, - pb1 = 7, - pa8 = 8, - pa9 = 9, - pa10 = 10, - pa11 = 11, - pb6 = 12, - pb7 = 13, - pb8 = 14, - pb9 = 15, - pc6 = 16, - pc7 = 17, - pc8 = 18, - pc9 = 19, - pb14 = 20, - pb15 = 21, -}; - -/** - * @brief pins that are connected to the timer1 peripheral - */ -enum class timer1_pin : u8 -{ - pa8 = hal::value(timer_pins::pa8), - pa9 = hal::value(timer_pins::pa9), - pa10 = hal::value(timer_pins::pa10), - pa11 = hal::value(timer_pins::pa11), -}; - -/** - * @brief pins that are connected to the timer 2 and 5 and 9 peripheral - */ -enum class timer2_pin : u8 -{ - pa0 = hal::value(timer_pins::pa0), - pa1 = hal::value(timer_pins::pa1), - pa2 = hal::value(timer_pins::pa2), - pa3 = hal::value(timer_pins::pa3), -}; - -/** - * @brief pins that are connected to the timer3 peripheral - */ -enum class timer3_pin : u8 -{ - pa6 = hal::value(timer_pins::pa6), - pa7 = hal::value(timer_pins::pa7), - pb0 = hal::value(timer_pins::pb0), - pb1 = hal::value(timer_pins::pb1), -}; - -/** - * @brief pins that are connected to the timer4 peripheral - */ -enum class timer4_pin : u8 -{ - pb6 = hal::value(timer_pins::pb6), - pb7 = hal::value(timer_pins::pb7), - pb8 = hal::value(timer_pins::pb8), - pb9 = hal::value(timer_pins::pb9), -}; - -/** - * @brief pins that are connected to the timer 2, 5 and 9 peripheral - */ -enum class timer5_pin : u8 -{ - pa0 = hal::value(timer_pins::pa0), - pa1 = hal::value(timer_pins::pa1), - pa2 = hal::value(timer_pins::pa2), - pa3 = hal::value(timer_pins::pa3), -}; - -/** - * @brief pins that are connected to the timer8 peripheral - */ -enum class timer8_pin : u8 -{ - pc6 = hal::value(timer_pins::pc6), - pc7 = hal::value(timer_pins::pc7), - pc8 = hal::value(timer_pins::pc8), - pc9 = hal::value(timer_pins::pc9), -}; - -/** - * @brief pins that are connected to the timers 2, 5, 9 peripherals - */ -enum class timer9_pin : u8 -{ - pa2 = hal::value(timer_pins::pa2), - pa3 = hal::value(timer_pins::pa3), -}; - -/** - * @brief pins that are connected to the timers 4 and 10 peripherals - */ -enum class timer10_pin : u8 -{ - pb8 = hal::value(timer_pins::pb8), -}; - -/** - * @brief pins that are connected to the timers 4 and 11 peripherals - */ -enum class timer11_pin : u8 // won't work -{ - pb9 = hal::value(timer_pins::pb9), -}; - -/** - * @brief pins that are connected to the 12 peripheral - */ -enum class timer12_pin : u8 -{ - pb14 = hal::value(timer_pins::pb14), - pb15 = hal::value(timer_pins::pb15), -}; - -/** - * @brief pins that are connected to the 13 and 3 peripheral - */ -enum class timer13_pin : u8 -{ - pa6 = hal::value(timer_pins::pa6), -}; - -/** - * @brief pins that are connected to the 14 and 3 peripheral. - * - */ -enum class timer14_pin : u8 -{ - pa7 = hal::value(timer_pins::pa7), -}; - -/** - * @brief Gets the pwm timer type at compile time. - */ -template -consteval auto get_pwm_timer_type() -{ - if constexpr (id == peripheral::timer1) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer2) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer3) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer4) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer5) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer8) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer9) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer10) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer11) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer12) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer13) { - return std::type_identity(); - } else if constexpr (id == peripheral::timer14) { - return std::type_identity(); - } else { - return std::type_identity(); - } -} - -/** - * @brief Used to store the state of the timer assigned to the manager. - */ -struct timer_manager_data -{ -public: - enum class usage : u8 - { - uninitialized, - old_pwm, - pwm_generator, - callback_timer, - quadrature_encoder - }; - /** - * @brief Tracks how many resources are currently tied to the timer - * - * @return auto - */ - auto resource_count() const - { - return m_resource_count.load(); - } - - /// Tracks how many resources are currently tied to the - - /** - * @brief Indicates what kind of usage the timer is currently configured for. - * - * @return auto - */ - auto current_usage() const - { - return m_usage; - } - -private: - friend class timer; - friend class pwm_group_frequency; - friend class pwm16_channel; - friend class pwm; - friend class advanced_timer_manager; - friend class general_purpose_timer_manager; - friend class quadrature_encoder; - - /// Indicates which timer is assigned to this manager. - peripheral m_id; - /// Tracks how many resources are currently tied to the - std::atomic m_resource_count{ 0 }; - /// Indicates what kind of usage the timer is currently configured for. - usage m_usage = usage::uninitialized; - - timer_manager_data(peripheral p_id) - : m_id(p_id) - { - } -}; - -class advanced_timer_manager; - -class general_purpose_timer_manager; - -/** - * @brief This class implements the `hal::timer` interface. - * - * Can schedule function callbacks to occur via interrupt after a designated - * amount of time. - * - */ -class timer final : public hal::timer -{ -public: - friend class hal::stm32f1::advanced_timer_manager; - friend class hal::stm32f1::general_purpose_timer_manager; - - timer(timer const& p_other) = delete; - timer& operator=(timer const& p_other) = delete; - timer(timer&& p_other) noexcept = delete; - timer& operator=(timer&& p_other) noexcept = delete; - - ~timer() override; - -private: - /** - * @brief Stores the IRQ number as well as handler object, which are needed - * to enable the interrupt. - * - */ - struct interrupt_params - { - cortex_m::irq_t irq; - cortex_m::interrupt_pointer handler; - }; - - /** - * @brief This constructor is private because the only way one should be - * able to access this timer is through one of the timer manager classes. - * - * @param p_reg - The address of the selected timer. - * @param p_manager_data - Pointer to access the managers state information. - */ - timer(void* p_reg, timer_manager_data* p_manager_data_ptr); - - bool driver_is_running() override; - void driver_cancel() override; - void driver_schedule(hal::callback p_callback, - hal::time_duration p_delay) override; - - /** - * @brief Creates a static callable object and returns the necessary data to - * enable the interrupt. - * - * @return interrupt_params - the data necessary to enable the interrupt in - * the stm32_generic timer class. - */ - interrupt_params setup_interrupt(); - /** - * @brief Resets and returns the program from the interrupt. - * - */ - void handle_interrupt(); - /** - * @brief The function that is used as the handler for the ISR. - * - */ - void interrupt(); - - /// The stm32_generic timer object which is used to actually control the - /// timer. - hal::stm32_generic::timer m_timer; - /// Pointer to access the managers state information. - timer_manager_data* m_manager_data_ptr; - /// The function to be used inside the ISR handler for the callback. - std::optional> m_callback; -}; - -/** - * @brief This class sets the frequency for a group of pwm pins - * - * Since all the pwm channels for each timer peripheral have to share the same - * frequency, this class is used to set that frequency for the whole group of - * channels. - */ -class pwm_group_frequency : public hal::pwm_group_manager -{ -public: - friend class hal::stm32f1::advanced_timer_manager; - friend class hal::stm32f1::general_purpose_timer_manager; - - pwm_group_frequency(pwm_group_frequency const& p_other) = delete; - pwm_group_frequency& operator=(pwm_group_frequency const& p_other) = delete; - pwm_group_frequency(pwm_group_frequency&& p_other) noexcept; - pwm_group_frequency& operator=(pwm_group_frequency&& p_other) noexcept; - ~pwm_group_frequency() override; - -private: - /** - * @brief The constructor is private because the only way one should be - * able to access pwm_group_frequency is through one of the timer manager - * classes. - * - * @param p_reg is a void pointer that points to the beginning of a timer - * peripheral - * @param p_manager_data_ptr is a pointer to access the managers state - * information. - */ - pwm_group_frequency(void* p_reg, timer_manager_data* p_manager_data_ptr); - - void driver_frequency(u32 p_hertz) override; - - /// The stm32_generic pwm_group_frequency object which is used to actually - /// control the timer. - hal::stm32_generic::pwm_group_frequency m_pwm_frequency; - /// Pointer to access the managers state information. - timer_manager_data* m_manager_data_ptr; -}; - -/** - * @brief This class is used to control a pwm channel - * - * This is to be used in conjunction with pwm_group_frequency. You create your - * pwm channel(s) with this class, where each channel can set its own unique - * duty cycle. Then you set the frequency to be used by all the configured - * channels for the specific timer peripheral through the pwm_group_frequency. - */ -class pwm16_channel : public hal::pwm16_channel -{ -public: - friend class hal::stm32f1::advanced_timer_manager; - friend class hal::stm32f1::general_purpose_timer_manager; - - pwm16_channel(pwm16_channel const& p_other) = delete; - pwm16_channel& operator=(pwm16_channel const& p_other) = delete; - pwm16_channel(pwm16_channel&& p_other) noexcept; - pwm16_channel& operator=(pwm16_channel&& p_other) noexcept; - ~pwm16_channel() override; - -private: - /** - * @brief The constructor is private because the only way one should be - * able to access pwm16_channel is through one of the timer manager classes. - * - * @param p_reg is a void pointer that points to the beginning of a timer - * peripheral - * @param p_manager_data_ptr is a pointer to access the managers state - * information. - * @param p_is_advanced whether the current peripheral is advanced or not - * @param p_pin is the pin to be used for the pwm channel. - */ - pwm16_channel(void* p_reg, - timer_manager_data* p_manager_data_ptr, - bool p_is_advanced, - timer_pins p_pin); - - u32 driver_frequency() override; - void driver_duty_cycle(u16 p_duty_cycle) override; - - /// The stm32_generic pwm object which is used to actually control the timer. - hal::stm32_generic::pwm m_pwm; - /// The pin being used for the channel. - timer_pins m_pin; - /// Pointer to access the managers state information. - timer_manager_data* m_manager_data_ptr; -}; - -/** - * @brief This class implements the `hal::pwm` interface - * - * Can create pwm objects which can output pwm signals on a chosen pin - * - * @deprecated Please use pwm16_channel and/or pwm_group_frequency. This class - * implements the `hal::pwm` interface which will be deprecated in libhal 5. - */ -class pwm : public hal::pwm -{ -public: - friend class hal::stm32f1::advanced_timer_manager; - friend class hal::stm32f1::general_purpose_timer_manager; - - pwm(pwm const& p_other) = delete; - pwm& operator=(pwm const& p_other) = delete; - pwm(pwm&& p_other) noexcept; - pwm& operator=(pwm&& p_other) noexcept; - ~pwm() override; - -private: - /** - * @brief The constructor is private because the only way one should be - * able to access pwm is through one of the timer manager classes. - * - * @param p_reg is a void pointer that points to the beginning of a timer - * peripheral - * @param p_manager_data_ptr is a pointer to access the managers state - * information. - * @param p_is_advanced whether the current peripheral is advanced or not - * @param p_pin is the pin to be used for the pwm channel. - */ - pwm(void* p_reg, - timer_manager_data* p_manager_data_ptr, - bool p_is_advanced, - timer_pins p_pin); - - void driver_frequency(hertz p_frequency) override; - void driver_duty_cycle(float p_duty_cycle) override; - - /// The stm32_generic pwm object which is used to actually control the - /// channel. - hal::stm32_generic::pwm m_pwm; - /// The stm32_generic group frequency object which is used to actually control - /// the frequency for the group of channels. - hal::stm32_generic::pwm_group_frequency m_pwm_frequency; - /// The pin being used for the channel. - timer_pins m_pin; - /// Pointer to access the managers state information. - timer_manager_data* m_manager_data_ptr; -}; - -/** - * @brief This class is used to do any timer operations for timers 1 and 8. - * - * This is the non-templated version that implements all the core functionality. - * It is designed to be inherited by the templated version, helping to reduce - * code bloat and duplication caused by template instantiations. - * - * These timers can be used to do PWM generation, as well as other advanced - * timer specific tasks - */ -class advanced_timer_manager -{ -public: - advanced_timer_manager(advanced_timer_manager const& p_other) = delete; - advanced_timer_manager& operator=(advanced_timer_manager const& p_other) = - delete; - advanced_timer_manager(advanced_timer_manager&& p_other) noexcept = delete; - advanced_timer_manager& operator=(advanced_timer_manager&& p_other) noexcept = - delete; - - ~advanced_timer_manager(); - - /** - * @brief Creates a timer object to be used for scheduling function callbacks - * via interrupts. - * - * @return hal::stm32f1::timer - the timer object - * - * @throws hal::device_or_resource_busy - if timer is already being used with - * a conflicting resource - */ - [[nodiscard]] hal::stm32f1::timer acquire_timer(); - /** - * @brief Creates a pwm object to be used for setting the frequency of the - * group of pwm channels for the acquired timer. - * - * @return hal::stm32f1::pwm_group_frequency - the pwm frequency object. - * - * @throws hal::device_or_resource_busy - if timer is already being used with - * a conflicting resource - */ - [[nodiscard]] hal::stm32f1::pwm_group_frequency acquire_pwm_group_frequency(); - -protected: - /** - * @brief The constructor is protected because it gets inherited and used by - * the templated advanced_timer class. - * - * @param p_id the id of the timer that will be used by the manager. - */ - advanced_timer_manager(peripheral p_id); - - /** - * @brief Creates a pwm channel to be used for generating pulse-widths through - * configuring of its duty-cycle. - * - * @return hal::stm32f1::pwm16_channel - the pwm channel object. - * - * @throws hal::device_or_resource_busy - if timer is already being used with - * a conflicting resource - */ - [[nodiscard]] hal::stm32f1::pwm16_channel acquire_pwm16_channel( - timer_pins p_pin); - - /** - * @brief Creates a pwm object to be used for generating pulse-widths through - * setting of frequency and duty-cycle. - * @deprecated Please use pwm16_channel and pwm_group_frequency. This class - * implements the `hal::pwm` interface which will be deprecated in libhal 5. - * - * @return hal::stm32f1::pwm - the pwm object. - * - * @throws hal::device_or_resource_busy - if timer is already being used with - * a conflicting resource - */ - [[nodiscard]] hal::stm32f1::pwm acquire_pwm(timer_pins p_pin); - - /** - * @brief Creates a quadrature encoder object used to measure the rotation of - * a motor that gives out quadrature encoder feedback. - * - * @param p_allocator Provide the resource that this can be allocated to. - * @param p_pin1 First timer pin corresponding to channel 1 - * @param p_pin2 Second timer pin corresponding to channel 2 - * @param p_pulses_per_rotation Cycles per revolution for the quadrature - encoder. - - * @return hal::v5::strong_ptr - * - * @throws hal::device_or_resource_busy - if timer is already being used with - * a conflicting resource. - * @throws hal::operation_not_permitted error - if any of the channels are not - * 1 and 2. - */ - [[nodiscard]] hal::v5::strong_ptr - acquire_quadrature_encoder(std::pmr::polymorphic_allocator<> p_allocator, - timer_pins p_pin1, - timer_pins p_pin2, - u32 p_pulses_per_rotation); - -private: - /// Stores the state information about the timer thats assigned to this - /// manager. - timer_manager_data m_manager_data; -}; - -/** - * @brief This class is used to do any timer operations for timers 1 and 8. - * - * This templated version inherits the core functionality and minimizes code - * bloat by only instantiating templates for the required functions. Since they - * are also inlined, it allows for additional compiler optimizations. - * - * These timers can be used to do pwm generation, as well as other advanced - * timer specific tasks - */ -template -class advanced_timer final : public advanced_timer_manager -{ -public: - /** - * @brief These are the 2 pins that correspond to channel a and b. It is - * important for the pins to be in the correct order otherwise the counter - * will work in the opposite direction. - */ - struct encoder_pins - { - hal::stm32f1::timer_pins channel_a; - hal::stm32f1::timer_pins channel_b; - }; - static_assert( - select == peripheral::timer1 or select == peripheral::timer8, - "Only timer 1 or 8 is allowed as advanced timers for this driver."); - using pin_type = decltype(get_pwm_timer_type())::type; - - /** - * @brief Construct a general_purpose_timer_manager object using the passed - * template argument. - * - */ - general_purpose_timer() - : general_purpose_timer_manager(select) - { - } - - /** - * @brief Creates a pwm channel to be used for generating pulse-widths through - * configuring of its duty-cycle. - * - * @return hal::stm32f1::pwm16_channel - the pwm channel object. - * - * @throws hal::device_or_resource_busy - if timer is already being used with - * a conflicting resource - */ - [[nodiscard]] hal::stm32f1::pwm16_channel acquire_pwm16_channel( - pin_type p_pin) - { - return general_purpose_timer_manager::acquire_pwm16_channel( - static_cast(p_pin)); - } - - /** - * @brief Creates a pwm object to be used for generating pulse-widths through - * setting of frequency and duty-cycle. - * @deprecated Please use pwm16_channel and pwm_group_frequency. This class - * implements the `hal::pwm` interface which will be deprecated in libhal 5. - * - * @return hal::stm32f1::pwm - the pwm object. - * - * @throws hal::device_or_resource_busy - if timer is already being used with - * a conflicting resource - */ - [[nodiscard]] hal::stm32f1::pwm acquire_pwm(pin_type p_pin) - { - return general_purpose_timer_manager::acquire_pwm( - static_cast(p_pin)); - } - - /** - * @brief Creates a quadrature encoder object used to measure the rotation of - * a motor that gives out quadrature encoder feedback. - * - - * @param p_allocator Provide the resource that this can be allocated to. - * @param p_encoder_pins The pins must be part of the same timer and they must - * correspond to channel 1 and 2 respectively. Any channel other than channel - * 1 and 2 will throw an hal::operation_not_permitted error. If the channels - * are flipped, it will result degrees counted in the wrong direction. - * @param p_pulses_per_rotation Cycles per revolution for the quadrature - encoder. - - * @return hal::v5::strong_ptr - * - * @throws hal::device_or_resource_busy - if timer is already being used with - * a conflicting resource. - * @throws hal::operation_not_permitted error - if any of the channels are not - * 1 and 2. - */ - [[nodiscard]] hal::v5::strong_ptr - acquire_quadrature_encoder(std::pmr::polymorphic_allocator<> p_allocator, - encoder_pins p_encoder_pins, - u32 p_pulses_per_rotation) - { - return general_purpose_timer_manager::acquire_quadrature_encoder( - p_allocator, - p_encoder_pins.channel_a, - p_encoder_pins.channel_b, - p_pulses_per_rotation); - } - -private: - friend hal::v5::strong_ptr acquire_pwm16_channel( - std::pmr::polymorphic_allocator<> p_allocator, - general_purpose_timer_manager m_manager); - - friend hal::v5::strong_ptr acquire_pwm_group_manager( - std::pmr::polymorphic_allocator<> p_allocator, - general_purpose_timer_manager m_manager); - - friend hal::v5::strong_ptr acquire_quadrature_encoder( - std::pmr::polymorphic_allocator<> p_allocator, - general_purpose_timer_manager m_manager); -}; -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/uart.hpp b/include/libhal-arm-mcu/stm32f1/uart.hpp deleted file mode 100644 index 1825bea..0000000 --- a/include/libhal-arm-mcu/stm32f1/uart.hpp +++ /dev/null @@ -1,84 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include - -#include "constants.hpp" -#include "dma.hpp" - -namespace hal::stm32f1 { - -class uart final : public hal::serial -{ -public: - /** - * @brief Construct a new uart object - * - * @param p_port - desired port number - * @param p_buffer - receive buffer size (statically allocated buffer) - * @param p_settings - initial serial settings - */ - uart(hal::port_param auto p_port, - hal::buffer_param auto p_buffer, - serial::settings const& p_settings = {}) - : uart(p_port(), hal::create_unique_static_buffer(p_buffer), p_settings) - { - static_assert(p_buffer() <= max_dma_length, - "Buffer size cannot exceed 65,535 bytes,"); - static_assert(1 <= p_port() and p_port() <= 3, - "stm32f1 only supports ports from 1 to 3"); - } - - /** - * @brief Construct a new uart object using runtime values - * - * @param p_port - runtime value for p_port - * @param p_buffer - external buffer to be used as the receive buffer - * @param p_settings - initial serial settings - * @throws hal::operation_not_supported - if the port is not supported or the - * buffer is outside of the maximum dma length. - */ - uart(hal::runtime, - std::uint8_t p_port, - std::span p_buffer, - serial::settings const& p_settings = {}); - ~uart() override; - -private: - uart(std::uint8_t p_port, - std::span p_receive_buffer, - serial::settings const& p_settings); - - void driver_configure(settings const& p_settings) override; - write_t driver_write(std::span p_data) override; - read_t driver_read(std::span p_data) override; - void driver_flush() override; - - u32 dma_cursor_position(); - - void* m_uart; - std::span m_receive_buffer; - u16 m_read_index; - u8 m_dma; - u8 m_port_tx; - u8 m_pin_tx; - u8 m_port_rx; - u8 m_pin_rx; - peripheral m_id; -}; -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/usart.hpp b/include/libhal-arm-mcu/stm32f1/usart.hpp deleted file mode 100644 index 85d5f14..0000000 --- a/include/libhal-arm-mcu/stm32f1/usart.hpp +++ /dev/null @@ -1,117 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include -#include -#include - -#include "constants.hpp" - -namespace hal::stm32f1 { - -class usart_manager -{ -public: - usart_manager(usart_manager const&) = delete; - usart_manager& operator=(usart_manager const&) = delete; - usart_manager(usart_manager&&) noexcept = default; - usart_manager& operator=(usart_manager&&) noexcept = default; - ~usart_manager(); - - class serial; - - serial acquire_serial(std::span p_buffer, - hal::serial::settings const& p_settings = {}); - - auto acquire_serial(hal::buffer_param auto p_buffer, - hal::serial::settings const& p_settings = {}) - { - return acquire_serial(hal::create_unique_static_buffer(p_buffer), - p_settings); - } - - // NOTE: Move these out when they are available. -#if 0 - class sync_serial; - class half_duplex_serial; - class irda; - class lin; - sync_serial acquire_sync_serial(); - half_duplex_serial acquire_half_duplex_serial(); - irda acquire_irda(); - lin acquire_lin(); -#endif - -protected: - usart_manager(peripheral p_id); - - uptr m_reg; - peripheral m_id; -}; - -template -class usart final : public usart_manager -{ -public: - static_assert(id == peripheral::usart1 or id == peripheral::usart2 or - id == peripheral::usart3, - "Only peripherals usart1, usart2, usart3 are allowed! Support " - "for uart4, and uart5 not available currently."); - - usart() - : usart_manager(id) - { - } -}; - -class usart_manager::serial final : public hal::zero_copy_serial -{ -public: - template - serial(usart& p_usart_manager, - std::span p_buffer, - hal::serial::settings const& p_settings = {}) - : serial(p_usart_manager, p_buffer, p_settings) - { - } - - serial(serial const&) = delete; - serial& operator=(serial const&) = delete; - serial(serial&&) noexcept = default; - serial& operator=(serial&&) noexcept = default; - ~serial() override; - -private: - friend class usart_manager; - - serial(usart_manager& p_usart_manager, - std::span p_buffer, - hal::serial::settings const& p_settings = {}); - void driver_configure(hal::serial::settings const& p_settings) override; - void driver_write(std::span p_data) override; - std::span driver_receive_buffer() override; - std::size_t driver_cursor() override; - - usart_manager* m_usart_manager; - std::span m_buffer; - u8 m_dma_channel; - pin_select m_tx; - pin_select m_rx; -}; -} // namespace hal::stm32f1 diff --git a/include/libhal-arm-mcu/stm32f1/usb.hpp b/include/libhal-arm-mcu/stm32f1/usb.hpp deleted file mode 100644 index 136dc26..0000000 --- a/include/libhal-arm-mcu/stm32f1/usb.hpp +++ /dev/null @@ -1,176 +0,0 @@ -// Copyright 2024 Khalil Estell -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include -#include -#include -#include -#include -#include - -namespace hal::stm32f1 { - -/** - * @brief USB interrupt endpoint pairs returned from - * `acquire_usb_interrupt_endpoint` - * - * Each pair should have the same endpoint number and a separate out and in - * endpoint. - */ -struct usb_interrupt_endpoint_pair -{ - /// The out endpoint implementation for this interrupt endpoint - hal::v5::strong_ptr out; - /// The out endpoint implementation for this interrupt endpoint - hal::v5::strong_ptr in; -}; - -/** - * @brief USB bulk endpoint pairs returned from - * `acquire_usb_bulk_endpoint` - * - * Each pair should have the same endpoint number and a separate out and in - * endpoint. - */ -struct usb_bulk_endpoint_pair -{ - /// The out endpoint implementation for this bulk endpoint - hal::v5::strong_ptr out; - /// The out endpoint implementation for this bulk endpoint - hal::v5::strong_ptr in; -}; - -/** - * @brief USB peripheral manager class for the stm32f1 processor - * - * In order to acquire USB endpoint resources, this class must be constructed - * successfully. - */ -class usb -{ -public: - using ctrl_receive_tag = hal::v5::usb::control_endpoint::on_receive_tag; - using out_receive_tag = hal::v5::usb::out_endpoint::on_receive_tag; - using callback_variant_t = std::variant, - hal::callback>; - - static constexpr std::size_t usb_endpoint_count = 8; - - /** - * @brief Construct a new usb object - * - * @param p_clock - clocked used for detecting endpoint stalls for write - * operations. This can occur when the device is disconnected, the host has - * stopped sending OUT packets, or something wrong with the bus. - * @param p_write_timeout - the amount of time before throwing a timed_out - * exception for an OUT endpoint with data to transmit but the HOST has not - * requested it yet. - */ - usb(hal::v5::strong_ptr_only_token, - hal::v5::strong_ptr const& p_clock, - hal::time_duration p_write_timeout = std::chrono::milliseconds(5)); - usb(usb&) = delete; - usb operator=(usb&) = delete; - usb(usb&&) = delete; - usb operator=(usb&&) = delete; - ~usb(); - -private: - void interrupt_handler() noexcept; - void fill_endpoint(hal::u8 p_endpoint, - std::span p_data, - hal::u16 p_max_length); - void flush_endpoint(u8 p_endpoint); - void write_to_endpoint(hal::u8 p_endpoint, std::span p_data); - usize read_endpoint(u8 p_endpoint, - std::span p_buffer, - u16& p_bytes_read); - void wait_for_endpoint_transfer_completion(hal::u8 p_endpoint); - void set_callback(hal::u8 p_endpoint, callback_variant_t const& p_callback); - - friend usb_interrupt_endpoint_pair acquire_usb_interrupt_endpoint( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_usb); - - friend usb_bulk_endpoint_pair acquire_usb_bulk_endpoint( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_usb); - - friend class control_endpoint; - - template - friend class out_endpoint; - - template - friend class in_endpoint; - - std::array m_out_callbacks; - hal::v5::strong_ptr m_clock; - hal::time_duration m_write_timeout; - std::uint16_t m_available_endpoint_memory; - // Starts at 1 because endpoint 0 is always occupied by the control endpoint - hal::u8 m_endpoints_allocated = 1; -}; - -/** - * @brief Acquire a USB control endpoint - * - * @param p_allocator - the allocator to allocate the control endpoint's memory. - * @param p_usb - the usb peripheral manager that you want to acquire a control - * endpoint from. - * @return hal::v5::strong_ptr - the control - * endpoint from the usb peripheral. - */ -hal::v5::strong_ptr -acquire_usb_control_endpoint(std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_usb); - -/** - * @brief Acquire a USB interrupt endpoint - * - * @param p_allocator - the allocator to allocate the interrupt endpoint's - * memory. - * @param p_usb - the usb peripheral manager that you want to acquire an - * interrupt endpoint from. - * @return usb_interrupt_endpoint_pair - an interrupt endpoint pair with both - * out and in endpoints available. - */ -usb_interrupt_endpoint_pair acquire_usb_interrupt_endpoint( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_usb); - -/** - * @brief Acquire a USB bulk endpoint - * - * @param p_allocator - the allocator to allocate the bulk endpoint's memory. - * @param p_usb - the usb peripheral manager that you want to acquire an - * bulk endpoint from. - * @return usb_bulk_endpoint_pair - an bulk endpoint pair with both out and in - * endpoints available. - */ -usb_bulk_endpoint_pair acquire_usb_bulk_endpoint( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_usb); -} // namespace hal::stm32f1 - -namespace hal { -using hal::stm32f1::acquire_usb_bulk_endpoint; -using hal::stm32f1::acquire_usb_control_endpoint; -using hal::stm32f1::acquire_usb_interrupt_endpoint; -} // namespace hal diff --git a/include/libhal-arm-mcu/stm32f40/constants.hpp b/include/libhal-arm-mcu/stm32f40/constants.hpp deleted file mode 100644 index 6d2bb70..0000000 --- a/include/libhal-arm-mcu/stm32f40/constants.hpp +++ /dev/null @@ -1,32 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -namespace hal::stm32f4110 { - -/// List of each peripheral and their power on id number for this platform -enum class peripheral : u32 // NOLINT(performance-enum-size) -{ - max -}; - -/// List of interrupt request numbers for this platform -enum class irq : u16 // NOLINT(performance-enum-size) -{ - max, -}; -} // namespace hal::stm32f4110 diff --git a/include/libhal-arm-mcu/stm32f411/clock.hpp b/include/libhal-arm-mcu/stm32f411/clock.hpp deleted file mode 100644 index 4db8e0c..0000000 --- a/include/libhal-arm-mcu/stm32f411/clock.hpp +++ /dev/null @@ -1,175 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include "constants.hpp" - -namespace hal::stm32f411 { - -using namespace hal::literals; - -/// Constant for the frequency of the LSI -static constexpr auto internal_low_speed_oscillator = 32.0_kHz; - -/// Constant for the frequency of the HSI -static constexpr auto internal_high_speed_oscillator = 16.0_MHz; - -/// Constant for the frequency of the Watch Dog Peripheral -static constexpr auto watchdog_clock_rate = internal_low_speed_oscillator; - -/// Available dividers for the AHB bus -enum class ahb_divider : u8 -{ - divide_by_1 = 0, - divide_by_2 = 0b1000, - divide_by_4 = 0b1001, - divide_by_8 = 0b1010, - divide_by_16 = 0b1011, - divide_by_64 = 0b1100, - divide_by_128 = 0b1101, - divide_by_256 = 0b1110, - divide_by_512 = 0b1111, -}; - -/// Available dividers for the APB bus -enum class apb_divider : u8 -{ - divide_by_1 = 0, - divide_by_2 = 0b100, - divide_by_4 = 0b101, - divide_by_8 = 0b110, - divide_by_16 = 0b111, -}; - -/// Available dividers for the ADC bus -enum class adc_divider : u8 -{ - divide_by_2 = 0b00, - divide_by_4 = 0b01, - divide_by_6 = 0b10, - divide_by_8 = 0b11, -}; - -/// Available clock sources available for the system clock -enum class system_clock_select : u8 -{ - high_speed_internal = 0b00, - high_speed_external = 0b01, - pll = 0b10, -}; - -enum class pll_source : u8 -{ - high_speed_internal = 0b00, - high_speed_external = 0b01, -}; - -/// Available clock sources for the RTC -enum class rtc_source : u8 -{ - no_clock = 0b00, - low_speed_external = 0b01, - low_speed_internal = 0b10, - high_speed_external_divided_by_128 = 0b11, -}; - -/// Available sources for the I2S clocks -enum class i2s_source : u8 -{ - pll_i2s_clk = 0, - /// External I2S_CKIN pin - i2s_external_clock = 1, -}; - -struct clock_tree -{ - /// Defines the frequency of the high speed external clock signal - hal::hertz high_speed_external = 0.0_MHz; - - /// Defines the frequency of the low speed external clock signal. - hal::hertz low_speed_external = 0.0_MHz; - - /// Defines the configuration of the PLL - struct pll_t - { - bool enable = false; - pll_source source = pll_source::high_speed_internal; - hertz output = internal_high_speed_oscillator; - } pll = {}; - - /// Defines which clock source will be use for the system. - /// @warning System will lock up in the following situations: - /// - Select PLL, but PLL is not enabled - /// - Select PLL, but PLL frequency is too high - /// - Select High Speed External, but the frequency is kept at - /// 0_Mhz. - system_clock_select system_clock = system_clock_select::high_speed_internal; - - /// Defines the configuration for the RTC - struct rtc_t - { - bool enable = false; - rtc_source source = rtc_source::no_clock; - } rtc = {}; - - /// Defines the configuration of the dividers beyond system clock mux. - struct ahb_t - { - ahb_divider divider = ahb_divider::divide_by_1; - /// Maximum rate of 36 MHz - struct apb1_t - { - apb_divider divider = apb_divider::divide_by_1; - } apb1 = {}; - - /// Maximum rate of 72 MHz - struct apb2_t - { - apb_divider divider = apb_divider::divide_by_1; - /// Maximum of 14 MHz - struct adc_t - { - adc_divider divider = adc_divider::divide_by_2; - } adc = {}; - } apb2 = {}; - } ahb = {}; - bool usb_otg_clock_enable = false; -}; - -/** @attention If configuration of the system clocks is desired, one should - * consult the user manual of the target MCU in use to determine the valid clock - * configuration values that can/should be used. The configure_clocks() method - * is only responsible for configuring the clock system based on configurations - * in the clock_configuration. Incorrect configurations may result in a hard - * fault or cause the clock system(s) to supply incorrect clock rate(s). - * - * @see Figure 12. Clock Tree - * https://www.st.com/resource/en/reference_manual/rm0383-stm32f411xce-advanced-armbased-32bit-mcus-stmicroelectronics.pdf#page=93 - */ -void configure_clocks(clock_tree const& p_clock_tree); - -/// @return the clock rate frequency of a peripheral -hal::hertz frequency(peripheral p_id); - -/** - * @brief Sets every bus to its maximum possible frequency using the internal - * oscillator - * - */ -void maximum_speed_using_internal_oscillator(); -} // namespace hal::stm32f411 diff --git a/include/libhal-arm-mcu/stm32f411/constants.hpp b/include/libhal-arm-mcu/stm32f411/constants.hpp deleted file mode 100644 index 7c18459..0000000 --- a/include/libhal-arm-mcu/stm32f411/constants.hpp +++ /dev/null @@ -1,214 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::stm32f411 { - -/// Number of bits between each enable register -static constexpr u32 bus_id_offset = 32; -/// Bit position of AHB1 -static constexpr u32 ahb1_bus = bus_id_offset * 0; -/// Bit position of AHB2 -static constexpr u32 ahb2_bus = bus_id_offset * 1; -/// Bit position of AHB3 -static constexpr u32 ahb3_bus = bus_id_offset * 2; - -/// Bit position of APB1 -static constexpr u32 apb1_bus = bus_id_offset * 3; -/// Bit position of AHB2 -static constexpr u32 apb2_bus = bus_id_offset * 4; - -/// Bit position of outside any bus -static constexpr u32 beyond = bus_id_offset * 5; - -/// List of each peripheral and their power on id number for this platform -enum class peripheral : u8 -{ - gpio_a = ahb1_bus + 0, - gpio_b = ahb1_bus + 1, - gpio_c = ahb1_bus + 2, - gpio_d = ahb1_bus + 3, - gpio_e = ahb1_bus + 4, - gpio_h = ahb1_bus + 7, - crc = ahb1_bus + 12, - dma1 = ahb1_bus + 21, - dma2 = ahb1_bus + 22, - - usb_otg = ahb2_bus + 7, - - timer2 = apb1_bus + 0, - timer3 = apb1_bus + 1, - timer4 = apb1_bus + 2, - timer5 = apb1_bus + 3, - window_watchdog = apb1_bus + 11, - spi2 = apb1_bus + 14, - spi3 = apb1_bus + 15, - usart2 = apb1_bus + 17, - i2c1 = apb1_bus + 21, - i2c2 = apb1_bus + 22, - i2c3 = apb1_bus + 23, - power = apb1_bus + 28, - - timer1 = apb2_bus + 0, - usart1 = apb2_bus + 4, - usart6 = apb2_bus + 5, - adc1 = apb2_bus + 8, - sdio = apb2_bus + 11, - spi1 = apb2_bus + 12, - spi4 = apb2_bus + 13, - system_config_controller = apb2_bus + 14, - timer9 = apb2_bus + 16, - timer10 = apb2_bus + 17, - timer11 = apb2_bus + 18, - spi5 = apb2_bus + 20, - - cpu = beyond + 0, - system_timer = beyond + 1, - i2s = beyond + 2 -}; - -/// List of interrupt request numbers for this platform -enum class irq : cortex_m::irq_t // NOLINT(performance-enum-size) -{ - /// Window WatchDog - window_watchdog = 0, - /// PVD through EXTI Line detection - pvd = 1, - /// Tamper - tamper = 2, - /// RTC - rtc = 3, - /// FLASH - flash = 4, - /// RCC - rcc = 5, - /// EXTI Line0 - exti0 = 6, - /// EXTI Line1 - exti1 = 7, - /// EXTI Line2 - exti2 = 8, - /// EXTI Line3 - exti3 = 9, - /// EXTI Line4 - exti4 = 10, - /// DMA1 Channel 0 - dma1_channel0 = 11, - /// DMA1 Channel 1 - dma1_channel1 = 12, - /// DMA1 Channel 2 - dma1_channel2 = 13, - /// DMA1 Channel 3 - dma1_channel3 = 14, - /// DMA1 Channel 4 - dma1_channel4 = 15, - /// DMA1 Channel 5 - dma1_channel5 = 16, - /// DMA1 Channel 6 - dma1_channel6 = 17, - /// ADC1 - adc1 = 18, - /// EXTI Line[9:5] - exi9_5 = 23, - /// TIM1 Break - tim1_brk = 24, - /// TIM1 Break and TIM19 - tim1_brk_tim19 = 24, - /// TIM1 Update - tim1_up = 25, - /// TIM1 Update and TIM10 - tim1_up_tim10 = 25, - /// TIM1 Trigger and Commutation - tim1_trg_com = 26, - /// TIM1 Trigger and Commutation - tim1_trg_com_tim11 = 26, - /// TIM1 Capture Compare - tim1_cc = 27, - /// TIM2 - tim2 = 28, - /// TIM3 - tim3 = 29, - /// TIM4 - tim4 = 30, - /// I2C1 Event - i2c1_ev = 31, - /// I2C1 Error - i2c1_er = 32, - /// I2C2 Event - i2c2_ev = 33, - /// I2C2 Error - i2c2_er = 34, - /// SPI1 - spi1 = 35, - /// SPI2 - spi2 = 36, - /// USART1 - usart1 = 37, - /// USART2 - usart2 = 38, - /// External Line[15:10] - exti15_10 = 40, - /// EXTI Line17 - exti17 = 41, - /// RTC Alarm through EXTI Line - rtcalarm = 41, - /// EXTI18 Line18 - exti18 = 42, - /// USB OTG FS WakeUp - otg_fs_wkup = 42, - /// DMA1_Channel7 - dma1_channel7 = 47, - /// SDIO - sdio = 49, - /// TIM5 - tim5 = 50, - /// SPI3 - spi3 = 51, - /// DMA2 Channel 0 - dma2_channel0 = 56, - /// DMA2 Channel 1 - dma2_channel1 = 57, - /// DMA2 Channel 2 - dma2_channel2 = 58, - /// DMA2 Channel 3 - dma2_channel3 = 59, - /// DMA2 Channel 4 - dma2_channel4 = 60, - /// USB OTG FS - otg_fs = 67, - /// DMA2 Channel 5 - dma2_channel5 = 68, - /// DMA2 Channel 6 - dma2_channel6 = 69, - /// DMA2 Channel 7 - dma2_channel7 = 70, - /// USART6 - usart6 = 71, - /// I2C3 Event - i2c3_ev = 72, - /// I2C3 Error - i2c3_er = 73, - /// FPU - fpu = 81, - /// SPI4 - spi4 = 84, - /// SPI5 - spi5 = 85, - max, -}; -} // namespace hal::stm32f411 diff --git a/include/libhal-arm-mcu/stm32f411/dma.hpp b/include/libhal-arm-mcu/stm32f411/dma.hpp deleted file mode 100644 index 12a7376..0000000 --- a/include/libhal-arm-mcu/stm32f411/dma.hpp +++ /dev/null @@ -1,42 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include - -#include "constants.hpp" - -namespace hal::stm32f411 { -enum class dma : u8 -{ - dma1 = static_cast(peripheral::dma1), - dma2 = static_cast(peripheral::dma2), -}; -/** - * @brief Sets up the DMA memory to memory transfer mode - * - * @param p_dma Select DMA - * @param p_source source span of bytes - * @param p_destination destination span of bytes - */ -void set_dma_memory_transfer(dma p_dma, - std::span const p_source, - std::span const p_destination); -/// Maximum length of a buffer that the stm32f411 series dma controller can -/// handle. -constexpr auto max_dma_length = std::numeric_limits::max(); -} // namespace hal::stm32f411 diff --git a/include/libhal-arm-mcu/stm32f411/i2c.hpp b/include/libhal-arm-mcu/stm32f411/i2c.hpp deleted file mode 100644 index de12aed..0000000 --- a/include/libhal-arm-mcu/stm32f411/i2c.hpp +++ /dev/null @@ -1,112 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include - -#include "constants.hpp" - -namespace hal::stm32f411 { - -/** - * @brief Implementation of the i2c port manager class - * - * This class has a private constructor and can only be used via its derived - * class `i2c` class. - * - */ -class i2c_manager_impl -{ -public: - template - friend class i2c_manager; - - i2c_manager_impl(i2c_manager_impl&) = delete; - i2c_manager_impl& operator=(i2c_manager_impl&) = delete; - i2c_manager_impl(i2c_manager_impl&&) noexcept = default; - i2c_manager_impl& operator=(i2c_manager_impl&&) noexcept = default; - /** - * @brief Destroy the i2c port manager object - * - */ - ~i2c_manager_impl(); - - class i2c; - - i2c acquire_i2c(hal::i2c::settings const& p_settings = {}); - -private: - i2c_manager_impl(peripheral p_select); - peripheral m_port; -}; - -/** - * @brief i2c driver for the stm32f411 series of microcontrollers - * - * The stm32f411 series i2c peripherals utilize a state machine and interrupts - * to handle transmitting and receiving data. This driver does the same. A - * `hal::io_waiter` may be passed to the constructor in order to control what - * the driver does when its waiting for the i2c transaction to complete. - */ -template -class i2c_manager final : public i2c_manager_impl -{ -public: - static_assert(select == peripheral::i2c1 or /* line break */ - select == peripheral::i2c2 or select == peripheral::i2c3, - "Only peripheral i2c(1 to 3) is allowed for this class"); - i2c_manager() - : i2c_manager_impl(select) - { - } -}; - -class i2c_manager_impl::i2c final : public hal::i2c -{ -public: - /** - * @brief Construct a new i2c object - * - * Will enable internal pull up resistors to make sure the signals don't drop - * low. These pull ups should be taken into consideration but not be the only - * pull ups on the line - * - * @param p_manager - i2c bus manager - * @param p_settings - i2c setting - * @throws hal::operation_not_supported - if the settings or if the bus number - * @brief Construct a new i2c object - * - */ - i2c(i2c_manager_impl& p_manager, i2c::settings const& p_settings = {}); - i2c(i2c const& p_other) = delete; - i2c& operator=(i2c const& p_other) = delete; - i2c(i2c&& p_other) noexcept = delete; - i2c& operator=(i2c&& p_other) noexcept = delete; - ~i2c() override; - -private: - void driver_configure(settings const& p_settings) override; - void driver_transaction( - hal::byte p_address, - std::span p_data_out, - std::span p_data_in, - hal::function_ref p_timeout) override; - void setup_interrupt(); - i2c_manager_impl* m_manager; - stm32_generic::i2c m_i2c; -}; -} // namespace hal::stm32f411 diff --git a/include/libhal-arm-mcu/stm32f411/input_pin.hpp b/include/libhal-arm-mcu/stm32f411/input_pin.hpp deleted file mode 100644 index ea56bdb..0000000 --- a/include/libhal-arm-mcu/stm32f411/input_pin.hpp +++ /dev/null @@ -1,53 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include "constants.hpp" - -namespace hal::stm32f411 { -/** - * @brief Input pin implementation for the stm32f4 - * - */ -class input_pin : public hal::input_pin -{ -public: - /** - * @brief Construct a new input pin object - * - * @param p_port - selects pin port to use - * @param p_pin - selects pin within the port to use - * @param p_settings - initial pin settings - */ - input_pin(hal::stm32f411::peripheral p_port, - std::uint8_t p_pin, - input_pin::settings const& p_settings = {}); - - input_pin(input_pin& p_other) = delete; - input_pin& operator=(input_pin& p_other) = delete; - input_pin(input_pin&& p_other) noexcept = delete; - input_pin& operator=(input_pin&& p_other) noexcept = delete; - ~input_pin() override = default; - -private: - void driver_configure(settings const& p_settings) override; - bool driver_level() override; - - hal::stm32f411::peripheral m_port{}; - uint8_t m_pin{}; -}; -} // namespace hal::stm32f411 diff --git a/include/libhal-arm-mcu/stm32f411/interrupt.hpp b/include/libhal-arm-mcu/stm32f411/interrupt.hpp deleted file mode 100644 index e8f67f4..0000000 --- a/include/libhal-arm-mcu/stm32f411/interrupt.hpp +++ /dev/null @@ -1,26 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -namespace hal::stm32f411 { -/** - * @brief Initialize interrupts for the stm32f411 series processors - * - * Only initializes after the first call. Does nothing afterwards. Can be - * called multiple times without issue. - * - */ -void initialize_interrupts(); -} // namespace hal::stm32f411 diff --git a/include/libhal-arm-mcu/stm32f411/output_pin.hpp b/include/libhal-arm-mcu/stm32f411/output_pin.hpp deleted file mode 100644 index eed2fe5..0000000 --- a/include/libhal-arm-mcu/stm32f411/output_pin.hpp +++ /dev/null @@ -1,45 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include "constants.hpp" - -namespace hal::stm32f411 { -class output_pin : public hal::output_pin -{ -public: - /** - * @brief Construct a new output pin object - * - * @param p_port - selects pin port to use - * @param p_pin - selects which pin within the port to use - * @param p_settings - initial pin settings - */ - output_pin(hal::stm32f411::peripheral p_port, - std::uint8_t p_pin, - output_pin::settings p_settings = {}); - ~output_pin() override = default; - -private: - void driver_configure(settings const& p_settings) override; - void driver_level(bool p_high) override; - bool driver_level() override; - - hal::stm32f411::peripheral m_port{}; - std::uint8_t m_pin{}; -}; -} // namespace hal::stm32f411 diff --git a/include/libhal-arm-mcu/stm32f411/pin.hpp b/include/libhal-arm-mcu/stm32f411/pin.hpp deleted file mode 100644 index ba449af..0000000 --- a/include/libhal-arm-mcu/stm32f411/pin.hpp +++ /dev/null @@ -1,111 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include "constants.hpp" - -namespace hal::stm32f411 { -/** - * @brief stm32f4 pin multiplexing and control driver used drivers and apps - * seeking to tune the pins. - * - */ -class pin -{ -public: - enum class pin_function : u8 - { - input, - output, - analog, - alternate0, - alternate1, - alternate2, - alternate3, - alternate4, - alternate5, - alternate6, - alternate7, - alternate8, - alternate9, - alternate10, - alternate11, - alternate12, - alternate13, - alternate14, - alternate15 - }; - - enum class mco_source : std::uint8_t - { - system_clock = 0b00U, - pll_i2s = 0b01U, - high_speed_external = 0b10U, - pll = 0b11U, - }; - - /** - * @brief Construct a new pin mux and configuration driver - * - * See UM10562 page 99 for more details on which pins can be what function. - * - * @param p_port - selects pin port to use - * @param p_pin - selects pin within the port to use - */ - pin(peripheral p_port, std::uint8_t p_pin) noexcept; - - // NOLINTBEGIN(modernize-use-nodiscard): Allow return values to be dropped if - // they are not needed. - - /** - * @brief Change the function of the pin (mux the pins function) - * - * @param p_function - the pin function (I,O, alternatex) - * @return pin& - reference to this pin for chaining - */ - pin const& function(pin_function p_function) const noexcept; - - /** - * @brief Set the internal resistor connection for this pin - * - * @param p_resistor - resistor type - * @return pin& - reference to this pin for chaining - */ - pin const& resistor(hal::pin_resistor p_resistor) const noexcept; - - /** - * @brief Disable or enable hysteresis mode for this pin - * - * @param p_enable - enable this mode, set to false to disable this mode - * @return pin& - reference to this pin for chaining - */ - pin const& open_drain(bool p_enable = true) const noexcept; - - // NOLINTEND(modernize-use-nodiscard) - - /** - * @brief Output a clock divided by 2 on the PA8 pin - * - * @param p_source - source clock to channel to the PA8 pin - */ - void activate_mco_pc9(mco_source p_source); - -private: - peripheral m_port{}; - std::uint8_t m_pin{}; -}; -} // namespace hal::stm32f411 diff --git a/include/libhal-arm-mcu/stm32f411/spi.hpp b/include/libhal-arm-mcu/stm32f411/spi.hpp deleted file mode 100644 index dad6279..0000000 --- a/include/libhal-arm-mcu/stm32f411/spi.hpp +++ /dev/null @@ -1,50 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include - -#include "constants.hpp" - -namespace hal::stm32f411 { -class spi : public hal::spi -{ -public: - /** - * @brief Construct a new spi object - * - * @param p_bus SPI bus number 1-5 - * @param p_settings - */ - spi(hal::runtime, std::uint8_t p_bus, spi::settings const& p_settings = {}); - - spi(spi& p_other) = delete; - spi& operator=(spi& p_other) = delete; - spi(spi&& p_other) noexcept = delete; - spi& operator=(spi&& p_other) noexcept = delete; - ~spi() override; - -private: - void driver_configure(settings const& p_settings) override; - void driver_transfer(std::span p_data_out, - std::span p_data_in, - hal::byte p_filler) override; - - peripheral m_peripheral_id; - stm32_generic::spi m_spi_driver; -}; -} // namespace hal::stm32f411 diff --git a/include/libhal-arm-mcu/stm32f411/uart.hpp b/include/libhal-arm-mcu/stm32f411/uart.hpp deleted file mode 100644 index da70430..0000000 --- a/include/libhal-arm-mcu/stm32f411/uart.hpp +++ /dev/null @@ -1,77 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include -#include - -#include "constants.hpp" -#include "dma.hpp" - -namespace hal::stm32f411 { -class uart final : public hal::serial -{ -public: - /** - * @brief Construct a new uart object - * - * @param p_port - desired port number - * @param p_buffer - receive buffer size (statically allocated buffer) - * @param p_settings - initial serial settings - */ - uart(hal::port_param auto p_port, - hal::buffer_param auto p_buffer, - serial::settings const& p_settings = {}) - : uart(p_port(), hal::create_unique_static_buffer(p_buffer), p_settings) - { - static_assert(p_buffer() <= max_dma_length, - "Buffer size cannot exceed 65,535 bytes,"); - static_assert((1 <= p_port() and p_port() <= 2) or p_port() == 6, - "stm32f411 only supports ports from 1 to 2"); - } - - /** - * @brief Construct a new uart object using runtime values - * - * @param p_port - runtime value for p_port - * @param p_buffer - external buffer to be used as the receive buffer - * @param p_settings - initial serial settings - * @throws hal::operation_not_supported - if the port is not supported or the - * buffer is outside of the maximum dma length. - */ - uart(hal::runtime, - u8 p_port, - std::span p_buffer, - serial::settings const& p_settings = {}); - -private: - uart(u8 p_port, - std::span p_receive_buffer, - serial::settings const& p_settings); - - void driver_configure(settings const& p_settings) override; - write_t driver_write(std::span p_data) override; - read_t driver_read(std::span p_data) override; - void driver_flush() override; - - u32 dma_cursor_position(); - stm32_generic::uart m_stm32_uart; - peripheral m_dma; - u8 m_dma_stream; - peripheral m_id; -}; -} // namespace hal::stm32f411 diff --git a/include/libhal-arm-mcu/systick_timer.hpp b/include/libhal-arm-mcu/systick_timer.hpp deleted file mode 100644 index a49829d..0000000 --- a/include/libhal-arm-mcu/systick_timer.hpp +++ /dev/null @@ -1,91 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::cortex_m { -/** - * @brief SysTick driver for the ARM Cortex Mx series chips. - * - * Available in all ARM Cortex M series processors. Provides a generic and - * simple timer for every platform using these processor. - * - */ -class systick_timer : public hal::timer -{ -public: - /** - * @brief Defines the set of clock sources for the SysTick timer - * - */ - enum class clock_source : std::uint8_t - { - /// Use an external clock source. What this source is depends on the - /// architecture and configuration of the platform. - external = 0, - /// Use the clock given to the CPU - processor = 1, - }; - - /** - * @brief Construct a new systick_timer timer object - * - * PRECONDITION: Interrupt vector table must be initialized before creating an - * instance of this object. - * - * @param p_frequency - the clock source's frequency - * @param p_source - the source of the clock to the systick timer - * @throws hal::operation_not_permitted - thrown when the precondition to - * initialize the interrupt vector table before constructing this object. - */ - systick_timer(hertz p_frequency, - clock_source p_source = clock_source::processor); - - /** - * @brief Inform the driver of the operating frequency of the CPU in order to - * generate the correct uptime. - * - * Use this when the CPU's operating frequency has changed and no longer - * matches the frequency supplied to the constructor. Care should be taken - * when expecting this function when there is the potentially other parts of - * the system that depend on this counter's uptime to operate. - * - * This will clear any ongoing scheduled events as the timing will no longer - * be valid. - * - * @param p_frequency - the clock source's frequency - * @param p_source - the source of the clock to the systick timer - */ - void register_cpu_frequency(hertz p_frequency, - clock_source p_source = clock_source::processor); - - /** - * @brief Destroy the system timer object - * - * Stop the timer and disable the interrupt service routine. - */ - ~systick_timer() override; - -private: - bool driver_is_running() override; - void driver_cancel() override; - void driver_schedule(hal::callback p_callback, - hal::time_duration p_delay) override; - - hertz m_frequency = 1'000'000.0f; -}; -} // namespace hal::cortex_m diff --git a/include/libhal-armcortex/dwt_counter.hpp b/include/libhal-armcortex/dwt_counter.hpp deleted file mode 100644 index cfef0e3..0000000 --- a/include/libhal-armcortex/dwt_counter.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-armcortex/interrupt.hpp b/include/libhal-armcortex/interrupt.hpp deleted file mode 100644 index 201a294..0000000 --- a/include/libhal-armcortex/interrupt.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-armcortex/startup.hpp b/include/libhal-armcortex/startup.hpp deleted file mode 100644 index b658f02..0000000 --- a/include/libhal-armcortex/startup.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-armcortex/system_control.hpp b/include/libhal-armcortex/system_control.hpp deleted file mode 100644 index 80aaf38..0000000 --- a/include/libhal-armcortex/system_control.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-armcortex/systick_timer.hpp b/include/libhal-armcortex/systick_timer.hpp deleted file mode 100644 index 224e60a..0000000 --- a/include/libhal-armcortex/systick_timer.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-exceptions/control.hpp b/include/libhal-exceptions/control.hpp deleted file mode 100644 index 97e3eec..0000000 --- a/include/libhal-exceptions/control.hpp +++ /dev/null @@ -1,29 +0,0 @@ -#pragma once - -#include -#include - -namespace hal { -/** - * @brief Set the global exception allocator function - * @deprecated Do not use this. This is only here for backwards compatibility. - * - */ -inline void set_exception_allocator(std::pmr::memory_resource&) noexcept -{ -} - -/** - * @brief Get the global exception allocator function - * @deprecated Do not use this. This is only here for backwards compatibility. - * - * @returns the global exception memory allocator implementation - */ -inline std::pmr::memory_resource& get_exception_allocator() noexcept -{ - return *std::pmr::new_delete_resource(); -} - -using std::get_terminate; -using std::set_terminate; -} // namespace hal diff --git a/include/libhal-lpc40/adc.hpp b/include/libhal-lpc40/adc.hpp deleted file mode 100644 index 824e6be..0000000 --- a/include/libhal-lpc40/adc.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/can.hpp b/include/libhal-lpc40/can.hpp deleted file mode 100644 index 8cd1b4c..0000000 --- a/include/libhal-lpc40/can.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/clock.hpp b/include/libhal-lpc40/clock.hpp deleted file mode 100644 index 6ac3403..0000000 --- a/include/libhal-lpc40/clock.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/constants.hpp b/include/libhal-lpc40/constants.hpp deleted file mode 100644 index eb1adb1..0000000 --- a/include/libhal-lpc40/constants.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/dac.hpp b/include/libhal-lpc40/dac.hpp deleted file mode 100644 index 2b16f07..0000000 --- a/include/libhal-lpc40/dac.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/dma.hpp b/include/libhal-lpc40/dma.hpp deleted file mode 100644 index 4a91010..0000000 --- a/include/libhal-lpc40/dma.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/i2c.hpp b/include/libhal-lpc40/i2c.hpp deleted file mode 100644 index 35f2279..0000000 --- a/include/libhal-lpc40/i2c.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/input_pin.hpp b/include/libhal-lpc40/input_pin.hpp deleted file mode 100644 index f231ff8..0000000 --- a/include/libhal-lpc40/input_pin.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/interrupt.hpp b/include/libhal-lpc40/interrupt.hpp deleted file mode 100644 index 398a590..0000000 --- a/include/libhal-lpc40/interrupt.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/interrupt_pin.hpp b/include/libhal-lpc40/interrupt_pin.hpp deleted file mode 100644 index da25218..0000000 --- a/include/libhal-lpc40/interrupt_pin.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/output_pin.hpp b/include/libhal-lpc40/output_pin.hpp deleted file mode 100644 index 3b3a312..0000000 --- a/include/libhal-lpc40/output_pin.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/pin.hpp b/include/libhal-lpc40/pin.hpp deleted file mode 100644 index ac7ae33..0000000 --- a/include/libhal-lpc40/pin.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/power.hpp b/include/libhal-lpc40/power.hpp deleted file mode 100644 index 1f02eef..0000000 --- a/include/libhal-lpc40/power.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/pwm.hpp b/include/libhal-lpc40/pwm.hpp deleted file mode 100644 index 726ba77..0000000 --- a/include/libhal-lpc40/pwm.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/spi.hpp b/include/libhal-lpc40/spi.hpp deleted file mode 100644 index a77d77f..0000000 --- a/include/libhal-lpc40/spi.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/stream_dac.hpp b/include/libhal-lpc40/stream_dac.hpp deleted file mode 100644 index c4534dc..0000000 --- a/include/libhal-lpc40/stream_dac.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-lpc40/uart.hpp b/include/libhal-lpc40/uart.hpp deleted file mode 100644 index 507ba1f..0000000 --- a/include/libhal-lpc40/uart.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-arm-mcu/rp/adc.hpp b/include/libhal-picosdk/adc.hpp similarity index 94% rename from include/libhal-arm-mcu/rp/adc.hpp rename to include/libhal-picosdk/adc.hpp index 73f4338..68b335d 100644 --- a/include/libhal-arm-mcu/rp/adc.hpp +++ b/include/libhal-picosdk/adc.hpp @@ -153,23 +153,21 @@ struct adc16_pack::read_session private: friend read_session; - promise(u8 dma, u8 first_pin) // NOLINT + promise(u8 dma) : m_dma(dma) - , m_first_pin(first_pin) { } - u8 m_dma, m_first_pin; + u8 m_dma; }; private: friend adc16_pack; - read_session(u8 dma, u8 read_size, u8 first_pin) // NOLINT + read_session(u8 dma, u8 first_pin) // NOLINT : m_dma(dma) - , m_read_size(read_size) , m_first_pin(first_pin) { } - u8 m_dma, m_read_size, m_first_pin; + u8 m_dma, m_first_pin; }; } // namespace nonstandard diff --git a/include/libhal-arm-mcu/dwt_counter.hpp b/include/libhal-picosdk/dwt_counter.hpp similarity index 100% rename from include/libhal-arm-mcu/dwt_counter.hpp rename to include/libhal-picosdk/dwt_counter.hpp diff --git a/include/libhal-arm-mcu/rp/i2c.hpp b/include/libhal-picosdk/i2c.hpp similarity index 100% rename from include/libhal-arm-mcu/rp/i2c.hpp rename to include/libhal-picosdk/i2c.hpp diff --git a/include/libhal-arm-mcu/rp/input_pin.hpp b/include/libhal-picosdk/input_pin.hpp similarity index 100% rename from include/libhal-arm-mcu/rp/input_pin.hpp rename to include/libhal-picosdk/input_pin.hpp diff --git a/include/libhal-arm-mcu/interrupt.hpp b/include/libhal-picosdk/interrupt.hpp similarity index 100% rename from include/libhal-arm-mcu/interrupt.hpp rename to include/libhal-picosdk/interrupt.hpp diff --git a/include/libhal-arm-mcu/rp/interrupt_pin.hpp b/include/libhal-picosdk/interrupt_pin.hpp similarity index 100% rename from include/libhal-arm-mcu/rp/interrupt_pin.hpp rename to include/libhal-picosdk/interrupt_pin.hpp diff --git a/include/libhal-arm-mcu/rp/output_pin.hpp b/include/libhal-picosdk/output_pin.hpp similarity index 100% rename from include/libhal-arm-mcu/rp/output_pin.hpp rename to include/libhal-picosdk/output_pin.hpp diff --git a/include/libhal-arm-mcu/rp/pwm.hpp b/include/libhal-picosdk/pwm.hpp similarity index 100% rename from include/libhal-arm-mcu/rp/pwm.hpp rename to include/libhal-picosdk/pwm.hpp diff --git a/include/libhal-arm-mcu/rp/rp.hpp b/include/libhal-picosdk/rp.hpp similarity index 100% rename from include/libhal-arm-mcu/rp/rp.hpp rename to include/libhal-picosdk/rp.hpp diff --git a/include/libhal-arm-mcu/rp/serial.hpp b/include/libhal-picosdk/serial.hpp similarity index 100% rename from include/libhal-arm-mcu/rp/serial.hpp rename to include/libhal-picosdk/serial.hpp diff --git a/include/libhal-arm-mcu/rp/spi.hpp b/include/libhal-picosdk/spi.hpp similarity index 100% rename from include/libhal-arm-mcu/rp/spi.hpp rename to include/libhal-picosdk/spi.hpp diff --git a/include/libhal-arm-mcu/system_control.hpp b/include/libhal-picosdk/system_control.hpp similarity index 100% rename from include/libhal-arm-mcu/system_control.hpp rename to include/libhal-picosdk/system_control.hpp diff --git a/include/libhal-arm-mcu/rp/time.hpp b/include/libhal-picosdk/time.hpp similarity index 100% rename from include/libhal-arm-mcu/rp/time.hpp rename to include/libhal-picosdk/time.hpp diff --git a/include/libhal-stm32f1/can.hpp b/include/libhal-stm32f1/can.hpp deleted file mode 100644 index b7bd7d3..0000000 --- a/include/libhal-stm32f1/can.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-stm32f1/clock.hpp b/include/libhal-stm32f1/clock.hpp deleted file mode 100644 index 1124ad4..0000000 --- a/include/libhal-stm32f1/clock.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-stm32f1/constants.hpp b/include/libhal-stm32f1/constants.hpp deleted file mode 100644 index c29b682..0000000 --- a/include/libhal-stm32f1/constants.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-stm32f1/dma.hpp b/include/libhal-stm32f1/dma.hpp deleted file mode 100644 index 259abb1..0000000 --- a/include/libhal-stm32f1/dma.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-stm32f1/input_pin.hpp b/include/libhal-stm32f1/input_pin.hpp deleted file mode 100644 index bd3e6a6..0000000 --- a/include/libhal-stm32f1/input_pin.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-stm32f1/interrupt.hpp b/include/libhal-stm32f1/interrupt.hpp deleted file mode 100644 index af11358..0000000 --- a/include/libhal-stm32f1/interrupt.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-stm32f1/output_pin.hpp b/include/libhal-stm32f1/output_pin.hpp deleted file mode 100644 index 16ee281..0000000 --- a/include/libhal-stm32f1/output_pin.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-stm32f1/pin.hpp b/include/libhal-stm32f1/pin.hpp deleted file mode 100644 index 0631298..0000000 --- a/include/libhal-stm32f1/pin.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/include/libhal-stm32f1/uart.hpp b/include/libhal-stm32f1/uart.hpp deleted file mode 100644 index 7f7bf9f..0000000 --- a/include/libhal-stm32f1/uart.hpp +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include diff --git a/linker_scripts/lpc4072.ld b/linker_scripts/lpc4072.ld deleted file mode 100644 index c01549b..0000000 --- a/linker_scripts/lpc4072.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x00000000; -__libhal_flash_size = 64K; -__libhal_ram = 0x10000000; -__libhal_ram_size = 16K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/lpc4074.ld b/linker_scripts/lpc4074.ld deleted file mode 100644 index 29d822a..0000000 --- a/linker_scripts/lpc4074.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x00000000; -__libhal_flash_size = 128K; -__libhal_ram = 0x10000000; -__libhal_ram_size = 32K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/lpc4076.ld b/linker_scripts/lpc4076.ld deleted file mode 100644 index 08401e1..0000000 --- a/linker_scripts/lpc4076.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x00000000; -__libhal_flash_size = 256K; -__libhal_ram = 0x10000000; -__libhal_ram_size = 64K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/lpc4078.ld b/linker_scripts/lpc4078.ld deleted file mode 100644 index c408abc..0000000 --- a/linker_scripts/lpc4078.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x00000000; -__libhal_flash_size = 512K; -__libhal_ram = 0x10000000; -__libhal_ram_size = 64K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/lpc4088.ld b/linker_scripts/lpc4088.ld deleted file mode 100644 index c408abc..0000000 --- a/linker_scripts/lpc4088.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x00000000; -__libhal_flash_size = 512K; -__libhal_ram = 0x10000000; -__libhal_ram_size = 64K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/picolibc_gcc.ld b/linker_scripts/picolibc_gcc.ld deleted file mode 100644 index c9957a0..0000000 --- a/linker_scripts/picolibc_gcc.ld +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__flash = __libhal_flash; -__flash_size = __libhal_flash_size; -__ram = __libhal_ram; -__ram_size = __libhal_ram_size; -__stack_size = __libhal_stack_size; - -INCLUDE picolibcpp.ld \ No newline at end of file diff --git a/linker_scripts/picolibc_llvm.ld b/linker_scripts/picolibc_llvm.ld deleted file mode 100644 index bac6afa..0000000 --- a/linker_scripts/picolibc_llvm.ld +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__boot_flash = __libhal_flash; -__boot_flash_size = 0x40; -__flash = __libhal_flash + __boot_flash_size; -__flash_size = __libhal_flash_size - __boot_flash_size; -__ram = __libhal_ram; -__ram_size = __libhal_ram_size; -__stack_size = __libhal_stack_size; - -INCLUDE picolibcpp.ld diff --git a/linker_scripts/stm32f10xx4.ld b/linker_scripts/stm32f10xx4.ld deleted file mode 100644 index 20f817f..0000000 --- a/linker_scripts/stm32f10xx4.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x08000000; -__libhal_flash_size = 16K; -__libhal_ram = 0x20000000; -__libhal_ram_size = 4K; -__libhal_stack_size = 256; diff --git a/linker_scripts/stm32f10xx6.ld b/linker_scripts/stm32f10xx6.ld deleted file mode 100644 index bbd5367..0000000 --- a/linker_scripts/stm32f10xx6.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x08000000; -__libhal_flash_size = 32K; -__libhal_ram = 0x20000000; -__libhal_ram_size = 6K; -__libhal_stack_size = 512; diff --git a/linker_scripts/stm32f10xx8.ld b/linker_scripts/stm32f10xx8.ld deleted file mode 100644 index f091001..0000000 --- a/linker_scripts/stm32f10xx8.ld +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* Define symbols that will be used with picolibc_gcc and picolibc_llvm */ - -__libhal_flash = 0x08000000; -__libhal_flash_size = 64K; -__libhal_ram = 0x20000000; -__libhal_ram_size = 10K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/stm32f10xxb.ld b/linker_scripts/stm32f10xxb.ld deleted file mode 100644 index 87d4499..0000000 --- a/linker_scripts/stm32f10xxb.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x08000000; -__libhal_flash_size = 128K; -__libhal_ram = 0x20000000; -__libhal_ram_size = 16K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/stm32f10xxc.ld b/linker_scripts/stm32f10xxc.ld deleted file mode 100644 index f2c73e5..0000000 --- a/linker_scripts/stm32f10xxc.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x08000000; -__libhal_flash_size = 256K; -__libhal_ram = 0x20000000; -__libhal_ram_size = 32K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/stm32f10xxd.ld b/linker_scripts/stm32f10xxd.ld deleted file mode 100644 index d4f78db..0000000 --- a/linker_scripts/stm32f10xxd.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x08000000; -__libhal_flash_size = 384K; -__libhal_ram = 0x20000000; -__libhal_ram_size = 48K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/stm32f10xxe.ld b/linker_scripts/stm32f10xxe.ld deleted file mode 100644 index 2c46ff4..0000000 --- a/linker_scripts/stm32f10xxe.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x08000000; -__libhal_flash_size = 512K; -__libhal_ram = 0x20000000; -__libhal_ram_size = 48K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/stm32f10xxf.ld b/linker_scripts/stm32f10xxf.ld deleted file mode 100644 index f60d977..0000000 --- a/linker_scripts/stm32f10xxf.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x08000000; -__libhal_flash_size = 768K; -__libhal_ram = 0x20000000; -__libhal_ram_size = 80K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/stm32f10xxg.ld b/linker_scripts/stm32f10xxg.ld deleted file mode 100644 index 42a76a1..0000000 --- a/linker_scripts/stm32f10xxg.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x08000000; -__libhal_flash_size = 1M; -__libhal_ram = 0x20000000; -__libhal_ram_size = 80K; -__libhal_stack_size = 1K; diff --git a/linker_scripts/stm32f411re.ld b/linker_scripts/stm32f411re.ld deleted file mode 100644 index 74a8945..0000000 --- a/linker_scripts/stm32f411re.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2024 Khalil Estell - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -__libhal_flash = 0x08000000; -__libhal_flash_size = 512K; -__libhal_ram = 0x20000000; -__libhal_ram_size = 128K; -__libhal_stack_size = 1K; diff --git a/src/rp/adc.cpp b/src/adc.cpp similarity index 96% rename from src/rp/adc.cpp rename to src/adc.cpp index fab6005..bfb5953 100644 --- a/src/rp/adc.cpp +++ b/src/adc.cpp @@ -23,9 +23,9 @@ #include #include -#include "libhal-arm-mcu/rp/adc.hpp" -#include "libhal-arm-mcu/rp/rp.hpp" -#include "libhal-arm-mcu/rp/time.hpp" +#include "libhal-picosdk/adc.hpp" +#include "libhal-picosdk/rp.hpp" +#include "libhal-picosdk/time.hpp" namespace hal::rp { @@ -151,7 +151,7 @@ adc16_pack::read_session adc16_pack::async() channel_config_set_write_increment(&cfg, true); channel_config_set_dreq(&cfg, DREQ_ADC); dma_channel_set_config(read_dma, &cfg, false); - return { static_cast(read_dma), m_read_size, m_first_pin }; + return { static_cast(read_dma), m_first_pin }; } adc16_pack::read_session::~read_session() { @@ -179,7 +179,7 @@ adc16_pack::read_session::promise adc16_pack::read_session::read( adc_select_input(m_first_pin); adc_hw->fcs |= bool_to_bit(true) << ADC_FCS_EN_LSB; adc_run(true); - return promise{ m_dma, m_first_pin }; + return promise{ m_dma }; } microseconds adc16_pack::read_session::promise::poll() diff --git a/src/dwt_counter.cpp b/src/dwt_counter.cpp index fb075f3..03d6f81 100644 --- a/src/dwt_counter.cpp +++ b/src/dwt_counter.cpp @@ -12,7 +12,7 @@ // See the License for the specific language governing permissions and // limitations under the License. -#include +#include #include "dwt_counter_reg.hpp" diff --git a/src/rp/gpio.cpp b/src/gpio.cpp similarity index 97% rename from src/rp/gpio.cpp rename to src/gpio.cpp index c605b6c..6261b40 100644 --- a/src/rp/gpio.cpp +++ b/src/gpio.cpp @@ -29,10 +29,10 @@ #include #include -#include "libhal-arm-mcu/rp/input_pin.hpp" -#include "libhal-arm-mcu/rp/interrupt_pin.hpp" -#include "libhal-arm-mcu/rp/output_pin.hpp" -#include "libhal-arm-mcu/rp/rp.hpp" +#include "libhal-picosdk/input_pin.hpp" +#include "libhal-picosdk/interrupt_pin.hpp" +#include "libhal-picosdk/output_pin.hpp" +#include "libhal-picosdk/rp.hpp" namespace { struct interrupt_manager diff --git a/src/rp/i2c.cpp b/src/i2c.cpp similarity index 98% rename from src/rp/i2c.cpp rename to src/i2c.cpp index 0dbe0b1..5dcb799 100644 --- a/src/rp/i2c.cpp +++ b/src/i2c.cpp @@ -19,7 +19,7 @@ #include #include -#include "libhal-arm-mcu/rp/i2c.hpp" +#include "libhal-picosdk/i2c.hpp" // pico macros interfere with ours #undef i2c0 diff --git a/src/interrupt.cpp b/src/interrupt.cpp index 53864a7..752d964 100644 --- a/src/interrupt.cpp +++ b/src/interrupt.cpp @@ -12,13 +12,13 @@ // See the License for the specific language governing permissions and // limitations under the License. -#include +#include #include #include #include -#include +#include #include #include "interrupt_reg.hpp" diff --git a/src/lpc40/adc.cpp b/src/lpc40/adc.cpp deleted file mode 100644 index 4b31e4e..0000000 --- a/src/lpc40/adc.cpp +++ /dev/null @@ -1,135 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include -#include -#include - -#include "adc_reg.hpp" - -namespace hal::lpc40 { - -namespace { -void setup(adc::channel const& p_channel) -{ - using namespace hal::literals; - - if (p_channel.clock_rate > 1.0_MHz) { - throw std::errc::invalid_argument; - } - - if (p_channel.index >= adc_reg_t::channel_length) { - throw std::errc::invalid_argument; - } - - power_on(peripheral::adc); - - // For proper operation, analog pins must be set to floating. - p_channel.adc_pin.function(p_channel.pin_function) - .resistor(hal::pin_resistor::none) - .open_drain(false) - .analog(true); - - auto const clock_frequency = get_frequency(peripheral::adc); - auto const clock_divider = clock_frequency / p_channel.clock_rate; - auto const clock_divider_int = static_cast(clock_divider); - - // Activate burst mode (continuous sampling), power on ADC and set clock - // divider. - hal::bit_modify(adc_reg->control) - .set() - .set() - .insert(clock_divider_int); - - // Enable channel. Must be done in a separate write to memory than power on - // and burst enable. - hal::bit_modify(adc_reg->control) - .set(bit_mask{ .position = p_channel.index, .width = 1 }); -} -} // namespace - -adc::adc(channel const& p_channel) - : m_sample(&adc_reg->data[p_channel.index]) -{ - setup(p_channel); -} - -adc::channel adc::get_predefined_channel_info(std::uint8_t p_channel) -{ - enum adc_function : uint8_t - { - pin_0123 = 0b001, - pin_4567 = 0b011 - }; - constexpr std::array channels{ - adc::channel{ - .adc_pin = pin(0, 23), - .index = 0, - .pin_function = adc_function::pin_0123, - }, - adc::channel{ - .adc_pin = pin(0, 24), - .index = 1, - .pin_function = adc_function::pin_0123, - }, - adc::channel{ - .adc_pin = pin(0, 25), - .index = 2, - .pin_function = adc_function::pin_0123, - }, - adc::channel{ - .adc_pin = pin(0, 26), - .index = 3, - .pin_function = adc_function::pin_0123, - }, - adc::channel{ - .adc_pin = pin(1, 30), - .index = 4, - .pin_function = adc_function::pin_4567, - }, - adc::channel{ - .adc_pin = pin(1, 31), - .index = 5, - .pin_function = adc_function::pin_4567, - }, - adc::channel{ - .adc_pin = pin(0, 12), - .index = 6, - .pin_function = adc_function::pin_4567, - }, - adc::channel{ - .adc_pin = pin(0, 13), - .index = 7, - .pin_function = adc_function::pin_4567, - }, - }; - - return channels[p_channel]; -} - -float adc::driver_read() -{ - constexpr auto full_scale_max = bit_limits<12, size_t>::max(); - constexpr auto full_scale_float = static_cast(full_scale_max); - // Read sample from peripheral memory - auto sample_integer = hal::bit_extract(*m_sample); - auto sample = static_cast(sample_integer); - return sample / full_scale_float; -} -} // namespace hal::lpc40 diff --git a/src/lpc40/adc_reg.hpp b/src/lpc40/adc_reg.hpp deleted file mode 100644 index 60d8cc9..0000000 --- a/src/lpc40/adc_reg.hpp +++ /dev/null @@ -1,96 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include - -namespace hal::lpc40 { -/// adc register map -struct adc_reg_t -{ - /// Number of channels - static constexpr size_t channel_length = 8; - /// Offset: 0x000 A/D Control Register (R/W) - uint32_t volatile control; - /// Offset: 0x004 A/D Global Data Register (R/W) - uint32_t volatile global_data; - /// Offset: 0x008 Reserved 0 - std::array reserved0; - /// Offset: 0x00C A/D Interrupt Enable Register (R/W) - uint32_t volatile interrupt_enable; - /// Offset: 0x010-0x02C A/D Channel 0..7 Data Register (R/W) - std::array data; - /// Offset: 0x030 A/D Status Register (R/ ) - uint32_t const volatile stat; - /// Offset: 0x034 A/D Trim Calibration (R/W) - uint32_t volatile trim; -}; - -/// Namespace containing the bit_mask objects that are used to manipulate the -/// lpc40xx ADC Control register. -namespace adc_control_register { -/// In burst mode, sets the ADC channels to be automatically converted. -/// It bit position represents 1 channel with this 8 channel ADC. -/// In software mode, this should hold only a single 1 for the single -/// channel to be converted. -static constexpr auto channel_select = hal::bit_mask::from<0, 7>(); - -/// Sets the channel's clock divider. Potentially saving power if clock is -/// reduced further. -static constexpr auto clock_divider = hal::bit_mask::from<8, 15>(); - -/// Enable Burst Mode for the ADC. See BurstMode() method of this class to -/// learn more about what it is and how it works. -static constexpr auto burst_enable = hal::bit_mask::from<16>(); - -/// Power on the ADC -static constexpr auto power_enable = hal::bit_mask::from<21>(); - -/// In order to start a conversion a start code must be inserted into this -/// bit location. -static constexpr auto start_code = hal::bit_mask::from<24, 26>(); - -/// Not used in this driver, but allows the use of an external pins to -/// trigger a conversion. This flag indicates if rising or falling edges -/// trigger the conversion. -/// 1 = falling, 0 = rising. -static constexpr auto start_edge = hal::bit_mask::from<27>(); -}; // namespace adc_control_register - -/// Namespace containing the bit_mask objects that are used to manipulate the -/// lpc40xx ADC Global Data register. -namespace adc_data_register { -/// Result mask holds the latest result from the last ADC that was converted -static constexpr auto result = hal::bit_mask::from<4, 15>(); - -/// Converted channel mask indicates which channel was converted in the -/// latest conversion. -static constexpr auto converted_channel = hal::bit_mask::from<24, 26>(); - -/// Holds whether or not the ADC overran its conversion. -static constexpr auto overrun = hal::bit_mask::from<30>(); - -/// Indicates when the ADC conversion is complete. -static constexpr auto done = hal::bit_mask::from<31>(); -}; // namespace adc_data_register - -constexpr std::intptr_t lpc_apb0_base = 0x40000000UL; -constexpr std::intptr_t lpc_adc_addr = lpc_apb0_base + 0x34000; -// NOLINTNEXTLINE(performance-no-int-to-ptr) -inline auto* adc_reg = reinterpret_cast(lpc_adc_addr); -} // namespace hal::lpc40 diff --git a/src/lpc40/can.cpp b/src/lpc40/can.cpp deleted file mode 100644 index 9fb562e..0000000 --- a/src/lpc40/can.cpp +++ /dev/null @@ -1,341 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "can_reg.hpp" - -namespace hal::lpc40 { -namespace { - -can_reg_t* get_can_reg(peripheral p_id) -{ - switch (p_id) { - case peripheral::can1: - return can_reg1; - case peripheral::can2: - default: - return can_reg2; - } -} - -/// Container for the LPC40xx CAN BUS registers -struct lpc_message -{ - /// TFI register contents - uint32_t frame = 0; - /// TID register contents - uint32_t id = 0; - /// TDA register contents - uint32_t data_a = 0; - /// TDB register contents - uint32_t data_b = 0; -}; - -void enable_acceptance_filter() noexcept -{ - can_acceptance_filter->acceptance_filter = - value(can_commands::accept_all_messages); -} - -[[maybe_unused]] bool has_data(can_reg_t* p_reg) noexcept -{ - return bit_extract(p_reg->gsr); -} - -can::message_t receive(can_reg_t* p_reg) noexcept -{ - static constexpr auto id_mask = bit_mask::from<0, 28>(); - can::message_t message; - - // Extract all of the information from the message frame - auto frame = p_reg->rfs; - auto remote_request = bit_extract(frame); - auto length = bit_extract(frame); - - message.is_remote_request = remote_request; - message.length = static_cast(length); - - // Get the frame ID - message.id = bit_extract(p_reg->rid); - - // Pull the bytes from RDA into the payload array - message.payload[0] = (p_reg->rda >> (0 * 8)) & 0xFF; - message.payload[1] = (p_reg->rda >> (1 * 8)) & 0xFF; - message.payload[2] = (p_reg->rda >> (2 * 8)) & 0xFF; - message.payload[3] = (p_reg->rda >> (3 * 8)) & 0xFF; - - // Pull the bytes from RDB into the payload array - message.payload[4] = (p_reg->rdb >> (0 * 8)) & 0xFF; - message.payload[5] = (p_reg->rdb >> (1 * 8)) & 0xFF; - message.payload[6] = (p_reg->rdb >> (2 * 8)) & 0xFF; - message.payload[7] = (p_reg->rdb >> (3 * 8)) & 0xFF; - - // Release the RX buffer and allow another buffer to be read. - p_reg->cmr = value(can_commands::release_rx_buffer); - - return message; -} - -/// Convert message into the registers LPC40xx can bus registers. -/// -/// @param message - message to convert. -can_lpc_message message_to_registers(can::message_t const& p_message) -{ - static constexpr auto highest_11_bit_number = 2048UL; - can_lpc_message registers; - - uint32_t message_frame_info = 0; - - if (p_message.id < highest_11_bit_number) { - message_frame_info = - bit_value(0) - .insert(p_message.length) - .insert(p_message.is_remote_request) - .insert(0U) - .to(); - } else { - message_frame_info = - bit_value(0) - .insert(p_message.length) - .insert(p_message.is_remote_request) - .insert(1U) - .to(); - } - - uint32_t data_a = 0; - data_a |= static_cast(p_message.payload[0] << (0UL * 8)); - data_a |= static_cast(p_message.payload[1] << (1UL * 8)); - data_a |= static_cast(p_message.payload[2] << (2UL * 8)); - data_a |= static_cast(p_message.payload[3] << (3UL * 8)); - - uint32_t data_b = 0; - data_b |= static_cast(p_message.payload[4U] << (0UL * 8UL)); - data_b |= static_cast(p_message.payload[5U] << (1UL * 8UL)); - data_b |= static_cast(p_message.payload[6U] << (2UL * 8UL)); - data_b |= static_cast(p_message.payload[7U] << (3UL * 8UL)); - - registers.frame = message_frame_info; - registers.id = p_message.id; - registers.data_a = data_a; - registers.data_b = data_b; - - return registers; -} -} // namespace - -void can::configure_baud_rate(can::port const& p_port, - can::settings const& p_settings) -{ - using namespace hal::literals; - - auto* reg = get_can_reg(p_port.id); - auto const can_frequency = get_frequency(p_port.id); - - bool external_oscillator_used = using_external_oscillator(); - bool baud_rate_above_100khz = p_settings.baud_rate > 100.0_kHz; - auto const valid_divider = - hal::calculate_can_bus_divider(can_frequency, p_settings.baud_rate); - - if ((baud_rate_above_100khz && not external_oscillator_used) || - not valid_divider) { - safe_throw(hal::operation_not_supported(this)); - } - - auto const dividers = valid_divider.value(); - auto const prescale = dividers.clock_divider - 1U; - auto const sync_jump_width = dividers.synchronization_jump_width - 1U; - - auto phase_segment1 = - (dividers.phase_segment1 + dividers.propagation_delay) - 1U; - auto phase_segment2 = dividers.phase_segment2 - 1U; - - constexpr auto segment2_bit_limit = - hal::bit_limits::max(); - - // Check if phase segment 2 does not fit - if (phase_segment2 > segment2_bit_limit) { - // Take the extra time quanta and add it to the phase 1 segment - auto const phase_segment2_remainder = phase_segment2 - segment2_bit_limit; - phase_segment1 += phase_segment2_remainder; - // Cap phase segment 2 to the max available in the bit field - phase_segment2 = segment2_bit_limit; - } - - std::uint8_t enable_triple_sampling = 0; - // The bus is sampled 3 times (recommended for low speeds, 100kHz is - // considered HIGH). - if (p_settings.baud_rate < 100.0_kHz) { - enable_triple_sampling = 1U; - } - - bit_modify(reg->btr) - .insert(sync_jump_width) - .insert(phase_segment1) - .insert(phase_segment2) - .insert(prescale) - .insert(enable_triple_sampling); -} - -void can::setup(can::port const& p_port, can::settings const& p_settings) -{ - auto* reg = get_can_reg(p_port.id); - - initialize_interrupts(); - - /// Power on CAN BUS peripheral - power_on(p_port.id); - - /// Configure pins - p_port.td.function(p_port.td_function_code); - p_port.rd.function(p_port.rd_function_code); - - // Enable reset mode in order to write to CAN registers. - bit_modify(reg->mod).set(); - - configure_baud_rate(p_port, p_settings); - enable_acceptance_filter(); - - // Disable reset mode, enabling the device - bit_modify(reg->mod).clear(); -} - -can::can(std::uint8_t p_port_number, can::settings const& p_settings) -{ - if (p_port_number == 1) { - m_port = can::port{ - .td = pin(0, 1), - .td_function_code = 1, - .rd = pin(0, 0), - .rd_function_code = 1, - .id = peripheral::can1, - .irq_number = irq::can, - }; - } else if (p_port_number == 2) { - m_port = can::port{ - .td = pin(2, 8), - .td_function_code = 1, - .rd = pin(2, 7), - .rd_function_code = 1, - .id = peripheral::can2, - .irq_number = irq::can, - }; - } else { - safe_throw(hal::operation_not_supported(this)); - } - - setup(m_port, p_settings); -} - -can::~can() -{ - auto* reg = get_can_reg(m_port.id); - // Disable generating an interrupt request by this CAN peripheral, but leave - // the interrupt enabled. We must NOT disable the interrupt via Arm's NVIC - // as it could be used by the other CAN peripheral. - bit_modify(reg->ier).clear(); -} - -/** - * @brief Construct a new can object - * - * @param p_port - CAN port information - */ -can::can(port const& p_port, can::settings const& p_settings) - : m_port(p_port) -{ - setup(p_port, p_settings); -} - -void can::driver_configure(can::settings const& p_settings) -{ - return setup(m_port, p_settings); -} - -void can::driver_send(message_t const& p_message) -{ - auto* reg = get_can_reg(m_port.id); - auto can_message_registers = message_to_registers(p_message); - - // Wait for one of the buffers to be free so we can transmit a message - // through it. - bool sent = false; - while (!sent) { - auto const status_register = reg->sr; - // Check if any buffer is available. - if (bit_extract(status_register) == - can_buffer_status::bus_off) { - throw std::errc::network_down; - } else if (bit_extract(status_register)) { - reg->tfi1 = can_message_registers.frame; - reg->tid1 = can_message_registers.id; - reg->tda1 = can_message_registers.data_a; - reg->tdb1 = can_message_registers.data_b; - reg->cmr = value(can_commands::send_tx_buffer1); - sent = true; - } else if (bit_extract(status_register)) { - reg->tfi2 = can_message_registers.frame; - reg->tid2 = can_message_registers.id; - reg->tda2 = can_message_registers.data_a; - reg->tdb2 = can_message_registers.data_b; - reg->cmr = value(can_commands::send_tx_buffer2); - sent = true; - } else if (bit_extract(status_register)) { - reg->tfi3 = can_message_registers.frame; - reg->tid3 = can_message_registers.id; - reg->tda3 = can_message_registers.data_a; - reg->tdb3 = can_message_registers.data_b; - reg->cmr = value(can_commands::send_tx_buffer3); - sent = true; - } - } -} - -void can::driver_bus_on() -{ - auto* reg = get_can_reg(m_port.id); - // When the device is in "bus-off" mode, the mode::reset bit is set to '1'. To - // re-enable the device, clear the reset bit. - bit_modify(reg->mod).clear(); -} - -void can::driver_on_receive(hal::callback p_receive_handler) -{ - auto* reg = get_can_reg(m_port.id); - // Save the handler - m_receive_handler = p_receive_handler; - - // Create a lambda that passes this object's reference to the stored handler - auto isr = [this, reg]() { - auto message = receive(reg); - m_receive_handler(message); - }; - - auto can_handler = static_callable(isr).get_handler(); - cortex_m::enable_interrupt(irq::can, can_handler); - - bit_modify(reg->ier).set(can_interrupts::received_message); -} -} // namespace hal::lpc40 diff --git a/src/lpc40/can_reg.hpp b/src/lpc40/can_reg.hpp deleted file mode 100644 index b8c114f..0000000 --- a/src/lpc40/can_reg.hpp +++ /dev/null @@ -1,294 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include - -namespace hal::lpc40 { -struct can_acceptance_filter_ram_t -{ - /// Mask IDs - std::array mask; -}; - -struct can_acceptance_filter_t -{ - /// Offset: 0x00000000 - Acceptance Filter Register - u32 volatile acceptance_filter; - /// Offset: 0x00000004 - Standard Frame Individual Start Address Register - u32 volatile sff_sa; - /// Offset: 0x00000008 - Standard Frame Group Start Address Register - u32 volatile sff_grp_sa; - /// Offset: 0x0000000C - Extended Frame Start Address Register - u32 volatile eff_sa; - /// Offset: 0x00000010 - Extended Frame Group Start Address Register - u32 volatile eff_grp_sa; - /// Offset: 0x00000014 - End of AF Tables register - u32 volatile endoftable; - /// Offset: 0x00000018 - LUT Error Address register - u32 const volatile luterrad; - /// Offset: 0x0000001C - LUT Error Register - u32 const volatile luterr; - /// Offset: 0x00000020 - CAN Central Transmit Status Register - u32 volatile full_can_transmit_status; - /// Offset: 0x00000024 - FullCAN Interrupt and Capture registers 0 - u32 volatile fcanic0; - /// Offset: 0x00000028 - FullCAN Interrupt and Capture registers 1 - u32 volatile fcanic1; -}; - -struct can_central_reg_t -{ - u32 const volatile txsr; - u32 const volatile rxsr; - u32 const volatile msr; -}; - -struct can_reg_t -{ - /// Offset: 0x00000000 - Controls the operating mode of the CAN Controller - u32 volatile mod; - /// Offset: 0x00000004 - Command bits that affect the state - u32 volatile cmr; - /// Offset: 0x00000008 - Global Controller Status and Error Counters - u32 volatile gsr; - /// Offset: 0x0000000C - Interrupt status, Arbitration Lost Capture, Error - /// Code Capture - u32 const volatile icr; - /// Offset: 0x00000010 - Interrupt Enable Register - u32 volatile ier; - /// Offset: 0x00000014 - Bus Timing Register - u32 volatile btr; - /// Offset: 0x00000018 - Error Warning Limit - u32 volatile ewl; - /// Offset: 0x0000001C - Status Register - u32 const volatile sr; - /// Offset: 0x00000020 - Receive frame status - u32 volatile rfs; - /// Offset: 0x00000024 - Received Identifier - u32 volatile rid; - /// Offset: 0x00000028 - Received data bytes 1-4 - u32 volatile rda; - /// Offset: 0x0000002C - Received data bytes 5-8 - u32 volatile rdb; - /// Offset: 0x00000030 - Transmit frame info (Tx Buffer 1) - u32 volatile tfi1; - /// Offset: 0x00000034 - Transmit Identifier (Tx Buffer 1) - u32 volatile tid1; - /// Offset: 0x00000038 - Transmit data bytes 1-4 (Tx Buffer 1) - u32 volatile tda1; - /// Offset: 0x0000003C - Transmit data bytes 5-8 (Tx Buffer 1) - u32 volatile tdb1; - /// Offset: 0x00000040 - Transmit frame info (Tx Buffer 2) - u32 volatile tfi2; - /// Offset: 0x00000044 - Transmit Identifier (Tx Buffer 2) - u32 volatile tid2; - /// Offset: 0x00000048 - Transmit data bytes 1-4 (Tx Buffer 2) - u32 volatile tda2; - /// Offset: 0x0000004C - Transmit data bytes 5-8 (Tx Buffer 2) - u32 volatile tdb2; - /// Offset: 0x00000050 - Transmit frame info (Tx Buffer 3) - u32 volatile tfi3; - /// Offset: 0x00000054 - Transmit Identifier (Tx Buffer 3) - u32 volatile tid3; - /// Offset: 0x00000058 - Transmit data bytes 1-4 (Tx Buffer 3) - u32 volatile tda3; - /// Offset: 0x0000005C - Transmit data bytes 5-8 (Tx Buffer 3) - u32 volatile tdb3; -}; - -/// Container for the LPC40xx CAN BUS registers -struct can_lpc_message -{ - /// TFI register contents - u32 frame = 0; - /// TID register contents - u32 id = 0; - /// TDA register contents - u32 data_a = 0; - /// TDB register contents - u32 data_b = 0; -}; // namespace can_lpc_message - -/// https://www.nxp.com/docs/en/user-guide/UM10562.pdf (pg. 554) -enum class can_commands : u8 -{ - release_rx_buffer = 0x04, - send_tx_buffer1 = 0x21, - send_tx_buffer2 = 0x41, - send_tx_buffer3 = 0x81, - self_reception_send_tx_buffer1 = 0x30, - accept_all_messages = 0x02, -}; - -/// This struct holds bit timing values. It is used to configure the CAN bus -/// clock. It is HW mapped to a 32-bit register: BTR (pg. 562) -namespace can_bus_timing { -/// The peripheral bus clock is divided by this value -static constexpr auto prescalar = bit_mask::from<0, 9>(); - -/// Used to compensate for positive and negative edge phase errors -static constexpr auto sync_jump_width = bit_mask::from<14, 15>(); -/// The delay from the nominal Sync point to the sample point is (this value -/// plus one) CAN clocks. -static constexpr auto time_segment1 = bit_mask::from<16, 19>(); - -/// The delay from the sample point to the next nominal sync point isCAN -/// clocks. The nominal CAN bit time is (this value plus the value in -/// time_segment1 plus 3) CAN clocks. -static constexpr auto time_segment2 = bit_mask::from<20, 22>(); - -/// How many times the bus is sampled; 0 == once, 1 == 3 times -static constexpr auto sampling = bit_mask::from<23>(); -}; // namespace can_bus_timing - -/// This struct holds interrupt flags and capture flag status. It is HW mapped -/// to a 16-bit register: ICR (pg. 557) -namespace can_interrupts { -// ICR - Interrupt and Capture Register -// NOTE: Bits 1-10 are cleared by the CAN controller -// as soon as they are read. -// Bits 16-23 & 24-31 are released by the CAN -// controller as soon as they are read. - -/// Assert interrupt when a new message has been received -static constexpr auto received_message = bit_mask::from<0>(); - -/// Assert interrupt when TX Buffer 1 has finished or aborted its -/// transmission. -static constexpr auto tx1_ready = bit_mask::from<1>(); - -/// Assert interrupt when bus status or error status is asserted. -static constexpr auto error_warning = bit_mask::from<2>(); - -/// Assert interrupt on data overrun occurs -static constexpr auto data_overrun = bit_mask::from<3>(); - -/// Assert interrupt when CAN controller is sleeping and was woken up from -/// bus activity. -static constexpr auto wakeup = bit_mask::from<4>(); - -/// Assert interrupt when the CAN Controller has reached the Error Passive -/// Status (error counter exceeds 127) -static constexpr auto error_passive = bit_mask::from<5>(); - -/// Assert interrupt when arbitration is lost -static constexpr auto arbitration_lost = bit_mask::from<6>(); - -/// Assert interrupt on bus error -static constexpr auto bus_error = bit_mask::from<7>(); - -/// Assert interrupt when any message has been successfully transmitted. -static constexpr auto identifier_ready = bit_mask::from<8>(); - -/// Assert interrupt when TX Buffer 2 has finished or aborted its -/// transmission. -static constexpr auto tx2_ready = bit_mask::from<9>(); - -/// Assert interrupt when TX Buffer 3 has finished or aborted its -/// transmission. -static constexpr auto tx3_ready = bit_mask::from<10>(); - -/// Error Code Capture status bits to be read during an interrupt -static constexpr auto error_code_location = bit_mask::from<16, 20>(); -/// Indicates if the error occurred during transmission (0) or receiving (1) -static constexpr auto error_code_direction = bit_mask::from<21>(); -/// The type of bus error that occurred such as bit error, stuff error, etc -static constexpr auto error_code_type = bit_mask::from<22, 23>(); -/// Bit location of where arbitration was lost. -static constexpr auto arbitration_lost_loc = bit_mask::from<24, 31>(); -}; // namespace can_interrupts - -/// This struct holds CAN controller global status information. -/// It is a condensed version of the status register. -/// It is HW mapped to a 32-bit register: GSR (pg. 555) -namespace can_global_status { -/// If 1, receive buffer has at least 1 complete message stored -static constexpr auto receive_buffer = bit_mask::from<0>(); - -/// Bus status bit. If this is '1' then the bus is active, otherwise the bus -/// is bus off. -static constexpr auto bus_error = bit_mask::from<7>(); -}; // namespace can_global_status - -/// This struct holds CAN controller status information. It is HW mapped to a -/// 32-bit register: SR (pg. 564). Many of them are not here because they have -/// counter parts in GSR (global status register). -namespace can_buffer_status { -/// TX1 Buffer has been released -static constexpr auto tx1_released = bit_mask::from<2>(); - -/// TX2 Buffer has been released -static constexpr auto tx2_released = bit_mask::from<10>(); - -/// TX3 Buffer has been released -static constexpr auto tx3_released = bit_mask::from<18>(); - -/// Will be 0 if the device is Bus-On. -/// Will be 1 if the device is Bus-Off. -static constexpr auto bus_status = bit_mask::from<15>(); -static constexpr u32 bus_on = 0; -static constexpr u32 bus_off = 1; -}; // namespace can_buffer_status - -/// CAN BUS modes -namespace can_mode { -/// Reset CAN Controller, allows configuration registers to be modified. -static constexpr auto reset = bit_mask::from<0>(); - -/// Put device into Listen Only Mode, device will not acknowledge, messages. -static constexpr auto listen_only = bit_mask::from<1>(); - -/// Put device on self test mode. -static constexpr auto self_test = bit_mask::from<2>(); - -/// Enable transmit priority control. When enabled, allows a particular -static constexpr auto tx_priority = bit_mask::from<3>(); - -/// Put device to Sleep Mode. -static constexpr auto sleep_mode = bit_mask::from<4>(); - -/// Receive polarity mode. If 1 RD input is active high -static constexpr auto rx_polarity = bit_mask::from<5>(); - -/// Put CAN into test mode, which allows the TD pin to reflect its bits ot -/// the RD pin. -static constexpr auto test = bit_mask::from<7>(); -}; // namespace can_mode - -/// CAN Bus frame bit masks for the TFM and RFM registers -namespace can_frame_info { -/// The message priority bits (not used in this implementation) -static constexpr auto priority = bit_mask::from<0, 7>(); - -/// The length of the data -static constexpr auto length = bit_mask::from<16, 19>(); - -/// If set to 1, the message becomes a remote request message -static constexpr auto remote_request = bit_mask::from<30>(); - -/// If 0, the ID is 11-bits, if 1, the ID is 29-bits. -static constexpr auto format = bit_mask::from<31>(); -}; // namespace can_frame_info - -/// Pointer to the LPC CAN BUS acceptance filter peripheral in memory -inline auto* can_acceptance_filter = - reinterpret_cast(0x4003'C000); -inline auto* can_reg1 = reinterpret_cast(0x4004'4000); -inline auto* can_reg2 = reinterpret_cast(0x4004'8000); -} // namespace hal::lpc40 diff --git a/src/lpc40/clock.cpp b/src/lpc40/clock.cpp deleted file mode 100644 index e122ea1..0000000 --- a/src/lpc40/clock.cpp +++ /dev/null @@ -1,343 +0,0 @@ -#include - -#include - -#include -#include -#include - -#include "system_controller_reg.hpp" - -namespace hal::lpc40 { - -namespace { -hertz cpu_clock_rate = irc_frequency; -hertz emc_clock_rate = irc_frequency; -hertz usb_clock_rate = irc_frequency; -hertz spifi_clock_source_rate = irc_frequency; -hertz peripheral_clock_rate = irc_frequency / default_peripheral_divider; - -struct pll_registers -{ - uint32_t volatile* p_control; - uint32_t volatile* p_config; - uint32_t volatile* p_feed; - uint32_t const volatile* p_stat; -}; - -hertz setup_pll(clock_tree const& p_clock_config, - pll_registers const& p_pll_registers, - std::uint8_t p_pll_index) -{ - using namespace hal::literals; - - auto const& pll_config = p_clock_config.pll[p_pll_index]; - hertz fcco = 0.0_Hz; - - if (pll_config.enabled) { - hal::bit_modify(*p_pll_registers.p_config) - .insert( - static_cast(pll_config.multiply - 1U)); - - if (p_clock_config.use_external_oscillator == false && p_pll_index == 0) { - fcco = irc_frequency * static_cast(pll_config.multiply); - } else { - fcco = p_clock_config.oscillator_frequency * - static_cast(pll_config.multiply); - } - - // In the data sheet this is the divider, but it acts to multiply the - // frequency higher to a point where the fcco is stable. - // - // fcco must be between 156 MHz to 320 MHz. - uint32_t fcco_divide = 0; - for (auto divide_codes : { 0U, 1U, 2U, 3U }) { - // Multiply the fcco by 2^divide_code - hertz final_fcco = fcco * static_cast(1U << divide_codes); - if (156.0_MHz <= final_fcco && final_fcco <= 320.0_MHz) { - fcco_divide = divide_codes; - break; - } - } - - hal::bit_modify(*p_pll_registers.p_config) - .insert(fcco_divide); - // Enable PLL - *p_pll_registers.p_control = 1; - // Feed PLL in order to start the locking process - *p_pll_registers.p_feed = 0xAA; - *p_pll_registers.p_feed = 0x55; - - while (!hal::bit_extract(*p_pll_registers.p_stat)) { - continue; - } - } - - return fcco; -} - -void enable_external_oscillator(hertz p_oscillator_frequency) -{ - using namespace hal::literals; - - auto frequency = p_oscillator_frequency; - // Range select is 0 when 1.0_MHz < frequency < 20.0_MHz - std::uint32_t range_select_value = 0; - - if (20.0_MHz < frequency && frequency <= 25.0_MHz) { - range_select_value = 1; - } - - hal::bit_modify(system_controller_reg->scs) - .insert(range_select_value) - .set(); - - while ( - !hal::bit_extract(system_controller_reg->scs)) { - continue; - } -} -} // namespace - -void maximum(hertz p_external_crystal_frequency) -{ - static constexpr auto max_speed = 120.0_MHz; - auto const multiply = max_speed / p_external_crystal_frequency; - - clock_tree config{}; - config.oscillator_frequency = p_external_crystal_frequency; - config.use_external_oscillator = true; - config.cpu.use_pll0 = true; - config.cpu.divider = 1; - config.emc_half_cpu_divider = false; - config.peripheral_divider = 1; - config.usb.clock = usb_clock_source::pll0; - config.usb.divider = usb_divider::divide_by1; - config.spifi.clock = spifi_clock_source::pll0; - config.spifi.divider = 1; - config.pll[0].enabled = true; - config.pll[0].multiply = static_cast(multiply); - config.pll[1].enabled = false; - - configure_clocks(config); -} - -/** - * @brief Determins if the external oscillator is currently enabled and in use - * - * @return true - external oscillator is in use currently - * @return false - external oscillator is NOT in use currently - */ -bool using_external_oscillator() -{ - return hal::bit_extract( - system_controller_reg->scs); -} - -hertz get_frequency(peripheral p_peripheral) -{ - switch (p_peripheral) { - case peripheral::emc: - return emc_clock_rate; - case peripheral::usb: - return usb_clock_rate; - case peripheral::spifi: - return spifi_clock_source_rate; - case peripheral::cpu: - return cpu_clock_rate; - default: - return peripheral_clock_rate; - } -} - -void configure_clocks(clock_tree const& p_clock_tree) -{ - using namespace hal::literals; - - hertz system_clock = 0.0_Hz; - hertz pll0 = 0.0_Hz; - hertz pll1 = 0.0_Hz; - hertz cpu = 0.0_Hz; - hertz usb = 0.0_Hz; - hertz spifi = 0.0_Hz; - - // ========================================================================= - // Step 1. Select IRC as clock source for everything. - // Make sure PLLs are not clock sources for everything. - // ========================================================================= - // Set CPU clock to system clock - hal::bit_modify(system_controller_reg->cpu_clock_select) - .insert(0UL); - - // Set USB clock to system clock - hal::bit_modify(system_controller_reg->usb_clock_select) - .insert(value(usb_clock_source::system_clock)); - - // Set spifi clock to system clock - hal::bit_modify(system_controller_reg->spifi_clock_select) - .insert(value(spifi_clock_source::system_clock)); - - // Set the clock source to IRC (0) and not external oscillator. The next - // phase disables that clock source, which will stop the system if this is - // not switched. - system_controller_reg->clock_source_select = 0; - - // ========================================================================= - // Step 2. Disable PLLs - // ========================================================================= - // NOTE: The only bit in this register that is used is bit 0 which indicates - // enabled or disabled status, thus a single assignment is needed. - system_controller_reg->pll0con = 0; - system_controller_reg->pll1con = 0; - - // Disabling external oscillator if it is not going to be used - hal::bit_modify(system_controller_reg->scs) - .clear(oscillator::external_enable); - - // ========================================================================= - // Step 3. Select oscillator source for System Clock and Main PLL - // ========================================================================= - // Enable the external oscillator if we are using it, which would be the - // case if the alternative PLL is enabled or external oscillator is - // selected. - if (p_clock_tree.use_external_oscillator == true || - p_clock_tree.pll[1].enabled) { - enable_external_oscillator(p_clock_tree.oscillator_frequency); - } - - system_controller_reg->clock_source_select = - p_clock_tree.use_external_oscillator; - - if (p_clock_tree.use_external_oscillator) { - system_clock = p_clock_tree.oscillator_frequency; - } else { - system_clock = irc_frequency; - } - - // ========================================================================= - // Step 4. Configure PLLs - // ========================================================================= - pll0 = setup_pll(p_clock_tree, - { - .p_control = &system_controller_reg->pll0con, - .p_config = &system_controller_reg->pll0cfg, - .p_feed = &system_controller_reg->pll0feed, - .p_stat = &system_controller_reg->pll0stat, - }, - 0); - - pll1 = setup_pll(p_clock_tree, - { - .p_control = &system_controller_reg->pll1con, - .p_config = &system_controller_reg->pll1cfg, - .p_feed = &system_controller_reg->pll1feed, - .p_stat = &system_controller_reg->pll1stat, - }, - 1); - - // ========================================================================= - // Step 5. Set clock dividers for each clock source - // ========================================================================= - // Set CPU clock divider - hal::bit_modify(system_controller_reg->cpu_clock_select) - .insert(p_clock_tree.cpu.divider); - - // Set EMC clock divider - hal::bit_modify(system_controller_reg->emmc_clock_select) - .insert(p_clock_tree.emc_half_cpu_divider); - - // Set Peripheral clock divider - hal::bit_modify(system_controller_reg->peripheral_clock_select) - .insert(p_clock_tree.peripheral_divider); - - // Set USB clock divider - hal::bit_modify(system_controller_reg->usb_clock_select) - .insert(value(p_clock_tree.usb.divider)); - - // Set spifi clock divider - hal::bit_modify(system_controller_reg->spifi_clock_select) - .insert(p_clock_tree.spifi.divider); - - if (p_clock_tree.cpu.use_pll0) { - cpu = pll0; - } else { - cpu = system_clock; - } - - switch (p_clock_tree.usb.clock) { - case usb_clock_source::system_clock: - usb = system_clock; - break; - case usb_clock_source::pll0: - usb = pll0; - break; - case usb_clock_source::pll1: - usb = pll1; - break; - } - - switch (p_clock_tree.spifi.clock) { - case spifi_clock_source::system_clock: - spifi = system_clock; - break; - case spifi_clock_source::pll0: - spifi = pll0; - break; - case spifi_clock_source::pll1: - spifi = pll1; - break; - } - - cpu_clock_rate = cpu / static_cast(p_clock_tree.cpu.divider); - peripheral_clock_rate = - cpu / static_cast(p_clock_tree.peripheral_divider); - emc_clock_rate = - cpu / static_cast(p_clock_tree.emc_half_cpu_divider + 1); - usb_clock_rate = usb / static_cast(p_clock_tree.usb.divider); - spifi_clock_source_rate = - spifi / static_cast(p_clock_tree.spifi.divider); - - // ========================================================================= - // Step 6. Configure flash cycles per load - // ========================================================================= - system_controller_reg->power_boost = 0b00; - - if (cpu_clock_rate < 20.0_MHz) { - system_controller_reg->flashcfg = - static_cast(flash_configuration::clock1); - } else if (20.0_MHz <= cpu_clock_rate && cpu_clock_rate < 40.0_MHz) { - system_controller_reg->flashcfg = - static_cast(flash_configuration::clock2); - } else if (40.0_MHz <= cpu_clock_rate && cpu_clock_rate < 60.0_MHz) { - system_controller_reg->flashcfg = - static_cast(flash_configuration::clock3); - } else if (60.0_MHz <= cpu_clock_rate && cpu_clock_rate < 80.0_MHz) { - system_controller_reg->flashcfg = - static_cast(flash_configuration::clock4); - } else if (80.0_MHz <= cpu_clock_rate && cpu_clock_rate < 100.0_MHz) { - system_controller_reg->flashcfg = - static_cast(flash_configuration::clock5); - } else if (cpu_clock_rate >= 100.0_MHz) { - system_controller_reg->flashcfg = - static_cast(flash_configuration::clock5); - system_controller_reg->power_boost = 0b11; - } - - // ========================================================================= - // Step 7. Finally select the sources for each clock - // ========================================================================= - // Set CPU clock the source defined in the configuration - hal::bit_modify(system_controller_reg->cpu_clock_select) - .insert( - static_cast(p_clock_tree.cpu.use_pll0)); - - // Set USB clock the source defined in the configuration - hal::bit_modify(system_controller_reg->usb_clock_select) - .insert(static_cast(p_clock_tree.usb.clock)); - - // Set spifi clock the source defined in the configuration - hal::bit_modify(system_controller_reg->spifi_clock_select) - .insert( - static_cast(p_clock_tree.spifi.clock)); -} -} // namespace hal::lpc40 diff --git a/src/lpc40/dac.cpp b/src/lpc40/dac.cpp deleted file mode 100644 index 849ee98..0000000 --- a/src/lpc40/dac.cpp +++ /dev/null @@ -1,39 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include - -#include "dac_reg.hpp" - -namespace hal::lpc40 { - -dac::dac() -{ - pin dac_pin(0, 26); - dac_pin.analog(true); - dac_pin.dac(true); -} - -void dac::driver_write(float p_percentage) -{ - auto const bits_to_modify = static_cast( - p_percentage * - 1023); // getting the 10 most significant bits to set the value - hal::bit_modify(dac_reg->conversion_register.whole) - .insert(bits_to_modify); -} -} // namespace hal::lpc40 diff --git a/src/lpc40/dac_reg.hpp b/src/lpc40/dac_reg.hpp deleted file mode 100644 index 5c1d5e8..0000000 --- a/src/lpc40/dac_reg.hpp +++ /dev/null @@ -1,29 +0,0 @@ -#pragma once - -#include - -#include -#include - -namespace hal::lpc40 { -struct dac_registers -{ - union - { - u32 volatile whole; - std::array parts; - } conversion_register; - u32 volatile control; - u32 volatile count_value; -}; -namespace dac_converter_register { -// Holds the value that we want in the register -static constexpr auto value = hal::bit_mask::from<6, 15>(); - -static constexpr auto bias = hal::bit_mask::from<16>(); -} // namespace dac_converter_register -constexpr std::uintptr_t dac_address = 0x4008'C000; -// NOLINTNEXTLINE(performance-no-int-to-ptr) -inline auto* dac_reg = reinterpret_cast(dac_address); - -} // namespace hal::lpc40 diff --git a/src/lpc40/dma.cpp b/src/lpc40/dma.cpp deleted file mode 100644 index c1597bc..0000000 --- a/src/lpc40/dma.cpp +++ /dev/null @@ -1,208 +0,0 @@ -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -namespace hal::lpc40 { -namespace { -struct dma_channel -{ - std::uint32_t volatile source_address; - std::uint32_t volatile destination_address; - std::uint32_t volatile linked_list_item; - std::uint32_t volatile control; - std::uint32_t volatile config; -}; - -struct gpdma -{ - std::uint32_t volatile interrupt_status; - std::uint32_t volatile interrupt_terminal_count_status; - std::uint32_t volatile interrupt_terminal_count_clear; - std::uint32_t volatile interrupt_error_status; - std::uint32_t volatile interrupt_error_clear; - std::uint32_t volatile raw_interrupt_terminal_count_status; - std::uint32_t volatile raw_interrupt_error_status; - std::uint32_t volatile enabled_channels; - std::uint32_t volatile SOFTBREQ; - std::uint32_t volatile SOFTSREQ; - std::uint32_t volatile SOFTLBREQ; - std::uint32_t volatile SOFTLSREQ; - std::uint32_t volatile config; - std::uint32_t volatile sync; -}; - -namespace dma_control { -constexpr auto transfer_size = hal::bit_mask::from<0, 11>(); -constexpr auto source_burst_size = hal::bit_mask::from<12, 14>(); -constexpr auto destination_burst_size = hal::bit_mask::from<15, 17>(); -constexpr auto source_transfer_width = hal::bit_mask::from<18, 20>(); -constexpr auto destination_transfer_width = hal::bit_mask::from<21, 23>(); -constexpr auto source_increment = hal::bit_mask::from<26>(); -constexpr auto destination_increment = hal::bit_mask::from<27>(); -constexpr auto enable_terminal_count_interrupt = hal::bit_mask::from<31>(); -} // namespace dma_control - -namespace dma_config { -// config masks -constexpr auto enable = hal::bit_mask::from<0>(); -constexpr auto source_peripheral = hal::bit_mask::from<5, 1>(); -constexpr auto destination_peripheral = hal::bit_mask::from<10, 6>(); -constexpr auto transfer_type = hal::bit_mask::from<13, 11>(); -constexpr auto terminal_count_interrupt_mask = hal::bit_mask::from<15>(); -} // namespace dma_config - -// NOLINTNEXTLINE(performance-no-int-to-ptr) -auto* dma_reg = reinterpret_cast(dma_reg_address); - -constexpr inline std::uintptr_t dma_channel_offset(unsigned p_channel) -{ - return 0x100 + (p_channel * 0x20); -} - -std::array dma_channel_reg{ - // NOLINTNEXTLINE(performance-no-int-to-ptr) - reinterpret_cast(dma_reg_address + dma_channel_offset(0)), - // NOLINTNEXTLINE(performance-no-int-to-ptr) - reinterpret_cast(dma_reg_address + dma_channel_offset(1)), - // NOLINTNEXTLINE(performance-no-int-to-ptr) - reinterpret_cast(dma_reg_address + dma_channel_offset(2)), - // NOLINTNEXTLINE(performance-no-int-to-ptr) - reinterpret_cast(dma_reg_address + dma_channel_offset(3)), - // NOLINTNEXTLINE(performance-no-int-to-ptr) - reinterpret_cast(dma_reg_address + dma_channel_offset(4)), - // NOLINTNEXTLINE(performance-no-int-to-ptr) - reinterpret_cast(dma_reg_address + dma_channel_offset(5)), - // NOLINTNEXTLINE(performance-no-int-to-ptr) - reinterpret_cast(dma_reg_address + dma_channel_offset(6)), - // NOLINTNEXTLINE(performance-no-int-to-ptr) - reinterpret_cast(dma_reg_address + dma_channel_offset(7)), -}; - -std::array, dma_channel_count> dma_callbacks{ - hal::cortex_m::default_interrupt_handler, - hal::cortex_m::default_interrupt_handler, - hal::cortex_m::default_interrupt_handler, - hal::cortex_m::default_interrupt_handler, - hal::cortex_m::default_interrupt_handler, - hal::cortex_m::default_interrupt_handler, - hal::cortex_m::default_interrupt_handler, - hal::cortex_m::default_interrupt_handler, -}; - -void handle_dma_interrupt() noexcept -{ - // The zero count from the LSB tells you where the least significant 1 is - // located. This allows the handled DMA interrupt callback to start at 0 and - // end at the last bit. - auto const status = std::countr_zero(dma_reg->interrupt_status); - auto const clear_mask = 1 << status; - - dma_reg->interrupt_terminal_count_clear = clear_mask; - dma_reg->interrupt_error_clear = clear_mask; - - // Call this channel's callback - dma_callbacks[status](); -} - -void initialize_dma() -{ - if (is_on(peripheral::gpdma)) { - return; - } - - power_on(peripheral::gpdma); - initialize_interrupts(); - hal::cortex_m::enable_interrupt(irq::dma, handle_dma_interrupt); - // Enable DMA & use default AHB endianness - dma_reg->config = 1; -} - -hal::atomic_spin_lock dma_spin_lock; -hal::basic_lock* dma_lock = &dma_spin_lock; -} // namespace - -void set_dma_lock(hal::basic_lock& p_lock) -{ - dma_lock = &p_lock; -} - -void setup_dma_transfer( - dma const& p_configuration, - hal::callback p_interrupt_callback) // NOLINT -{ - auto const config_value = - hal::bit_value() - .insert( - hal::value(p_configuration.source_peripheral)) - .insert( - hal::value(p_configuration.destination_peripheral)) - .set() - .insert( - hal::value(p_configuration.transfer_type)) - .set() - .to(); - - auto const control_value = - hal::bit_value() - .insert(p_configuration.length) - .insert( - hal::value(p_configuration.source_burst_size)) - .insert( - hal::value(p_configuration.destination_transfer_width)) - .insert( - hal::value(p_configuration.source_transfer_width)) - .insert( - hal::value(p_configuration.destination_transfer_width)) - .insert(p_configuration.source_increment) - .insert( - p_configuration.destination_increment) - .set() - .to(); - - std::lock_guard take_dma_lock(*dma_lock); - - initialize_dma(); - - // Busy wait until a channel is available - while (true) { - // Count the number of 1s until you reach a zero. That zero will be the - // available channel. If that zero is 8, then all 8 channels are currently - // in use and cannot service this request. - auto const available_channel = std::countr_one(dma_reg->enabled_channels); - - if (available_channel < 8) { - // Copy callback to the callbacks - dma_callbacks[available_channel] = p_interrupt_callback; - - // Clear previous interrupts on this channel, if there were any - dma_reg->interrupt_terminal_count_clear = 1 << available_channel; - dma_reg->interrupt_error_clear = 1 << available_channel; - - auto* dma_channel = dma_channel_reg[available_channel]; - - dma_channel->source_address = - reinterpret_cast(p_configuration.source); - dma_channel->destination_address = - reinterpret_cast(p_configuration.destination); - dma_channel->control = control_value; - // This will start the dma transfer - dma_channel->config = config_value; - break; - } - } -} -} // namespace hal::lpc40 diff --git a/src/lpc40/dma_spi.cpp b/src/lpc40/dma_spi.cpp deleted file mode 100644 index a6f3864..0000000 --- a/src/lpc40/dma_spi.cpp +++ /dev/null @@ -1,311 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "spi_reg.hpp" - -namespace hal::lpc40 { -namespace { -inline spi_reg_t* get_spi_reg(peripheral p_id) -{ - switch (p_id) { - case peripheral::ssp0: - return spi_reg0; - case peripheral::ssp1: - return spi_reg1; - case peripheral::ssp2: - default: - return spi_reg2; - } -} - -inline bool still_sending(spi_reg_t* p_reg) -{ - return bit_extract(p_reg->sr); -} - -struct dma_peripheral_pair -{ - dma_peripheral rx; - dma_peripheral tx; -}; - -inline dma_peripheral_pair to_dma_peripheral_pair(dma_spi::bus_info& p_bus_info) -{ - switch (p_bus_info.peripheral_id) { - case peripheral::ssp0: - return { - .rx = dma_peripheral::spi0_rx_and_timer1_match1, - .tx = dma_peripheral::spi0_tx_and_timer1_match0, - }; - case peripheral::ssp1: - return { - .rx = dma_peripheral::spi1_rx_and_timer2_match1, - .tx = dma_peripheral::spi1_tx_and_timer2_match0, - }; - case peripheral::ssp2: - return { - .rx = dma_peripheral::spi2_rx_and_i2s_channel_1, - .tx = dma_peripheral::spi2_tx_and_i2s_channel_0, - }; - default: - hal::safe_throw(hal::operation_not_supported(&p_bus_info)); - break; - } -} -} // namespace - -dma_spi::dma_spi(std::uint8_t p_bus_number, - hal::io_waiter& p_waiter, - dma_spi::settings const& p_settings) - : m_io_waiter(&p_waiter) - , m_bus{} -{ - // UM10562: Chapter 7: LPC408x/407x I/O configuration page 13 - if (p_bus_number == 0) { - m_bus = { - .peripheral_id = peripheral::ssp0, - .clock = pin(0, 15), - .data_out = pin(0, 18), - .data_in = pin(0, 17), - .clock_function = 0b010, - .data_out_function = 0b010, - .data_in_function = 0b010, - }; - } else if (p_bus_number == 1) { - m_bus = { - .peripheral_id = peripheral::ssp1, - .clock = pin(0, 7), - .data_out = pin(0, 9), - .data_in = pin(0, 8), - .clock_function = 0b010, - .data_out_function = 0b010, - .data_in_function = 0b010, - }; - } else if (p_bus_number == 2) { - m_bus = { - .peripheral_id = peripheral::ssp2, - .clock = pin(1, 0), - .data_out = pin(1, 1), - .data_in = pin(1, 4), - .clock_function = 0b100, - .data_out_function = 0b100, - .data_in_function = 0b100, - }; - } else { - // "Supported spi busses are 0, 1, and 2!"; - hal::safe_throw(hal::operation_not_supported(this)); - } - - dma_spi::driver_configure(p_settings); -} // namespace hal::lpc40 - -dma_spi::~dma_spi() -{ - power_off(m_bus.peripheral_id); -} - -dma_spi::dma_spi(bus_info p_bus) - : m_bus(p_bus) -{ - if (p_bus.peripheral_id != peripheral::ssp0 && - p_bus.peripheral_id != peripheral::ssp1 && - p_bus.peripheral_id != peripheral::ssp2) { - hal::safe_throw(hal::operation_not_supported(this)); - } -} - -void dma_spi::driver_configure(settings const& p_settings) -{ - constexpr uint8_t spi_format_code = 0b00; - - auto* reg = get_spi_reg(m_bus.peripheral_id); - - // Power up peripheral - power_on(m_bus.peripheral_id); - - // Set SSP frame format to SPI - bit_modify(reg->cr0).insert(spi_format_code); - - // Set SPI to master mode by clearing - bit_modify(reg->cr1).clear(); - - // Setup operating frequency - auto const input_clock = get_frequency(m_bus.peripheral_id); - auto const clock_divider = input_clock / p_settings.clock_rate; - auto const prescaler = static_cast(clock_divider); - auto const prescaler_low = static_cast(prescaler & 0xFF); - auto const prescaler_high = static_cast(prescaler >> 8); - // Store lower half of prescalar in clock prescalar register - reg->cpsr = prescaler_low; - // Store upper 8 bit half of the prescalar in control register 0 - bit_modify(reg->cr0).insert(prescaler_high); - - // Set clock modes & bit size - // - // NOTE: In UM10562 page 611, you will see that DSS (Data Size Select) is - // equal to the bit transfer minus 1. So we can add 3 to our DataSize enum - // to get the appropriate transfer code. - constexpr std::uint8_t size_code_8bit = 0b111; - - bit_modify(reg->cr0) - .insert(p_settings.clock_idles_high) - .insert( - p_settings.data_valid_on_trailing_edge) - .insert(size_code_8bit); - - // Initialize SSP pins - m_bus.clock.function(m_bus.clock_function) - .analog(false) - .open_drain(false) - .resistor(pin_resistor::none); - m_bus.data_in.function(m_bus.data_in_function) - .analog(false) - .open_drain(false) - .resistor(pin_resistor::none); - m_bus.data_out.function(m_bus.data_out_function) - .analog(false) - .open_drain(false) - .resistor(pin_resistor::none); - - // Enable DMA - bit_modify(reg->dmacr) - .set() - .set(); - - // Enable SSP - bit_modify(reg->cr1).set(); -} - -void dma_spi::driver_transfer(std::span p_data_out, - std::span p_data_in, - hal::byte p_filler) -{ - auto& reg = *get_spi_reg(m_bus.peripheral_id); - - auto const dma_peripheral_pair = to_dma_peripheral_pair(m_bus); - auto const min = std::min(p_data_in.size(), p_data_out.size()); - - dma receive_configuration = { - .source = ®.dr, - .destination = p_data_in.data(), - .length = min, - .source_increment = false, - .destination_increment = true, - .transfer_type = dma_transfer_type::peripheral_to_memory, - .source_transfer_width = dma_transfer_width::bit_8, - .destination_transfer_width = dma_transfer_width::bit_8, - .source_peripheral = dma_peripheral_pair.rx, - .destination_peripheral = dma_peripheral::memory_or_timer0_match0, - .source_burst_size = dma_burst_size::bytes_1, - .destination_burst_size = dma_burst_size::bytes_1, - }; - - dma transmit_configuration = { - .source = p_data_out.data(), - .destination = ®.dr, - .length = min, - .source_increment = true, - .destination_increment = false, - .transfer_type = dma_transfer_type ::memory_to_peripheral, - .source_transfer_width = dma_transfer_width::bit_8, - .destination_transfer_width = dma_transfer_width::bit_8, - .source_peripheral = dma_peripheral::memory_or_timer0_match0, - .destination_peripheral = dma_peripheral_pair.tx, - .source_burst_size = dma_burst_size::bytes_1, - .destination_burst_size = dma_burst_size::bytes_1, - }; - - bool rx_done = false; - bool tx_done = false; - - auto receive_completion_handler = [this, &rx_done]() { - rx_done = true; - m_io_waiter->resume(); - }; - - auto transmit_completion_handler = [this, &tx_done]() { - tx_done = true; - m_io_waiter->resume(); - }; - - if (receive_configuration.length == 0) { - rx_done = true; - } else { - hal::lpc40::setup_dma_transfer(receive_configuration, - receive_completion_handler); - } - - if (transmit_configuration.length == 0) { - tx_done = true; - } else { - hal::lpc40::setup_dma_transfer(transmit_configuration, - transmit_completion_handler); - } - - while (not(rx_done && tx_done)) { - m_io_waiter->wait(); - } - - rx_done = false; - tx_done = false; - - if (p_data_in.size() == p_data_out.size()) { - return; - } else if (p_data_in.size() > p_data_out.size()) { - // In this case, we have more bytes we want to read back than bytes we want - // to transmit. - p_data_in = p_data_in.subspan(min); - receive_configuration.destination = p_data_in.data(); - receive_configuration.length = p_data_in.size(); - hal::lpc40::setup_dma_transfer(receive_configuration, - receive_completion_handler); - - transmit_configuration.source = &p_filler; - transmit_configuration.length = p_data_in.size(); - transmit_configuration.source_increment = false; - hal::lpc40::setup_dma_transfer(transmit_configuration, - transmit_completion_handler); - } else { - // In this case, we have more bytes we want to transmit than we want to - // read. So skip the receive dma transfer... - rx_done = true; - p_data_out = p_data_out.subspan(min); - transmit_configuration.source = p_data_out.data(); - transmit_configuration.length = p_data_out.size(); - hal::lpc40::setup_dma_transfer(transmit_configuration, - transmit_completion_handler); - } - - while (not(rx_done && tx_done)) { - m_io_waiter->wait(); - } - - // Stay in the loop until the bus is no longer active - while (still_sending(®)) { - m_io_waiter->wait(); - } -} -} // namespace hal::lpc40 diff --git a/src/lpc40/gpio_reg.hpp b/src/lpc40/gpio_reg.hpp deleted file mode 100644 index 7fa1daf..0000000 --- a/src/lpc40/gpio_reg.hpp +++ /dev/null @@ -1,57 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include - -namespace hal::lpc40 { -/// gpio peripheral register map -struct lpc_gpio_t -{ - /// Offset: 0x000 Determine pin direction (0 == Input, 1 = Output) (R/W) - std::uint32_t volatile direction; - /// Offset: 0x004 - 0x00C - std::array reserved0; - /// Offset: 0x010 (R/W) - std::uint32_t volatile mask; - /// Offset: 0x014 Pin status and output control (R/W) - std::uint32_t volatile pin; - /// Offset: 0x018 Write 1 to this to set output pin as 1 (HIGH voltage) (R/W) - std::uint32_t volatile set; - /// Offset: 0x01C Write 1 to this to Set output pin to 0 (LOW voltage) (R/W) - std::uint32_t volatile clear; -}; - -inline constexpr intptr_t ahb_base = 0x20080000UL; - -// NOLINTBEGIN(performance-no-int-to-ptr) -inline std::array gpio_reg{ - reinterpret_cast(ahb_base + 0x18000), - reinterpret_cast(ahb_base + 0x18020), - reinterpret_cast(ahb_base + 0x18040), - reinterpret_cast(ahb_base + 0x18060), - reinterpret_cast(ahb_base + 0x18080), - reinterpret_cast(ahb_base + 0x180a0), -}; -// NOLINTEND(performance-no-int-to-ptr) - -inline constexpr bit_mask pin_mask(std::uint8_t p_pin) -{ - return bit_mask{ .position = p_pin, .width = 1 }; -} -} // namespace hal::lpc40 diff --git a/src/lpc40/i2c.cpp b/src/lpc40/i2c.cpp deleted file mode 100644 index 41e7db7..0000000 --- a/src/lpc40/i2c.cpp +++ /dev/null @@ -1,363 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "i2c_reg.hpp" - -namespace hal::lpc40 { -i2c_reg_t* get_i2c_reg(peripheral p_id) -{ - switch (p_id) { - case peripheral::i2c0: - return i2c_reg0; - case peripheral::i2c1: - return i2c_reg1; - case peripheral::i2c2: - default: - return i2c_reg2; - } -} - -void disable(i2c::bus_info& p_info) -{ - auto* reg = get_i2c_reg(p_info.peripheral_id); - - // Disable i2c interface - reg->control_clear = i2c_control::interface_enable; - - // Enable interrupt service routine. - cortex_m::disable_interrupt(p_info.irq_number); -} - -void i2c::interrupt() -{ - auto* reg = get_i2c_reg(m_bus.peripheral_id); - - auto state = i2c_host_state(reg->stat); - auto& data = reg->dat; - uint32_t clear_mask = 0; - uint32_t set_mask = 0; - bool transaction_finished = false; - - switch (state) { - case i2c_host_state::bus_error: { - m_status = error_state::io_error; - set_mask = i2c_control::assert_acknowledge | i2c_control::stop; - break; - } - case i2c_host_state::start_condition: - case i2c_host_state::repeated_start: { - if (m_write_iterator != m_write_end) { - data = to_8_bit_address(m_address, i2c_operation::write); - } else { - data = to_8_bit_address(m_address, i2c_operation::read); - } - break; - } - case i2c_host_state::peripheral_address_write_sent_received_ack: { - clear_mask = i2c_control::start; - if (m_write_iterator == m_write_end) { - transaction_finished = true; - set_mask = i2c_control::stop; - } else { - data = *m_write_iterator++; - } - break; - } - case i2c_host_state::peripheral_address_write_sent_received_nack: { - clear_mask = i2c_control::start; - transaction_finished = true; - m_status = error_state::no_such_device; - set_mask = i2c_control::stop; - break; - } - case i2c_host_state::transmitted_data_received_ack: { - if (m_write_iterator == m_write_end) { - if (m_read_iterator != m_read_end) { - set_mask = i2c_control::start; - } else { - transaction_finished = true; - set_mask = i2c_control::stop; - } - } else { - data = *(m_write_iterator++); - } - break; - } - case i2c_host_state::transmitted_data_received_nack: { - transaction_finished = true; - set_mask = i2c_control::stop; - break; - } - case i2c_host_state::arbitration_lost: { - set_mask = i2c_control::start; - break; - } - case i2c_host_state::peripheral_address_read_sent_received_ack: { - clear_mask = i2c_control::start; - if (m_read_iterator == m_read_end) { - set_mask = i2c_control::stop; - } - // If we only want 1 byte, make sure to nack that byte - else if (m_read_iterator + 1 == m_read_end) { - clear_mask |= i2c_control::assert_acknowledge; - } - // If we want more then 1 byte, make sure to ack the first byte - else { - set_mask = i2c_control::assert_acknowledge; - } - break; - } - case i2c_host_state::peripheral_address_read_sent_received_nack: { - clear_mask = i2c_control::start; - m_status = error_state::no_such_device; - transaction_finished = true; - set_mask = i2c_control::stop; - break; - } - case i2c_host_state::received_data_transmitted_ack: { - if (m_read_iterator != m_read_end) { - *m_read_iterator++ = static_cast(data); - } - // Check if the buffer has been exhausted - if (m_read_iterator + 1 == m_read_end) { - // Next state will be `received_data_transmitted_nack` - clear_mask = i2c_control::assert_acknowledge; - } else { - set_mask = i2c_control::assert_acknowledge; - } - break; - } - case i2c_host_state::received_data_transmitted_nack: { - transaction_finished = true; - if (m_read_iterator != m_read_end) { - *m_read_iterator++ = static_cast(data); - } - set_mask = i2c_control::stop; - break; - } - case i2c_host_state::do_nothing: { - break; - } - default: { - clear_mask = i2c_control::stop; - break; - } - } - - clear_mask |= i2c_control::interrupt; - - reg->control_set = set_mask; - reg->control_clear = clear_mask; - - if (transaction_finished) { - m_busy = false; - } -} - -i2c::i2c(std::uint8_t p_bus_number, - i2c::settings const& p_settings, - hal::io_waiter& p_waiter) - : m_waiter(&p_waiter) -{ - // UM10562: Chapter 7: LPC408x/407x I/O configuration page 13 - switch (p_bus_number) { - case 0: - /// Definition for i2c bus 0 for LPC40xx. - m_bus = { - .peripheral_id = peripheral::i2c0, - .irq_number = irq::i2c0, - .sda = pin(1, 30), - .sda_function = 0b100, - .scl = pin(1, 31), - .scl_function = 0b100, - }; - break; - case 1: - /// Definition for i2c bus 1 for LPC40xx. - m_bus = { - .peripheral_id = peripheral::i2c1, - .irq_number = irq::i2c1, - .sda = pin(0, 0), - .sda_function = 0b011, - .scl = pin(0, 1), - .scl_function = 0b011, - }; - break; - case 2: - /// Definition for i2c bus 2 for LPC40xx. - m_bus = { - .peripheral_id = peripheral::i2c2, - .irq_number = irq::i2c2, - .sda = pin(0, 10), - .sda_function = 0b010, - .scl = pin(0, 11), - .scl_function = 0b010, - }; - break; - default: { - safe_throw(hal::operation_not_supported(this)); - break; - } - } - - lpc40::initialize_interrupts(); - i2c::driver_configure(p_settings); -} - -i2c::~i2c() -{ - disable(m_bus); -} - -i2c::i2c(bus_info const& p_bus, - i2c::settings const& p_settings, - hal::io_waiter& p_waiter) - : m_bus(p_bus) - , m_waiter(&p_waiter) -{ - initialize_interrupts(); - i2c::driver_configure(p_settings); -} - -void i2c::driver_configure(settings const& p_settings) -{ - auto* reg = get_i2c_reg(m_bus.peripheral_id); - - // Setup i2c operating frequency - auto const input_clock = get_frequency(m_bus.peripheral_id); - auto const clock_divider = input_clock / p_settings.clock_rate; - auto const high_side_clocks = clock_divider * m_bus.duty_cycle; - auto const low_side_clocks = clock_divider - high_side_clocks; - - if (low_side_clocks < 1.0f || high_side_clocks < 1.0f) { - safe_throw(hal::operation_not_supported(this)); - } - - // Power on peripheral - power_on(m_bus.peripheral_id); - - // Setup pins for SDA and SCL - pin(m_bus.sda) - .function(m_bus.sda_function) - .resistor(pin_resistor::none) - .open_drain(true); - - pin(m_bus.scl) - .function(m_bus.scl_function) - .resistor(pin_resistor::none) - .open_drain(true); - - using high_t = std::remove_volatile_tduty_cycle_high)>; - using low_t = std::remove_volatile_tduty_cycle_low)>; - - reg->duty_cycle_high = static_cast(high_side_clocks); - reg->duty_cycle_low = static_cast(low_side_clocks); - - // Clear all transmission flags - reg->control_clear = i2c_control::assert_acknowledge | i2c_control::start | - i2c_control::stop | i2c_control::interrupt; - // Enable i2c interface - reg->control_set = i2c_control::interface_enable; - - setup_interrupt(); -} - -void i2c::setup_interrupt() -{ - // Create a lambda to call the interrupt() method - auto isr = [this]() { interrupt(); }; - - // A pointer to save the static_callable isr address to. - cortex_m::interrupt_pointer handler; - - switch (m_bus.irq_number) { - case irq::i2c0: - handler = static_callable(isr).get_handler(); - break; - case irq::i2c1: - handler = static_callable(isr).get_handler(); - break; - case irq::i2c2: - default: - handler = static_callable(isr).get_handler(); - break; - } - - // Enable interrupt service routine. - cortex_m::enable_interrupt(m_bus.irq_number, handler); -} - -void i2c::driver_transaction(hal::byte p_address, - std::span p_data_out, - std::span p_data_in, - hal::function_ref p_timeout) -{ - auto* reg = get_i2c_reg(m_bus.peripheral_id); - - m_status = error_state::no_error; - m_address = p_address; - m_write_iterator = p_data_out.begin(); - m_write_end = p_data_out.end(); - m_read_iterator = p_data_in.begin(); - m_read_end = p_data_in.end(); - m_busy = true; - - // Start the transaction - reg->control_set = i2c_control::start; - - // i2c::interrupt() will set this to false when the transaction has finished. - while (m_busy) { - try { - p_timeout(); - m_waiter->wait(); - } catch (...) { - // The expected exception is hal::timed_out, but it could be something - // else. Let rethrow the exception so the caller handle it. - // A better option here would be to use a std::scope_failure handler. - reg->control_set = i2c_control::stop; - throw; - } - } - - switch (m_status) { - case error_state::no_error: { - break; - } - case error_state::no_such_device: { - safe_throw(hal::no_such_device(m_address, this)); - break; - } - case error_state::io_error: { - safe_throw(hal::io_error(this)); - break; - } - case error_state::arbitration_lost: { - safe_throw(hal::resource_unavailable_try_again(this)); - break; - } - }; -} -} // namespace hal::lpc40 diff --git a/src/lpc40/i2c_reg.hpp b/src/lpc40/i2c_reg.hpp deleted file mode 100644 index 445c565..0000000 --- a/src/lpc40/i2c_reg.hpp +++ /dev/null @@ -1,92 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -namespace hal::lpc40 { -struct i2c_reg_t -{ - /// Offset: 0x000 i2c control set register (r/w) - u32 volatile control_set; - /// offset: 0x004 i2c status register (r/ ) - u32 const volatile stat; - /// offset: 0x008 i2c data register (r/w) - u32 volatile dat; - /// offset: 0x00c i2c peripheral address register 0 (r/w) - u32 volatile address0; - /// offset: 0x010 sch duty cycle register high half word (r/w) - u32 volatile duty_cycle_high; - /// offset: 0x014 scl duty cycle register low half word (r/w) - u32 volatile duty_cycle_low; - /// offset: 0x018 i2c control clear register ( /w) - u32 volatile control_clear; - /// offset: 0x01c monitor mode control register (r/w) - u32 volatile monitor_mode_control; - /// offset: 0x020 i2c peripheral address register 1 (r/w) - u32 volatile address1; - /// offset: 0x024 i2c peripheral address register 2 (r/w) - u32 volatile address2; - /// offset: 0x028 i2c peripheral address register 3 (r/w) - u32 volatile address3; - /// offset: 0x02c data buffer register ( /w) - u32 const volatile data_buffer; - /// offset: 0x030 i2c peripheral address mask register 0 (r/w) - u32 volatile mask0; - /// offset: 0x034 i2c peripheral address mask register 1 (r/w) - u32 volatile mask1; - /// offset: 0x038 i2c peripheral address mask register 2 (r/w) - u32 volatile mask2; - /// offset: 0x03c i2c peripheral address mask register 3 (r/w) - u32 volatile mask3; -}; - -/// lpc40xx i2c peripheral control register flags -namespace i2c_control { -// AA -static constexpr auto assert_acknowledge = 1 << 2; -// SI -static constexpr auto interrupt = 1 << 3; -// STO -static constexpr auto stop = 1 << 4; -// STA -static constexpr auto start = 1 << 5; -// I2EN -static constexpr auto interface_enable = 1 << 6; -}; // namespace i2c_control - -/// lpc40xx i2c peripheral state numbers -enum class i2c_host_state : u8 -{ - bus_error = 0x00, - start_condition = 0x08, - repeated_start = 0x10, - peripheral_address_write_sent_received_ack = 0x18, - peripheral_address_write_sent_received_nack = 0x20, - transmitted_data_received_ack = 0x28, - transmitted_data_received_nack = 0x30, - arbitration_lost = 0x38, - peripheral_address_read_sent_received_ack = 0x40, - peripheral_address_read_sent_received_nack = 0x48, - received_data_transmitted_ack = 0x50, - received_data_transmitted_nack = 0x58, - own_address_received = 0xA0, - do_nothing = 0xF8 -}; - -inline i2c_reg_t* i2c_reg0 = reinterpret_cast(0x4001'C000); -inline i2c_reg_t* i2c_reg1 = reinterpret_cast(0x4005'C000); -inline i2c_reg_t* i2c_reg2 = reinterpret_cast(0x400A'0000); -} // namespace hal::lpc40 diff --git a/src/lpc40/input_pin.cpp b/src/lpc40/input_pin.cpp deleted file mode 100644 index 6e78dee..0000000 --- a/src/lpc40/input_pin.cpp +++ /dev/null @@ -1,61 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -#include -#include -#include -#include -#include - -#include "gpio_reg.hpp" - -namespace hal::lpc40 { -input_pin::input_pin(std::uint8_t p_port, // NOLINT - std::uint8_t p_pin, - settings const& p_settings) // NOLINT - : m_port(p_port) - , m_pin(p_pin) -{ - configure(p_settings); -} - -void input_pin::driver_configure(settings const& p_settings) -{ - power_on(peripheral::gpio); - - bit_modify(gpio_reg[m_port]->direction).clear(pin_mask(m_pin)); - - // Pin mask is used to control which pins are updated or not through the - // pin, set, and clear registers. The mask bit corresponding to the pin must - // be set to 0 for the pin to be enabled. - bit_modify(gpio_reg[m_port]->mask).clear(pin_mask(m_pin)); - - pin(m_port, m_pin) - .function(0) - .dac(false) - .analog(false) - .open_drain(false) - .resistor(p_settings.resistor); -} - -bool input_pin::driver_level() -{ - auto pin_value = bit_extract(pin_mask(m_pin), gpio_reg[m_port]->pin); - return static_cast(pin_value); -} -} // namespace hal::lpc40 diff --git a/src/lpc40/interrupt.cpp b/src/lpc40/interrupt.cpp deleted file mode 100644 index dd15631..0000000 --- a/src/lpc40/interrupt.cpp +++ /dev/null @@ -1,9 +0,0 @@ -#include -#include - -namespace hal::lpc40 { -void initialize_interrupts() -{ - hal::cortex_m::initialize_interrupts(); -} -} // namespace hal::lpc40 diff --git a/src/lpc40/interrupt_pin.cpp b/src/lpc40/interrupt_pin.cpp deleted file mode 100644 index 20a8905..0000000 --- a/src/lpc40/interrupt_pin.cpp +++ /dev/null @@ -1,139 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include -#include -#include - -#include "gpio_reg.hpp" -#include "interrupt_pin_reg.hpp" - -namespace hal::lpc40 { - -void interrupt_pin_handler() -{ - std::uint32_t triggered_port = interrupt_pin_reg->status >> 2; - std::uint32_t triggered_pin = 0; - bit_mask triggered_pin_mask; - std::uint32_t status = 0; - - if (triggered_port == 0) { - // To keep the number of handler functions to a minimum, this library does - // not support separate handlers for rising and falling edges. Therefore - // it does not matter if a rising or falling edge triggered this - // interrupt. OR both status together and clear them together below. - status = interrupt_pin_reg->raising_status_port0 | - interrupt_pin_reg->falling_status_port0; - } else { - // Same documentation as the port 0 case but with port 2 here. - status = interrupt_pin_reg->raising_status_port2 | - interrupt_pin_reg->falling_status_port2; - } - - // Figure out which bit triggered this interrupt by checking the number of - // zeros starting from the least significant bit. If there is 5 zeros, - // then the next bit must be a 1 and thus, the pin that set off this - // interrupt is pin 5. If there are 0 zeros, then the first bit must be - // set to a 1 and thus pin 0 is what set off this interrupt. And so on for - // all other bits. - triggered_pin = static_cast(std::countr_zero(status)); - triggered_pin_mask = bit_mask::from(triggered_pin); - - if (triggered_port == 0) { - // Clear interrupt flag on port 0. This is important as not doing this - // will result in this interrupt being repeatedly called. - bit_modify(interrupt_pin_reg->clear_interrupt_port0) - .set(triggered_pin_mask); - } else { - bit_modify(interrupt_pin_reg->clear_interrupt_port2) - .set(triggered_pin_mask); - } - - bool pin_level = - bit_extract(triggered_pin_mask, gpio_reg[triggered_port]->pin); - - interrupt_pin_handlers[triggered_port][triggered_pin](pin_level); -} - -interrupt_pin::interrupt_pin(std::uint8_t p_port, // NOLINT - std::uint8_t p_pin, - settings const& p_settings) - : m_port(p_port) - , m_pin(p_pin) -{ - initialize_interrupts(); - interrupt_pin::driver_configure(p_settings); -} - -interrupt_pin::~interrupt_pin() -{ - if (m_port == 0) { - bit_modify(interrupt_pin_reg->enable_raising_port0).clear(pin_mask(m_pin)); - bit_modify(interrupt_pin_reg->enable_falling_port0).clear(pin_mask(m_pin)); - } else if (m_port == 2) { - bit_modify(interrupt_pin_reg->enable_raising_port2).clear(pin_mask(m_pin)); - bit_modify(interrupt_pin_reg->enable_falling_port2).clear(pin_mask(m_pin)); - } -} - -void interrupt_pin::driver_configure(settings const& p_settings) -{ - // Set pin as input - bit_modify(gpio_reg[m_port]->direction).clear(pin_mask(m_pin)); - - // Configure pin to use gpio function, use setting resistor and set the rest - // to false. - pin(m_port, m_pin) - .function(0) - .dac(false) - .analog(false) - .open_drain(false) - .resistor(p_settings.resistor); - - // Enable interrupt for gpio and use interrupt handler as our handler. - cortex_m::enable_interrupt(irq::gpio, interrupt_pin_handler); - - if (p_settings.trigger == trigger_edge::both || - p_settings.trigger == trigger_edge::rising) { - if (m_port == 0) { - bit_modify(interrupt_pin_reg->enable_raising_port0).set(pin_mask(m_pin)); - } else if (m_port == 2) { - bit_modify(interrupt_pin_reg->enable_raising_port2).set(pin_mask(m_pin)); - } - } - - if (p_settings.trigger == trigger_edge::both || - p_settings.trigger == trigger_edge::falling) { - if (m_port == 0) { - bit_modify(interrupt_pin_reg->enable_falling_port0).set(pin_mask(m_pin)); - } else if (m_port == 2) { - bit_modify(interrupt_pin_reg->enable_falling_port2).set(pin_mask(m_pin)); - } - } -} - -void interrupt_pin::driver_on_trigger(hal::callback p_callback) -{ - if (m_port == 0) { - interrupt_pin_handlers[0][m_pin] = p_callback; - } else { - interrupt_pin_handlers[1][m_pin] = p_callback; - } -} -} // namespace hal::lpc40 diff --git a/src/lpc40/interrupt_pin_reg.hpp b/src/lpc40/interrupt_pin_reg.hpp deleted file mode 100644 index 51607a6..0000000 --- a/src/lpc40/interrupt_pin_reg.hpp +++ /dev/null @@ -1,61 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include - -namespace hal::lpc40 { -/// Matrix of gpio interrupt service routine handlers 32 x 2. Matrix does not -/// need to be initialized at startup to work because the only entries that -/// will be accessed are the entries that have been setup via -/// attach_interrupt. -inline std::array, 32>, 2> - interrupt_pin_handlers{}; - -/// interrupt register map -struct interrupt_pin_reg_t -{ - /// Offset: 0x080 GPIO overall Interrupt Status (RO) - uint32_t const volatile status; - /// Offset: 0x084 GPIO Interrupt Status for Rising edge for Port 0 (RO) - uint32_t const volatile raising_status_port0; - /// Offset: 0x088 GPIO Interrupt Status for Falling edge for Port 0 (RO) - uint32_t const volatile falling_status_port0; - /// Offset: 0x08C (WO) - uint32_t volatile clear_interrupt_port0; - /// Offset: 0x090 (R/W) - uint32_t volatile enable_raising_port0; - /// Offset: 0x094 (R/W) - uint32_t volatile enable_falling_port0; - /// Offset: 0x098 - 0x0A0 - std::array reserved0; - /// Offset: 0x0A4 (RO) - uint32_t const volatile raising_status_port2; - /// Offset: 0x0A8 (RO) - uint32_t const volatile falling_status_port2; - /// Offset: 0x0AC (WO) - uint32_t volatile clear_interrupt_port2; - /// Offset: 0x0B0 (R/W) - uint32_t volatile enable_raising_port2; - /// Offset: 0x0B4 (R/W) - uint32_t volatile enable_falling_port2; -}; - -inline interrupt_pin_reg_t* interrupt_pin_reg = - reinterpret_cast(0x4002'8080); -} // namespace hal::lpc40 diff --git a/src/lpc40/output_pin.cpp b/src/lpc40/output_pin.cpp deleted file mode 100644 index 0f9d348..0000000 --- a/src/lpc40/output_pin.cpp +++ /dev/null @@ -1,60 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -#include - -#include "gpio_reg.hpp" - -namespace hal::lpc40 { -output_pin::output_pin(std::uint8_t p_port, // NOLINT - std::uint8_t p_pin, - output_pin::settings const& p_settings) - : m_port(p_port) - , m_pin(p_pin) -{ - configure(p_settings); // NOLINT -} - -void output_pin::driver_configure(settings const& p_settings) -{ - bit_modify(gpio_reg[m_port]->direction).set(pin_mask(m_pin)); - - pin(m_port, m_pin) - .function(0) - .dac(false) - .analog(false) - .open_drain(p_settings.open_drain) - .resistor(p_settings.resistor); -} - -void output_pin::driver_level(bool p_high) -{ - if (p_high) { - bit_modify(gpio_reg[m_port]->pin).set(pin_mask(m_pin)); - } else { - bit_modify(gpio_reg[m_port]->pin).clear(pin_mask(m_pin)); - } -} - -bool output_pin::driver_level() -{ - auto pin_value = bit_extract(pin_mask(m_pin), gpio_reg[m_port]->pin); - - return static_cast(pin_value); -} -} // namespace hal::lpc40 diff --git a/src/lpc40/pin.cpp b/src/lpc40/pin.cpp deleted file mode 100644 index aa0e588..0000000 --- a/src/lpc40/pin.cpp +++ /dev/null @@ -1,115 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -#include -#include - -#include "pin_reg.hpp" - -namespace hal::lpc40 { -pin const& pin::function(uint8_t p_function_code) const -{ - hal::bit_modify(pin_map->matrix[m_port][m_pin]) - .insert(p_function_code); - return *this; -} - -pin const& pin::resistor(hal::pin_resistor p_resistor) const -{ - uint8_t resistor_code = 0; - switch (p_resistor) { - case hal::pin_resistor::none: - resistor_code = 0b00; - break; - case hal::pin_resistor::pull_down: - resistor_code = 0b01; - break; - case hal::pin_resistor::pull_up: - resistor_code = 0b10; - break; - } - // The pin resistor enumeration matches the values for the LPC40xx so simply - // cast the enum to an int and this will work. - hal::bit_modify(pin_map->matrix[m_port][m_pin]) - .insert(resistor_code); - return *this; -} - -pin const& pin::hysteresis(bool p_enable) const -{ - hal::bit_modify(pin_map->matrix[m_port][m_pin]) - .insert(p_enable); - return *this; -} - -pin const& pin::input_invert(bool p_enable) const -{ - hal::bit_modify(pin_map->matrix[m_port][m_pin]) - .insert(p_enable); - return *this; -} - -pin const& pin::analog(bool p_enable) const -{ - bool is_digital = !p_enable; - hal::bit_modify(pin_map->matrix[m_port][m_pin]) - .insert(is_digital); - return *this; -} - -pin const& pin::digital_filter(bool p_enable) const -{ - hal::bit_modify(pin_map->matrix[m_port][m_pin]) - .insert(p_enable); - return *this; -} - -pin const& pin::highspeed_i2c(bool p_enable) const -{ - hal::bit_modify(pin_map->matrix[m_port][m_pin]) - .insert(p_enable); - return *this; -} - -pin const& pin::high_slew_rate(bool p_enable) const -{ - hal::bit_modify(pin_map->matrix[m_port][m_pin]).insert(p_enable); - return *this; -} - -pin const& pin::i2c_high_current(bool p_enable) const -{ - hal::bit_modify(pin_map->matrix[m_port][m_pin]) - .insert(p_enable); - return *this; -} - -pin const& pin::open_drain(bool p_enable) const -{ - hal::bit_modify(pin_map->matrix[m_port][m_pin]) - .insert(p_enable); - return *this; -} - -pin const& pin::dac(bool p_enable) const -{ - hal::bit_modify(pin_map->matrix[m_port][m_pin]) - .insert(p_enable); - return *this; -} -} // namespace hal::lpc40 diff --git a/src/lpc40/pin_reg.hpp b/src/lpc40/pin_reg.hpp deleted file mode 100644 index 0ea0766..0000000 --- a/src/lpc40/pin_reg.hpp +++ /dev/null @@ -1,78 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include -#include - -namespace hal::lpc40 { -/// Pin map table for maping pins and ports to registers. -struct pin_map_t -{ - /// Register matrix that maps against the 6 ports and the 32 pins per port - std::array, 6> matrix; -}; - -/// The address of the IO connect peripheral -static constexpr intptr_t io_connect_address = 0x40000000UL + 0x2C000; - -// Source: "UM10562 LPC408x/407x User manual" table 83 page 132 -/// bit_mask for setting pin mux function code. -static constexpr auto pin_function = hal::bit_mask::from<0, 2>(); - -/// bit_mask for setting resistor mode of pin. -static constexpr auto pin_resistor = hal::bit_mask::from<3, 4>(); - -/// bit_mask for setting pin hysteresis mode. -static constexpr auto pin_hysteresis = hal::bit_mask::from<5>(); - -/// bit_mask for setting inputs as active low or active high. This will behave -/// badly if the pin is set to a mode that is an output or set to analog. See -/// user manual for more details. -static constexpr auto pin_input_invert = hal::bit_mask::from<6>(); - -/// bit_mask for setting a pin to analog mode. -static constexpr auto pin_analog_digital_mode = hal::bit_mask::from<7>(); - -/// bit_mask for enabling/disabling digital filter. This can be used to -/// ignore/reject noise, reflections, or signal bounce (from something like a -/// switch). -static constexpr auto pin_digital_filter = hal::bit_mask::from<8>(); - -/// bit_mask to enable/disable high speed I2C mode -static constexpr auto pin_i2c_highspeed = hal::bit_mask::from<8>(); - -/// bit_mask to change the slew rate of signal transitions for outputs for a -/// pin. -static constexpr auto pin_slew = hal::bit_mask::from<9>(); - -/// bit_mask to enable I2C high current drain. This can allow for even faster -/// I2C communications, as well as allow for more devices on the bus. -static constexpr auto pin_i2c_high_current = hal::bit_mask::from<9>(); - -/// bit_mask to enable/disable open drain mode. -static constexpr auto pin_open_drain = hal::bit_mask::from<10>(); - -/// bit_mask for enabling/disabling digital to analog pin mode. -static constexpr auto pin_dac_enable = hal::bit_mask::from<16>(); - -// NOLINTBEGIN(performance-no-int-to-ptr) -/// @return pin_map_t* - Return the address of the pin map peripheral -inline pin_map_t* pin_map = reinterpret_cast(io_connect_address); -// NOLINTEND(performance-no-int-to-ptr) -} // namespace hal::lpc40 diff --git a/src/lpc40/power.cpp b/src/lpc40/power.cpp deleted file mode 100644 index 82a004b..0000000 --- a/src/lpc40/power.cpp +++ /dev/null @@ -1,26 +0,0 @@ -#include - -#include -#include - -#include "system_controller_reg.hpp" - -namespace hal::lpc40 { -void power_on(peripheral p_peripheral) -{ - hal::bit_modify(system_controller_reg->peripheral_power_control0) - .set(bit_mask::from(value(p_peripheral))); -} - -bool is_on(peripheral p_peripheral) -{ - return hal::bit_extract(bit_mask::from(value(p_peripheral)), - system_controller_reg->peripheral_power_control0); -} - -void power_off(peripheral p_peripheral) -{ - hal::bit_modify(system_controller_reg->peripheral_power_control0) - .clear(bit_mask::from(value(p_peripheral))); -} -} // namespace hal::lpc40 diff --git a/src/lpc40/pwm.cpp b/src/lpc40/pwm.cpp deleted file mode 100644 index fd739a7..0000000 --- a/src/lpc40/pwm.cpp +++ /dev/null @@ -1,208 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include - -#include "pwm_reg.hpp" - -namespace hal::lpc40 { -namespace { -[[nodiscard]] pwm_reg_t* get_pwm_reg(peripheral p_id) -{ - if (p_id == peripheral::pwm0) { - return pwm_reg0; - } - - return pwm_reg1; -} - -[[nodiscard]] uint32_t volatile& get_match_registers(pwm_reg_t* p_reg, - uint8_t p_match) -{ - switch (p_match) { - case 1: - return p_reg->match_register_1; - case 2: - return p_reg->match_register_2; - case 3: - return p_reg->match_register_3; - case 4: - return p_reg->match_register_4; - case 5: - return p_reg->match_register_5; - case 6: - return p_reg->match_register_6; - case 0: - default: - return p_reg->match_register_0; - } -} - -[[nodiscard]] float get_duty_cycle(pwm::channel p_channel, pwm_reg_t* p_reg) -{ - auto period = static_cast(get_match_registers(p_reg, p_channel.index)); - auto max_period = static_cast(get_match_registers(p_reg, 0)); - return period / max_period; -} - -[[nodiscard]] uint32_t calculate_duty_cycle(pwm_reg_t* p_reg, float p_percent) -{ - auto pwm_period = static_cast(get_match_registers(p_reg, 0)); - return static_cast(p_percent * pwm_period); -} - -void enable(pwm_reg_t* p_reg, bool p_enable) -{ - // When set to a 1, enables the TC (total count) register and begins - // counting. - static constexpr auto counter_enable = bit_mask::from<0>(); - - // When set to a 1, will reset the total count register. - static constexpr auto counter_reset = bit_mask::from<1>(); - - // Enables PWM mode. Without setting the match registers cannot operate - // with the timer. - static constexpr auto pwm_enable = bit_mask::from<3>(); - - if (p_enable) { - // Reset the Timer Counter - bit_modify(p_reg->timer_control_register).set(counter_reset); - // Clear reset and allow timer to count - bit_modify(p_reg->timer_control_register).clear(counter_reset); - // Enable PWM output - bit_modify(p_reg->timer_control_register).set(pwm_enable); - // Enable counting - bit_modify(p_reg->timer_control_register).set(counter_enable); - } else { - // Disable PWM output - bit_modify(p_reg->timer_control_register).clear(pwm_enable); - } -} - -void setup(pwm::channel& p_channel) -{ - /// Controls the counting mode of the PWM peripheral. When set to 0, counts - /// using the internal prescale counter which is driven by the peripheral - /// clock. Other modes involve use of an external clock source. - static constexpr auto mode = bit_mask::from<0, 1>(); - - /// If set to a 1, tells the PWM hardware to reset the PWM total count - /// register to be reset to 0 when it is equal to the match register 0. - static constexpr auto pwm0_reset = bit_mask::from<1>(); - - power_on(p_channel.peripheral_id); - - pwm_reg_t* reg = get_pwm_reg(p_channel.peripheral_id); - - // Set pre-scalar to 1 so the input frequency to the PWM peripheral is - // equal to the peripheral clock frequency. - reg->prescale_register = 0; - - // Set to 0 to cause the timer counter to increment after each peripheral - // clock tick. - reg->prescale_counter_register = 0; - - bit_modify(reg->counter_control_register).insert(0x0U); - bit_modify(reg->match_control_register).set(); - - // Enable this pwm channel - bit_modify(reg->pwm_control_register) - .set(bit_mask::from(8U + p_channel.index)); - - p_channel.pwm_pin.function(p_channel.pin_function); - - // Set duty cycle to zero - get_match_registers(reg, p_channel.index) = 0; - - // Enable the PWM output channel - enable(reg, true); -} -} // namespace - -pwm::pwm(std::uint8_t p_peripheral, // NOLINT - std::uint8_t p_channel) - : m_channel{} -{ - bool valid_driver = p_peripheral <= 1 && p_channel <= 6; - if (not valid_driver) { - // "LPC40 series microcontrollers only have PWM0 and PWM1." - safe_throw(hal::operation_not_supported(this)); - } - - m_channel.index = p_channel; - - if (p_peripheral == 0) { - m_channel.peripheral_id = peripheral::pwm0; - m_channel.pwm_pin = pin(3, 16 + (p_channel - 1)); - m_channel.pin_function = 0b010; - } else if (p_peripheral == 1) { - m_channel.peripheral_id = peripheral::pwm1; - m_channel.pwm_pin = pin(2, 0 + (p_channel - 1)); - m_channel.pin_function = 0b001; - } - - setup(m_channel); -} - -void pwm::driver_frequency(hertz p_frequency) -{ - pwm_reg_t* reg = get_pwm_reg(m_channel.peripheral_id); - - auto const input_clock = get_frequency(m_channel.peripheral_id); - - if (p_frequency >= input_clock) { - safe_throw(hal::operation_not_supported(this)); - } - - // Get the current duty cycle so we can match it to the updated frequency. - float previous_duty_cycle = get_duty_cycle(m_channel, reg); - - // In order to avoid PWM glitches, the PWM must be disabled while updating - // the MR0 register. Doing this will reset all counters to 0 and allow us to - // update MR0. - enable(reg, false); - - // Set frequency by setting match register 0 (the reset register) to the - // counts required to reach the desired frequency. - auto const new_frequency = input_clock / p_frequency; - - get_match_registers(reg, 0) = static_cast(new_frequency); - - // Re-enable PWM which will also reset all of the counters which allow - // setting the duty cycle of other PWM channels. - enable(reg, true); - - // Update the duty cycle based on the previous percentage - duty_cycle(previous_duty_cycle); -} - -void pwm::driver_duty_cycle(float p_duty_cycle) -{ - pwm_reg_t* reg = get_pwm_reg(m_channel.peripheral_id); - - // Set match register for this channel - get_match_registers(reg, m_channel.index) = - calculate_duty_cycle(reg, p_duty_cycle); - - // Setup pwm peripheral to update the duty cycle on the next reset cycle after - // a match_register_0 match occurs. This way the PWM duty cycle does ont - // change instantaneously. - bit_modify(reg->load_enable_register).set(bit_mask::from(m_channel.index)); -} -} // namespace hal::lpc40 diff --git a/src/lpc40/pwm_reg.hpp b/src/lpc40/pwm_reg.hpp deleted file mode 100644 index c21321a..0000000 --- a/src/lpc40/pwm_reg.hpp +++ /dev/null @@ -1,77 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include - -namespace hal::lpc40 { -/** - * @brief Register map for the lpc40xx PWM peripheral - * - */ -struct pwm_reg_t -{ - /// Offset: 0x000 Interrupt Register (R/W) - u32 volatile interrupt_register; - /// Offset: 0x004 Timer Control Register (R/W) - u32 volatile timer_control_register; - /// Offset: 0x008 Timer Counter Register (R/W) - u32 volatile timer_counter_register; - /// Offset: 0x00C Prescale Register (R/W) - u32 volatile prescale_register; - /// Offset: 0x010 Prescale Counter Register (R/W) - u32 volatile prescale_counter_register; - /// Offset: 0x014 Match Control Register (R/W) - u32 volatile match_control_register; - /// Offset: 0x018 Match Register 0 (R/W) - u32 volatile match_register_0; - /// Offset: 0x01C Match Register 1 (R/W) - u32 volatile match_register_1; - /// Offset: 0x020 Match Register 2 (R/W) - u32 volatile match_register_2; - /// Offset: 0x024 Match Register 3 (R/W) - u32 volatile match_register_3; - /// Offset: 0x028 Capture Control Register (R/W) - u32 volatile capture_control_register; - /// Offset: 0x02C Capture Register 0 (R/ ) - u32 const volatile capture_register_0; - /// Offset: 0x030 Capture Register 1 (R/ ) - u32 const volatile capture_register_1; - /// Offset: 0x034 Capture Register 2 (R/ ) - u32 const volatile capture_register_2; - /// Offset: 0x038 Capture Register 3 (R/ ) - u32 const volatile capture_register_3; - u32 reserved0; - /// Offset: 0x040 Match Register 4 (R/W) - u32 volatile match_register_4; - /// Offset: 0x044 Match Register 5 (R/W) - u32 volatile match_register_5; - /// Offset: 0x048 Match Register 6 (R/W) - u32 volatile match_register_6; - /// Offset: 0x04C PWM Control Register (R/W) - u32 volatile pwm_control_register; - /// Offset: 0x050 Load Enable Register (R/W) - u32 volatile load_enable_register; - std::array reserved1; - /// Offset: 0x070 Counter Control Register (R/W) - u32 volatile counter_control_register; -}; - -inline pwm_reg_t* pwm_reg0 = reinterpret_cast(0x4001'4000); -inline pwm_reg_t* pwm_reg1 = reinterpret_cast(0x4001'8000); - -} // namespace hal::lpc40 diff --git a/src/lpc40/spi.cpp b/src/lpc40/spi.cpp deleted file mode 100644 index 6ba9ece..0000000 --- a/src/lpc40/spi.cpp +++ /dev/null @@ -1,190 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -#include -#include -#include -#include -#include -#include - -#include "spi_reg.hpp" - -namespace hal::lpc40 { -namespace { -inline spi_reg_t* get_spi_reg(peripheral p_id) -{ - switch (p_id) { - case peripheral::ssp0: - return spi_reg0; - case peripheral::ssp1: - return spi_reg1; - case peripheral::ssp2: - default: - return spi_reg2; - } -} - -inline bool tx_fifo_full(spi_reg_t* p_reg) -{ - return not bit_extract(p_reg->sr); -} -inline bool rx_fifo_not_empty(spi_reg_t* p_reg) -{ - return bit_extract(p_reg->sr); -} -inline bool still_sending(spi_reg_t* p_reg) -{ - return bit_extract(p_reg->sr); -} -} // namespace - -spi::spi(std::uint8_t p_bus_number, spi::settings const& p_settings) -{ - // UM10562: Chapter 7: LPC408x/407x I/O configuration page 13 - if (p_bus_number == 0) { - m_bus = { - .peripheral_id = peripheral::ssp0, - .clock = pin(0, 15), - .data_out = pin(0, 18), - .data_in = pin(0, 17), - .clock_function = 0b010, - .data_out_function = 0b010, - .data_in_function = 0b010, - }; - } else if (p_bus_number == 1) { - m_bus = { - .peripheral_id = peripheral::ssp1, - .clock = pin(0, 7), - .data_out = pin(0, 9), - .data_in = pin(0, 8), - .clock_function = 0b010, - .data_out_function = 0b010, - .data_in_function = 0b010, - }; - } else if (p_bus_number == 2) { - m_bus = { - .peripheral_id = peripheral::ssp2, - .clock = pin(1, 0), - .data_out = pin(1, 1), - .data_in = pin(1, 4), - .clock_function = 0b100, - .data_out_function = 0b100, - .data_in_function = 0b100, - }; - } else { - // "Supported spi busses are 0, 1, and 2!"; - hal::safe_throw(hal::operation_not_supported(this)); - } - - spi::driver_configure(p_settings); -} // namespace hal::lpc40 - -spi::~spi() -{ - power_off(m_bus.peripheral_id); -} - -spi::spi(bus_info p_bus) - : m_bus(p_bus) -{ -} - -void spi::driver_configure(settings const& p_settings) -{ - constexpr uint8_t spi_format_code = 0b00; - - auto* reg = get_spi_reg(m_bus.peripheral_id); - - // Power up peripheral - power_on(m_bus.peripheral_id); - - // Set SSP frame format to SPI - bit_modify(reg->cr0).insert(spi_format_code); - - // Set SPI to master mode by clearing - bit_modify(reg->cr1).clear(); - - // Setup operating frequency - auto const input_clock = get_frequency(m_bus.peripheral_id); - auto const clock_divider = input_clock / p_settings.clock_rate; - auto const prescaler = static_cast(clock_divider); - auto const prescaler_low = static_cast(prescaler & 0xFF); - auto const prescaler_high = static_cast(prescaler >> 8); - // Store lower half of prescalar in clock prescalar register - reg->cpsr = prescaler_low; - // Store upper 8 bit half of the prescalar in control register 0 - bit_modify(reg->cr0).insert(prescaler_high); - - // Set clock modes & bit size - // - // NOTE: In UM10562 page 611, you will see that DSS (Data Size Select) is - // equal to the bit transfer minus 1. So we can add 3 to our DataSize enum - // to get the appropriate transfer code. - constexpr std::uint8_t size_code_8bit = 0b111; - - bit_modify(reg->cr0) - .insert(p_settings.clock_idles_high) - .insert( - p_settings.data_valid_on_trailing_edge) - .insert(size_code_8bit); - - // Initialize SSP pins - m_bus.clock.function(m_bus.clock_function) - .analog(false) - .open_drain(false) - .resistor(pin_resistor::none); - m_bus.data_in.function(m_bus.data_in_function) - .analog(false) - .open_drain(false) - .resistor(pin_resistor::none); - m_bus.data_out.function(m_bus.data_out_function) - .analog(false) - .open_drain(false) - .resistor(pin_resistor::none); - - // Enable SSP - bit_modify(reg->cr1).set(); -} - -void spi::driver_transfer(std::span p_data_out, - std::span p_data_in, - hal::byte p_filler) -{ - auto* reg = get_spi_reg(m_bus.peripheral_id); - auto tx_interator = p_data_out.begin(); - auto rx_interator = p_data_in.begin(); - - // iterate until both reach their end - while (tx_interator != p_data_out.end() || rx_interator != p_data_in.end()) { - if (rx_interator != p_data_in.end() && rx_fifo_not_empty(reg)) { - *rx_interator++ = reg->dr; - } - if (tx_interator == p_data_out.end()) { - reg->dr = p_filler; - } else if (not tx_fifo_full(reg)) { - reg->dr = *tx_interator++; - } - } - - // Wait for bus activity to cease before leaving the function - while (still_sending(reg)) { - continue; - } -} -} // namespace hal::lpc40 diff --git a/src/lpc40/spi_reg.hpp b/src/lpc40/spi_reg.hpp deleted file mode 100644 index 357c200..0000000 --- a/src/lpc40/spi_reg.hpp +++ /dev/null @@ -1,108 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include - -namespace hal::lpc40 { -struct spi_reg_t -{ - /*!< Offset: 0x000 Control Register 0 (R/W) */ - uint32_t volatile cr0; - /*!< Offset: 0x004 Control Register 1 (R/W) */ - uint32_t volatile cr1; - /*!< Offset: 0x008 Data Register (R/W) */ - uint32_t volatile dr; - /*!< Offset: 0x00C Status Register (R/ ) */ - uint32_t const volatile sr; - /*!< Offset: 0x010 Clock Prescale Register (R/W) */ - uint32_t volatile cpsr; - /*!< Offset: 0x014 Interrupt Mask Set and Clear Register (R/W) */ - uint32_t volatile imsc; - /*!< Offset: 0x018 Raw Interrupt Status Register (R/W) */ - uint32_t volatile ris; - /*!< Offset: 0x01C Masked Interrupt Status Register (R/W) */ - uint32_t volatile mis; - /*!< Offset: 0x020 SSPICR Interrupt Clear Register (R/W) */ - uint32_t volatile icr; - /*!< Offset: 0x024 SSPnDMACR DMA control register (R/W) */ - uint32_t volatile dmacr; -}; - -/// SSPn Control Register 0 -struct control_register0 // NOLINT -{ - /// Data Size Select. This field controls the number of bits transferred in - /// each frame. Values 0000-0010 are not supported and should not be used. - static constexpr auto data_bit = bit_mask::from<0, 3>(); - - /// Frame Format bitmask. - /// 00 = SPI, 01 = TI, 10 = Microwire, 11 = Invalid - static constexpr auto frame_bit = bit_mask::from<4, 5>(); - - /// If bit is set to 0 SSP controller maintains the bus clock low between - /// frames. - /// - /// If bit is set to 1 SSP controller maintains the bus clock high between - /// frames. - static constexpr auto polarity_bit = bit_mask::from<6>(); - - /// If bit is set to 0 SSP controller captures serial data on the first - /// clock transition of the frame, that is, the transition away from the - /// inter-frame state of the clock line. - /// - /// If bit is set to 1 SSP controller captures serial data on the second - /// clock transition of the frame, that is, the transition back to the - /// inter-frame state of the clock line. - static constexpr auto phase_bit = bit_mask::from<7>(); - - /// Bitmask for dividing the peripheral clock to set the SPI clock - /// frequency. - static constexpr auto divider_bit = bit_mask::from<8, 15>(); -}; - -/// SSPn Control Register 1 -struct control_register1 // NOLINT -{ - /// Setting this bit to 1 will enable the peripheral for communication. - static constexpr auto spi_enable = bit_mask::from<1>(); - - /// Setting this bit to 1 will enable spi slave mode. - static constexpr auto slave_mode_bit = bit_mask::from<2>(); -}; - -/// SSPn Status Register -struct status_register // NOLINT -{ - static constexpr auto transmit_fifo_not_full = bit_mask::from<1>(); - static constexpr auto receive_fifo_not_empty = bit_mask::from<2>(); - /// This bit is 0 if the SSPn controller is idle, or 1 if it is currently - /// sending/receiving a frame and/or the Tx FIFO is not empty. - static constexpr auto data_line_busy_bit = bit_mask::from<4>(); -}; - -/// SSPn dma Register -struct dma_register // NOLINT -{ - static constexpr auto receive_dma_enable = bit_mask::from<0>(); - static constexpr auto transmit_dma_enable = bit_mask::from<1>(); -}; - -inline spi_reg_t* spi_reg0 = reinterpret_cast(0x40088000); -inline spi_reg_t* spi_reg1 = reinterpret_cast(0x40030000); -inline spi_reg_t* spi_reg2 = reinterpret_cast(0x400AC000); -} // namespace hal::lpc40 diff --git a/src/lpc40/stream_dac.cpp b/src/lpc40/stream_dac.cpp deleted file mode 100644 index 2195637..0000000 --- a/src/lpc40/stream_dac.cpp +++ /dev/null @@ -1,111 +0,0 @@ -#include - -#include -#include -#include -#include -#include -#include - -#include "dac_reg.hpp" - -namespace hal::lpc40 { - -namespace { -void setup_stream_dac() -{ - hal::lpc40::pin(0, 26).function(0b010).dac(true); - - // Double buffering enabled (1) - // Count enable (2) - // DMA enable (3) - dac_reg->control = (1 << 1) | (1 << 2) | (1 << 3); -} - -template -void dac_dma_write(hal::io_waiter& p_waiter, - typename hal::stream_dac::samples const& p_samples) -{ - // Setup sampling frequency - auto const input_clock = - hal::lpc40::get_frequency(hal::lpc40::peripheral::dac); - auto const clock_count_value = input_clock / p_samples.sample_rate; - dac_reg->count_value = clock_count_value; - - auto data_remaining = p_samples.data; - - while (not data_remaining.empty()) { - bool finished = false; - auto const transfer_amount = - std::min(data_remaining.size(), dma_max_transfer_size); - - if constexpr (std::is_same_v) { - hal::lpc40::setup_dma_transfer( - dma{ - .source = data_remaining.data(), - .destination = &dac_reg->conversion_register.parts[1], - .length = transfer_amount, - .source_increment = true, - .destination_increment = false, - .transfer_type = dma_transfer_type::memory_to_peripheral, - .source_transfer_width = dma_transfer_width::bit_8, - .destination_transfer_width = dma_transfer_width::bit_8, - .source_peripheral = dma_peripheral::memory_or_timer0_match0, - .destination_peripheral = dma_peripheral::dac, - }, - [&p_waiter, &finished]() { - finished = true; - p_waiter.resume(); - }); - } else if (std::is_same_v) { - hal::lpc40::setup_dma_transfer( - dma{ - .source = data_remaining.data(), - .destination = &dac_reg->conversion_register.whole, - .length = transfer_amount, - .source_increment = true, - .destination_increment = false, - .transfer_type = dma_transfer_type::memory_to_peripheral, - .source_transfer_width = dma_transfer_width::bit_16, - .destination_transfer_width = dma_transfer_width::bit_16, - .source_peripheral = dma_peripheral::memory_or_timer0_match0, - .destination_peripheral = dma_peripheral::dac, - }, - [&p_waiter, &finished]() { - finished = true; - p_waiter.resume(); - }); - } - - while (not finished) { - p_waiter.wait(); - } - - // Move data forward by the amount of data that was transferred - data_remaining = data_remaining.subspan(transfer_amount); - } -} -} // namespace - -stream_dac_u8::stream_dac_u8(hal::io_waiter& p_waiter) - : m_waiter(&p_waiter) -{ - setup_stream_dac(); -} - -void stream_dac_u8::driver_write(hal::stream_dac_u8::samples const& p_samples) -{ - dac_dma_write(*m_waiter, p_samples); -} - -stream_dac_u16::stream_dac_u16(hal::io_waiter& p_waiter) - : m_waiter(&p_waiter) -{ - setup_stream_dac(); -} - -void stream_dac_u16::driver_write(hal::stream_dac_u16::samples const& p_samples) -{ - dac_dma_write(*m_waiter, p_samples); -} -} // namespace hal::lpc40 diff --git a/src/lpc40/system_controller_reg.hpp b/src/lpc40/system_controller_reg.hpp deleted file mode 100644 index 3ccb84d..0000000 --- a/src/lpc40/system_controller_reg.hpp +++ /dev/null @@ -1,208 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include -#include -#include -#include -#include - -namespace hal::lpc40 { -/// lpc40xx system controller register map -struct system_controller_t -{ - /// Offset: 0x000 (R/W) Flash Accelerator Configuration Register - uint32_t volatile flashcfg; - /// reserved 0 - std::array reserved0; - /// Offset: 0x080 (R/W) PLL0 Control Register - uint32_t volatile pll0con; - /// Offset: 0x084 (R/W) PLL0 Configuration Register - uint32_t volatile pll0cfg; - /// Offset: 0x088 (R/ ) PLL0 Status Register - uint32_t const volatile pll0stat; - /// Offset: 0x08C ( /W) PLL0 Feed Register - uint32_t volatile pll0feed; - /// reserved 1 - std::array reserved1; - /// Offset: 0x0A0 (R/W) PLL1 Control Register - uint32_t volatile pll1con; - /// Offset: 0x0A4 (R/W) PLL1 Configuration Register - uint32_t volatile pll1cfg; - /// Offset: 0x0A8 (R/ ) PLL1 Status Register - uint32_t const volatile pll1stat; - /// Offset: 0x0AC ( /W) PLL1 Feed Register - uint32_t volatile pll1feed; - /// reserved 2 - std::array reserved2; - /// Offset: 0x0C0 (R/W) Power Control Register - uint32_t volatile power_control; - /// Offset: 0x0C4 (R/W) Power Control for Peripherals Register - uint32_t volatile peripheral_power_control0; - /// Offset: 0x0C8 (R/W) Power Control for Peripherals Register - uint32_t volatile peripheral_power_control1; - /// reserved 3 - std::array reserved3; - /// Offset: 0x100 (R/W) External Memory Controller Clock Selection Register - uint32_t volatile emmc_clock_select; - /// Offset: 0x104 (R/W) CPU Clock Selection Register - uint32_t volatile cpu_clock_select; - /// Offset: 0x108 (R/W) USB Clock Selection Register - uint32_t volatile usb_clock_select; - /// Offset: 0x10C (R/W) Clock Source Select Register - uint32_t volatile clock_source_select; - /// Offset: 0x110 (R/W) CAN Sleep Clear Register - uint32_t volatile can_sleep_clear; - /// Offset: 0x114 (R/W) CAN Wake-up Flags Register - uint32_t volatile canwakeflags; - /// reserved 4 - std::array reserved4; - /// Offset: 0x140 (R/W) External Interrupt Flag Register - uint32_t volatile extint; - /// reserved 5 - std::array reserved5; - /// Offset: 0x148 (R/W) External Interrupt Mode Register - uint32_t volatile extmode; - /// Offset: 0x14C (R/W) External Interrupt Polarity Register - uint32_t volatile extpolar; - /// reserved 6 - std::array reserved6; - /// Offset: 0x180 (R/W) Reset Source Identification Register - uint32_t volatile reset_source_id; - /// reserved 7 - std::array reserved7; - /// Offset: 0x1A0 (R/W) System Controls and Status Register - uint32_t volatile scs; - /// Offset: 0x1A4 (R/W) Clock Dividers - uint32_t volatile irctrim; - /// Offset: 0x1A8 (R/W) Peripheral Clock Selection Register - uint32_t volatile peripheral_clock_select; - /// reserved 8 - std::array reserved8; - /// Offset: 0x1B0 (R/W) Power Boost control register - uint32_t volatile power_boost; - /// Offset: 0x1B4 (R/W) spifi clock select - uint32_t volatile spifi_clock_select; - /// Offset: 0x1B8 (R/W) LCD Configuration and clocking control Register - uint32_t volatile lcd_cfg; - /// reserved 9 - std::array reserved9; - /// Offset: 0x1C0 (R/W) USB Interrupt Status Register - uint32_t volatile usb_interrupt_status; - /// Offset: 0x1C4 (R/W) DMA Request Select Register - uint32_t volatile dmareqsel; - /// Offset: 0x1C8 (R/W) Clock Output Configuration Register - uint32_t volatile clkoutcfg; - /// Offset: 0x1CC (R/W) RESET Control0 Register - uint32_t volatile rstcon0; - /// Offset: 0x1D0 (R/W) RESET Control1 Register - uint32_t volatile rstcon1; - /// reserved 10 - std::array reserved10; - /// Offset: 0x1DC (R/W) sdram programmable delays - uint32_t volatile sdram_delay; - /// Offset: 0x1E0 (R/W) Calibration of programmable delays - uint32_t volatile emmc_calibration; -}; // namespace system_controller_t - -/// Namespace for PLL configuration bit masks -namespace pll_register { -/// In PLLCON register: When 1, and after a valid PLL feed, this bit -/// will activate the related PLL and allow it to lock to the requested -/// frequency. -static constexpr auto enable = bit_mask::from<0>(); - -/// In PLLCFG register: PLL multiplier value, the amount to multiply the -/// input frequency by. -static constexpr auto multiplier = bit_mask::from<0, 4>(); - -/// In PLLCFG register: PLL divider value, the amount to divide the output -/// of the multiplier stage to bring the frequency down to a -/// reasonable/usable level. -static constexpr auto divider = bit_mask::from<5, 6>(); - -/// In PLLSTAT register: if set to 1 by hardware, the PLL has accepted -/// the configuration and is locked. -static constexpr auto pll_lock = bit_mask::from<10>(); -}; // namespace pll_register - -/// Namespace of Oscillator register bit_masks -namespace oscillator { -/// IRC or Main oscillator select bit -static constexpr auto select = bit_mask::from<0>(); - -/// SCS: Main oscillator range select -static constexpr auto range_select = bit_mask::from<4>(); - -/// SCS: Main oscillator enable -static constexpr auto external_enable = bit_mask::from<5>(); - -/// SCS: Main oscillator ready status -static constexpr auto external_ready = bit_mask::from<6>(); -}; // namespace oscillator - -/// Namespace of Clock register bit_masks -namespace cpu_clock { -/// CPU clock divider amount -static constexpr auto divider = bit_mask::from<0, 4>(); - -/// CPU clock source select bit -static constexpr auto select = bit_mask::from<8>(); -}; // namespace cpu_clock - -/// Namespace of Peripheral register bit_masks -namespace peripheral_clock { -/// Main single peripheral clock divider shared across all peripherals, -/// except for USB and spifi. -static constexpr auto divider = bit_mask::from<0, 4>(); -}; // namespace peripheral_clock - -/// Namespace of EMC register bit_masks -namespace emc_clock { -/// EMC Clock Register divider bit -static constexpr auto divider = bit_mask::from<0>(); -}; // namespace emc_clock - -/// Namespace of USB register bit_masks -namespace usb_clock { -/// USB clock divider constant -static constexpr auto divider = bit_mask::from<0, 4>(); - -/// USB clock source select bit -static constexpr auto select = bit_mask::from<8, 9>(); -}; // namespace usb_clock - -/// Namespace of spifi register bit_masks -namespace spifi_clock { -/// spifi clock divider constant -static constexpr auto divider = bit_mask::from<0, 4>(); - -/// spifi clock source select bit -static constexpr auto select = bit_mask::from<8, 9>(); -}; // namespace spifi_clock - -constexpr intptr_t lpc_apb1_base = 0x40080000UL; -constexpr intptr_t lpc_sc_base = lpc_apb1_base + 0x7C000; - -// NOLINTBEGIN(performance-no-int-to-ptr) -/// @brief Pointer to system controller register -inline system_controller_t* system_controller_reg = - reinterpret_cast(lpc_sc_base); -// NOLINTEND(performance-no-int-to-ptr) -} // namespace hal::lpc40 diff --git a/src/lpc40/uart.cpp b/src/lpc40/uart.cpp deleted file mode 100644 index 981370f..0000000 --- a/src/lpc40/uart.cpp +++ /dev/null @@ -1,342 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "uart_clock.hpp" -#include "uart_reg.hpp" - -namespace hal::lpc40 { - -uart_reg_t* get_uart_reg(peripheral p_id) -{ - switch (p_id) { - case peripheral::uart0: - return uart_reg0; - case peripheral::uart1: - return uart_reg1; - case peripheral::uart2: - return uart_reg2; - case peripheral::uart3: - return uart_reg3; - case peripheral::uart4: - default: - return uart_reg4; - } -} - -void configure_baud_rate(uart_reg_t* p_reg, uart_baud_t p_calibration) -{ - static constexpr auto divisor_access = bit_mask::from<7>(); - - auto divisor_latch_msb = - static_cast((p_calibration.divider >> 8) & 0xFF); - auto divisor_latch_lsb = static_cast(p_calibration.divider & 0xFF); - auto fractional_divider = static_cast( - (p_calibration.numerator & 0xF) | (p_calibration.denominator & 0xF) << 4); - - bit_modify(p_reg->line_control).set(divisor_access); - p_reg->group1.divisor_latch_lsb = divisor_latch_lsb; - p_reg->group2.divisor_latch_msb = divisor_latch_msb; - p_reg->fractional_divider = fractional_divider; - bit_modify(p_reg->line_control).clear(divisor_access); -} - -uint8_t get_line_control(serial::settings const& p_settings) -{ - bit_value line_control_object(0); - - // Set stop bit length - switch (p_settings.stop) { - case serial::settings::stop_bits::one: - line_control_object.clear(); - break; - case serial::settings::stop_bits::two: - line_control_object.set(); - break; - } - - // Set frame size to 8 = 0x3 - line_control_object.insert(0x3U); - - // Preset the parity enable and disable it if the parity is set to none - line_control_object.set(); - - // Set frame parity - switch (p_settings.parity) { - case serial::settings::parity::odd: - line_control_object.insert(0x0U); - break; - case serial::settings::parity::even: - line_control_object.insert(0x1U); - break; - case serial::settings::parity::forced1: - line_control_object.insert(0x2U); - break; - case serial::settings::parity::forced0: - line_control_object.insert(0x3U); - break; - case serial::settings::parity::none: - // Turn off parity if the parity is set to none - line_control_object.clear(); - break; - } - - return line_control_object.get(); -} - -void reset_uart_queue(uart_reg_t* p_reg) -{ - bit_modify(p_reg->group3.fifo_control) - .set() - .set(); -} - -inline bool has_data(uart_reg_t* p_reg) -{ - return bit_extract()>(p_reg->line_status); -} - -void uart::interrupt_handler() -{ - auto* reg = get_uart_reg(m_port.id); - [[maybe_unused]] auto line_status_value = reg->line_status; - auto interrupt_type = - bit_extract(reg->group3.interrupt_id); - if (interrupt_type == 0x2 || interrupt_type == 0x6) { - while (has_data(reg)) { - hal::byte new_byte{ reg->group1.receive_buffer }; - if (!m_receive_buffer.full()) { - m_receive_buffer.push_back(hal::byte{ new_byte }); - } - } - } -} - -void uart::setup_receive_interrupt() -{ - auto* reg = get_uart_reg(m_port.id); - // Create a lambda to call the interrupt() method - auto isr = [this]() { interrupt_handler(); }; - - // A pointer to save the static_callable isr address to. - cortex_m::interrupt_pointer handler; - - switch (m_port.irq_number) { - case irq::uart0: - handler = static_callable(isr).get_handler(); - break; - case irq::uart1: - handler = static_callable(isr).get_handler(); - break; - case irq::uart2: - handler = static_callable(isr).get_handler(); - break; - case irq::uart3: - handler = static_callable(isr).get_handler(); - break; - case irq::uart4: - default: - handler = static_callable(isr).get_handler(); - break; - } - - // Enable interrupt service routine. - cortex_m::enable_interrupt(m_port.irq_number, handler); - - // Enable uart interrupt signal - bit_modify(reg->group2.interrupt_enable) - .set(); - // 0x3 = 14 bytes in fifo before triggering a receive interrupt. - // 0x2 = 8 - // 0x1 = 4 - // 0x0 = 1 - bit_modify(reg->group3.fifo_control) - .insert(0x3U); -} - -uart::uart(std::uint8_t p_port_number, - std::span p_receive_working_buffer, - serial::settings const& p_settings) - : m_port{} - , m_receive_buffer(p_receive_working_buffer.begin(), - p_receive_working_buffer.end()) -{ - if (p_port_number == 0) { - // NOTE: required since LPC_UART0 is of type LPC_UART0_TypeDef in - // lpc17xx - // and LPC_UART_TypeDef in lpc40xx causing a "useless cast" warning when - // compiled for, some odd reason, for either one being compiled, which - // would make more sense if it only warned us with lpc40xx. - m_port = uart::port{ - .id = peripheral::uart0, - .irq_number = irq::uart0, - .tx = pin(0, 2), - .rx = pin(0, 3), - .tx_function = 0b001, - .rx_function = 0b001, - }; - } else if (p_port_number == 1) { - m_port = uart::port{ - .id = peripheral::uart1, - .irq_number = irq::uart1, - .tx = pin(2, 0), - .rx = pin(2, 1), - .tx_function = 0b010, - .rx_function = 0b010, - }; - } else if (p_port_number == 2) { - m_port = uart::port{ - .id = peripheral::uart2, - .irq_number = irq::uart2, - .tx = pin(2, 8), - .rx = pin(2, 9), - .tx_function = 0b010, - .rx_function = 0b010, - }; - } else if (p_port_number == 3) { - m_port = uart::port{ - .id = peripheral::uart3, - .irq_number = irq::uart3, - .tx = pin(4, 28), - .rx = pin(4, 29), - .tx_function = 0b010, - .rx_function = 0b010, - }; - } else if (p_port_number == 4) { - m_port = uart::port{ - .id = peripheral::uart4, - .irq_number = irq::uart4, - .tx = pin(1, 28), - .rx = pin(2, 9), - .tx_function = 0b101, - .rx_function = 0b011, - }; - } else { - // "Support UART ports for LPC40xx are UART0, UART2, UART3, and UART4."; - hal::safe_throw(hal::operation_not_supported(this)); - } - - initialize_interrupts(); - uart::driver_configure(p_settings); -} - -uart::uart(uart::port const& p_port, - std::span p_receive_working_buffer, - serial::settings const& p_settings) - : m_port(p_port) - , m_receive_buffer(p_receive_working_buffer.begin(), - p_receive_working_buffer.end()) -{ - initialize_interrupts(); - uart::driver_configure(p_settings); -} - -void uart::driver_configure(settings const& p_settings) -{ - auto* reg = get_uart_reg(m_port.id); - - // Validate the settings before configuring any hardware - auto baud_rate = static_cast(p_settings.baud_rate); - auto uart_frequency = get_frequency(m_port.id); - auto uart_frequency_hz = static_cast(uart_frequency); - auto baud_settings = calculate_baud(baud_rate, uart_frequency_hz); - - // For proper operation of the UART port, the divider must be greater than 2 - // If it is not the cause that means that the baud rate is too high for this - // device. - if (baud_settings.divider <= 2) { - safe_throw(hal::operation_not_supported(this)); - } - - // Power on UART peripheral - power_on(m_port.id); - - // Enable fifo for receiving bytes and to enable full access of the FCR - // register. - bit_modify(reg->group3.fifo_control).set(); - reg->line_control = get_line_control(p_settings); - - configure_baud_rate(reg, baud_settings); - - pin(m_port.tx).function(m_port.tx_function); - pin(m_port.rx) - .function(m_port.rx_function) - .resistor(hal::pin_resistor::pull_up); - - setup_receive_interrupt(); - - // Clear the buffer - uart::driver_flush(); - - // Reset the UART queues - reset_uart_queue(reg); -} - -bool finished_sending(uart_reg_t* p_reg) -{ - return bit_extract()>(p_reg->line_status); -} - -serial::write_t uart::driver_write(std::span p_data) -{ - auto* reg = get_uart_reg(m_port.id); - - for (auto const& byte : p_data) { - reg->group1.transmit_buffer = byte; - while (!finished_sending(reg)) { - continue; - } - } - return write_t{ .data = p_data }; -} - -serial::read_t uart::driver_read(std::span p_data) -{ - size_t count = 0; - for (auto& byte : p_data) { - if (m_receive_buffer.empty()) { - break; - } - - byte = m_receive_buffer.pop_front(); - count++; - } - - return read_t{ - .data = p_data.subspan(0, count), - .available = m_receive_buffer.size(), - .capacity = m_receive_buffer.capacity(), - }; -} - -void uart::driver_flush() -{ - while (!m_receive_buffer.empty()) { - m_receive_buffer.pop_back(); - } -} -} // namespace hal::lpc40 diff --git a/src/lpc40/uart_clock.hpp b/src/lpc40/uart_clock.hpp deleted file mode 100644 index c5080ea..0000000 --- a/src/lpc40/uart_clock.hpp +++ /dev/null @@ -1,200 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include - -#include - -namespace hal::lpc40 { -/// Structure containing the exact clock divider and multiplier tuning values -/// for the uart peripheral -struct uart_baud_t -{ - /// main clock divider - uint32_t divider; - /// tuning numerator - uint32_t numerator; - /// tuning denominator - uint32_t denominator; -}; - -/// Structure holds the fractional tuning information that follows this -/// equation: -/// -/// 1 + (numerator / denominator) -/// -/// Thus the end value will always be 1.XXX value. The fractional value is used -/// to tune the baud rate down slightly to reach a target baud rate which -/// couldn't be achieved with -struct fractional_divider_t -{ - /// The tuning ratio multiplier to scale up baud rate by - int ratio; - /// The numerator value of the ratio must always be smaller than or equal to - /// the denominator - uint32_t numerator; - /// The denominator value of the ratio - uint32_t denominator; -}; - -/// Table of all of the possible fractional values allowed for the UART hardware -/// and their ratios -constexpr std::array fractional_table{ - fractional_divider_t{ .ratio = 1000, .numerator = 0, .denominator = 1 }, - fractional_divider_t{ .ratio = 1250, .numerator = 1, .denominator = 4 }, - fractional_divider_t{ .ratio = 1500, .numerator = 1, .denominator = 2 }, - fractional_divider_t{ .ratio = 1750, .numerator = 3, .denominator = 4 }, - fractional_divider_t{ .ratio = 1067, .numerator = 1, .denominator = 15 }, - fractional_divider_t{ .ratio = 1267, .numerator = 4, .denominator = 15 }, - fractional_divider_t{ .ratio = 1533, .numerator = 8, .denominator = 15 }, - fractional_divider_t{ .ratio = 1769, .numerator = 10, .denominator = 13 }, - fractional_divider_t{ .ratio = 1071, .numerator = 1, .denominator = 14 }, - fractional_divider_t{ .ratio = 1273, .numerator = 3, .denominator = 11 }, - fractional_divider_t{ .ratio = 1538, .numerator = 7, .denominator = 13 }, - fractional_divider_t{ .ratio = 1778, .numerator = 7, .denominator = 9 }, - fractional_divider_t{ .ratio = 1077, .numerator = 1, .denominator = 13 }, - fractional_divider_t{ .ratio = 1286, .numerator = 2, .denominator = 7 }, - fractional_divider_t{ .ratio = 1545, .numerator = 6, .denominator = 11 }, - fractional_divider_t{ .ratio = 1786, .numerator = 11, .denominator = 14 }, - fractional_divider_t{ .ratio = 1083, .numerator = 1, .denominator = 12 }, - fractional_divider_t{ .ratio = 1300, .numerator = 3, .denominator = 10 }, - fractional_divider_t{ .ratio = 1556, .numerator = 5, .denominator = 9 }, - fractional_divider_t{ .ratio = 1800, .numerator = 4, .denominator = 5 }, - fractional_divider_t{ .ratio = 1091, .numerator = 1, .denominator = 11 }, - fractional_divider_t{ .ratio = 1308, .numerator = 4, .denominator = 13 }, - fractional_divider_t{ .ratio = 1571, .numerator = 4, .denominator = 7 }, - fractional_divider_t{ .ratio = 1818, .numerator = 9, .denominator = 11 }, - fractional_divider_t{ .ratio = 1100, .numerator = 1, .denominator = 10 }, - fractional_divider_t{ .ratio = 1333, .numerator = 1, .denominator = 3 }, - fractional_divider_t{ .ratio = 1583, .numerator = 7, .denominator = 12 }, - fractional_divider_t{ .ratio = 1833, .numerator = 5, .denominator = 6 }, - fractional_divider_t{ .ratio = 1111, .numerator = 1, .denominator = 9 }, - fractional_divider_t{ .ratio = 1357, .numerator = 5, .denominator = 14 }, - fractional_divider_t{ .ratio = 1600, .numerator = 3, .denominator = 5 }, - fractional_divider_t{ .ratio = 1846, .numerator = 11, .denominator = 13 }, - fractional_divider_t{ .ratio = 1125, .numerator = 1, .denominator = 8 }, - fractional_divider_t{ .ratio = 1364, .numerator = 4, .denominator = 11 }, - fractional_divider_t{ .ratio = 1615, .numerator = 8, .denominator = 13 }, - fractional_divider_t{ .ratio = 1857, .numerator = 6, .denominator = 7 }, - fractional_divider_t{ .ratio = 1133, .numerator = 2, .denominator = 15 }, - fractional_divider_t{ .ratio = 1375, .numerator = 3, .denominator = 8 }, - fractional_divider_t{ .ratio = 1625, .numerator = 5, .denominator = 8 }, - fractional_divider_t{ .ratio = 1867, .numerator = 13, .denominator = 15 }, - fractional_divider_t{ .ratio = 1143, .numerator = 1, .denominator = 7 }, - fractional_divider_t{ .ratio = 1385, .numerator = 5, .denominator = 13 }, - fractional_divider_t{ .ratio = 1636, .numerator = 7, .denominator = 11 }, - fractional_divider_t{ .ratio = 1875, .numerator = 7, .denominator = 8 }, - fractional_divider_t{ .ratio = 1154, .numerator = 2, .denominator = 13 }, - fractional_divider_t{ .ratio = 1400, .numerator = 2, .denominator = 5 }, - fractional_divider_t{ .ratio = 1643, .numerator = 9, .denominator = 14 }, - fractional_divider_t{ .ratio = 1889, .numerator = 8, .denominator = 9 }, - fractional_divider_t{ .ratio = 1167, .numerator = 1, .denominator = 6 }, - fractional_divider_t{ .ratio = 1417, .numerator = 5, .denominator = 12 }, - fractional_divider_t{ .ratio = 1667, .numerator = 2, .denominator = 3 }, - fractional_divider_t{ .ratio = 1900, .numerator = 9, .denominator = 10 }, - fractional_divider_t{ .ratio = 1182, .numerator = 2, .denominator = 11 }, - fractional_divider_t{ .ratio = 1429, .numerator = 3, .denominator = 7 }, - fractional_divider_t{ .ratio = 1692, .numerator = 9, .denominator = 13 }, - fractional_divider_t{ .ratio = 1909, .numerator = 10, .denominator = 11 }, - fractional_divider_t{ .ratio = 1200, .numerator = 1, .denominator = 5 }, - fractional_divider_t{ .ratio = 1444, .numerator = 4, .denominator = 9 }, - fractional_divider_t{ .ratio = 1700, .numerator = 7, .denominator = 10 }, - fractional_divider_t{ .ratio = 1917, .numerator = 11, .denominator = 12 }, - fractional_divider_t{ .ratio = 1214, .numerator = 3, .denominator = 14 }, - fractional_divider_t{ .ratio = 1455, .numerator = 5, .denominator = 11 }, - fractional_divider_t{ .ratio = 1714, .numerator = 5, .denominator = 7 }, - fractional_divider_t{ .ratio = 1923, .numerator = 12, .denominator = 13 }, - fractional_divider_t{ .ratio = 1222, .numerator = 2, .denominator = 9 }, - fractional_divider_t{ .ratio = 1462, .numerator = 6, .denominator = 13 }, - fractional_divider_t{ .ratio = 1727, .numerator = 8, .denominator = 11 }, - fractional_divider_t{ .ratio = 1929, .numerator = 13, .denominator = 14 }, - fractional_divider_t{ .ratio = 1231, .numerator = 3, .denominator = 13 }, - fractional_divider_t{ .ratio = 1467, .numerator = 7, .denominator = 15 }, - fractional_divider_t{ .ratio = 1733, .numerator = 11, .denominator = 15 }, - fractional_divider_t{ .ratio = 1933, .numerator = 14, .denominator = 15 }, -}; - -/** - * @brief Find the closest fractional value to the target ratio - * - * @param p_ratio - target ratio to hit the target baud rate - * @return constexpr fractional_divider_t - fractional value representing the - * closest approximation to the target ratio. - */ -constexpr fractional_divider_t closest_fractional(int32_t p_ratio) -{ - fractional_divider_t result = fractional_table[0]; - auto difference = std::numeric_limits::max(); - - for (auto const& fraction : fractional_table) { - int32_t new_difference = hal::absolute_value(p_ratio - fraction.ratio); - if (new_difference < difference) { - result = fraction; - difference = new_difference; - } - } - - return result; -} -// NOLINTBEGIN(bugprone-easily-swappable-parameters) -/** - * @brief Calculate the baud rate register values - * - * @param p_baud_rate - the target baud rate - * @param p_frequency_hz - clock frequency driving uart peripheral - * @return constexpr uart_baud_t - returns the baud rate register values - */ -constexpr uart_baud_t calculate_baud(uint32_t p_baud_rate, - uint32_t p_frequency_hz) -{ - // The number of samples per UART frame bit. - // This is used as a multiplier for the baudrate. - constexpr uint32_t samples_per_bit_rate = 16; - constexpr uint64_t thousands = 1000; - - // Hold the result return value. - uart_baud_t result{}; - - uint64_t const frequency_1000 = p_frequency_hz * thousands; - uint32_t const sample_rate = p_baud_rate * samples_per_bit_rate; - - // Compute the integer divider for the baud rate - uint32_t const integer_divider = (p_frequency_hz / sample_rate); - - // Computer the integer divider for the baud rate except multiplied by 1000 - // in order to get 3 additional decimal places. - auto const divider_1000 = static_cast(frequency_1000 / sample_rate); - - // Save divider to result - result.divider = integer_divider; - - // Check if the integer divider is not zero because not doing that will cause - // a division error. Also note that an integer divider of 0 represents a - // failure. - if (integer_divider != 0) { - auto const multiplier_ratio = - static_cast(divider_1000 / integer_divider); - fractional_divider_t const fraction = closest_fractional(multiplier_ratio); - result.numerator = fraction.numerator; - result.denominator = fraction.denominator; - } - - return result; -} -// NOLINTEND(bugprone-easily-swappable-parameters) -} // namespace hal::lpc40 diff --git a/src/lpc40/uart_reg.hpp b/src/lpc40/uart_reg.hpp deleted file mode 100644 index bc0e8b9..0000000 --- a/src/lpc40/uart_reg.hpp +++ /dev/null @@ -1,176 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include - -namespace hal::lpc40 { - -/// peripheral register map -struct uart_reg_t -{ - /// Union of registers overlapping offset address 0x000 - union union1 - { - /// (R/ ) Contains the next received character to be read - uint8_t const volatile receive_buffer; - /// ( /W) The next character to be transmitted is written here (DLAB = 0) - uint8_t volatile transmit_buffer; - /// (R/W) Least significant byte of the baud rate divisor value. The full - /// divisor is used to generate a baud rate from the fractional rate - /// divider (DLAB = 1) - uint8_t volatile divisor_latch_lsb; - /// Simply here to expand the size of the first union to 32-bits - uint32_t reserved0; - }; - /// Offset: 0x000 Registers overlapping offset address 0x000 - union1 group1; - /// Union of registers overlapping offset address 0x004 - union union2 - { - /// (R/W) Most significant byte of the baud rate divisor value. The full - /// divisor is used to generate a baud rate from the fractional rate - /// divider (DLAB = 1) - uint8_t volatile divisor_latch_msb; - /// (R/W) Contains individual interrupt enable bits for the 7 potential - /// UART interrupts (DLAB =0). - uint32_t volatile interrupt_enable; - }; - /// Offset: 0x004 Registers overlapping offset address 0x004 - union2 group2; - /// Union of registers overlapping offset address 0x008 - union union3 - { - /// (R/ ) Identifies which interrupt(s) are pending. - uint32_t const volatile interrupt_id; - /// ( /W) Controls UART FIFO usage and modes. - uint8_t volatile fifo_control; - }; - /// Offset: 0x008 Registers overlapping offset address 0x000 - union3 group3; - /// Offset: 0x00C (R/W) Contains controls for frame formatting and break - /// generation - uint8_t volatile line_control; - /// reserved 1 - std::array reserved1; - /// Offset: 0x014 (R/ ) Contains flags for transmit and receive status, - /// including line errors - uint8_t const volatile line_status; - /// reserved 2 - std::array reserved2; - /// Offset: 0x01C (R/W) 8-bit temporary storage for software - uint8_t volatile scratch_pad; - /// reserved 3 - std::array reserved3; - /// Offset: 0x020 (R/W) Contains controls for the auto-baud feature. - uint32_t volatile autobaud_control; - /// Offset: - uint8_t volatile icr; - /// reserved 4 - std::array reserved4; - /// Offset: 0x028 (R/W) Generates a clock input for the baud rate divider. - uint8_t volatile fractional_divider; - /// reserved 5 - std::array reserved5; - /// Offset: 0x030 (R/W) Turns off UART transmitter for use with software - /// flow control. - uint8_t volatile transmit_enable; -}; - -/// Line control bit fields -namespace uart_line_control { -/// Word Length Select: Reset = 0 -/// - 0x0 5-bit character -/// - 0x1 6-bit character -/// - 0x2 7-bit character -/// - 0x3 8-bit character -static constexpr auto word_length = bit_mask::from<0, 1>(); -/// Stop Bit Select: Reset 0 -/// - 0 1 stop bit. -/// - 1 2 stop bits. (1.5 if UnLCR[1:0]=00).) -static constexpr auto stop = bit_mask::from<2>(); -/// Parity Enable: Reset 0 -/// - 0 Disable parity generation and checking. -/// - 1 Enable parity generation and checking. -static constexpr auto parity_enable = bit_mask::from<3>(); -/// Parity Select 0 -/// - 0x0 Odd parity. Number of 1s in the transmitted character and the -/// attached parity bit will be odd. -/// - 0x1 Even Parity. Number of 1s in the transmitted character and the -/// attached parity bit will be even. -/// - 0x2 Forced 1 stick parity. -/// - 0x3 Forced 0 stick parity. -static constexpr auto parity = bit_mask::from<4, 5>(); -}; // namespace uart_line_control - -/// Interrupt enable bit fields -namespace uart_interrupt_enable { -/// RBR Interrupt Enable. Enables the Receive Data Available interrupt for -/// UARTn: Reset 0 It also controls the Character Receive Time-out -/// interrupt. -/// - 0 Disable the RDA interrupts. -/// - 1 Enable the RDA interrupts. -static constexpr auto receive_interrupt = bit_mask::from<0>(); -}; // namespace uart_interrupt_enable - -/// Interrupt ID bit fields -namespace uart_interrupt_id { -/// Interrupt identification. UnIER[3:1] identifies an interrupt -/// corresponding to the UARTn Rx or TX FIFO. All other combinations of -/// UnIER[3:1] not listed below are reserved (000,100,101,111). -/// - 0x3 1 - Receive Line Status (RLS). -/// - 0x2 2a - Receive Data Available (RDA). -/// - 0x6 2b - Character Time-out Indicator (CTI). -/// - 0x1 3 - THRE Interrupt -static constexpr auto id = bit_mask::from<1, 3>(); -}; // namespace uart_interrupt_id - -/// FIFO control bit fields -namespace uart_fifo_control { -/// FIFO Enable: Reset 0 -/// - 0 UARTn FIFOs are disabled. Must not be used in the application. -/// - 1 Active high enable for both UARTn Rx and TX FIFOs and UnFCR[7:1] -/// access. This bit must be set for proper UART operation. Any transition -/// on this bit will automatically clear the related UART FIFOs. -static constexpr auto fifo_enable = bit_mask::from<0>(); -/// RX FIFO Reset: Reset 0 -/// - 0 No impact on either of UARTn FIFOs. -/// - 1 Writing a logic 1 to UnFCR[1] will clear all bytes in UARTn Rx FIFO, -/// reset the pointer logic. This bit is self-clearing. -static constexpr auto rx_fifo_clear = bit_mask::from<1>(); -/// TX FIFO Reset: Reset 0 -/// - 0 No impact on either of UARTn FIFOs. -/// - 1 Writing a logic 1 to UnFCR[2] will clear all bytes in UARTn TX FIFO, -/// reset the pointer logic. This bit is self-clearing. -static constexpr auto tx_fifo_clear = bit_mask::from<2>(); -/// RX Trigger Level. These two bits determine how many receiver UARTn FIFO -/// characters must be written before an interrupt or DMA request is -/// activated: Reset 0 -/// - 0x0 Trigger level 0 (1 character or 0x01). -/// - 0x1 Trigger level 1 (4 characters or 0x04). -/// - 0x2 Trigger level 2 (8 characters or 0x08). -/// - 0x3 Trigger level 3 (14 characters or 0x0E). -static constexpr auto rx_trigger_level = bit_mask::from<6, 7>(); -}; // namespace uart_fifo_control - -inline uart_reg_t* uart_reg0 = reinterpret_cast(0x4000'C000); -inline uart_reg_t* uart_reg1 = reinterpret_cast(0x4001'0000); -inline uart_reg_t* uart_reg2 = reinterpret_cast(0x4008'8000); -inline uart_reg_t* uart_reg3 = reinterpret_cast(0x4009'C000); -inline uart_reg_t* uart_reg4 = reinterpret_cast(0x400A'4000); -} // namespace hal::lpc40 diff --git a/src/rp/pwm.cpp b/src/pwm.cpp similarity index 99% rename from src/rp/pwm.cpp rename to src/pwm.cpp index 11cdc0b..29d8c06 100644 --- a/src/rp/pwm.cpp +++ b/src/pwm.cpp @@ -21,7 +21,7 @@ #include #include -#include "libhal-arm-mcu/rp/pwm.hpp" +#include "libhal-picosdk/pwm.hpp" namespace hal::rp { inline namespace v4 { diff --git a/src/rp/serial.cpp b/src/serial.cpp similarity index 93% rename from src/rp/serial.cpp rename to src/serial.cpp index c37b707..666ffcd 100644 --- a/src/rp/serial.cpp +++ b/src/serial.cpp @@ -22,7 +22,7 @@ #include #include -#include "libhal-arm-mcu/rp/serial.hpp" +#include "libhal-picosdk/serial.hpp" namespace { auto get_uart(hal::u8 bus) @@ -131,24 +131,24 @@ void uart::driver_configure(settings const& options) serial::write_t uart::driver_write(std::span in) { - auto uart = get_uart(m_bus); + auto inst = get_uart(m_bus); size_t i = 0; for (; i < in.size_bytes(); ++i) { - if (!uart_is_writable(uart)) + if (!uart_is_writable(inst)) break; - uart_get_hw(uart)->dr = in[i]; + uart_get_hw(inst)->dr = in[i]; } return { in.subspan(0, i) }; } serial::read_t uart::driver_read(std::span out) { - auto uart = get_uart(m_bus); + auto inst = get_uart(m_bus); size_t i = 0; for (; i < out.size_bytes(); ++i) { - while (!uart_is_readable(uart)) + while (!uart_is_readable(inst)) break; - out[i] = (uint8_t)uart_get_hw(uart)->dr; + out[i] = (uint8_t)uart_get_hw(inst)->dr; } return { .data = out.subspan(0, i), .available = uart_is_readable(get_uart(m_bus)), diff --git a/src/rp/spi.cpp b/src/spi.cpp similarity index 99% rename from src/rp/spi.cpp rename to src/spi.cpp index 835c089..f015bb6 100644 --- a/src/rp/spi.cpp +++ b/src/spi.cpp @@ -21,7 +21,7 @@ #include #include -#include "libhal-arm-mcu/rp/spi.hpp" +#include "libhal-picosdk/spi.hpp" namespace { auto get_bus(hal::u8 busnum) diff --git a/src/stm32_generic/i2c.cpp b/src/stm32_generic/i2c.cpp deleted file mode 100644 index c61bdbf..0000000 --- a/src/stm32_generic/i2c.cpp +++ /dev/null @@ -1,515 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -namespace hal::stm32_generic { - -struct i2c_cr1 -{ - /// 0: I2C Peripheral not under reset - /// 1: I2C Peripheral under reset state - static constexpr auto software_reset = hal::bit_mask::from<15>(); - /// 0: Releases SMBA pin high. Alert Response Address Header followed by NACK. - /// 1: Drives SMBA pin low. Alert Response Address Header followed by ACK - static constexpr auto smbus_alert = hal::bit_mask::from<13>(); - /// This bit is set and cleared by software, and cleared by hardware when PEC - /// is transferred or by a START or Stop condition or when PE=0. - /// 0: No PEC transfer - /// 1: PEC transfer - static constexpr auto pec = hal::bit_mask::from<12>(); - /// 0: ACK bit controls the (N)ACK of the current byte being received in the - /// shift register. The PEC bit indicates that current byte in shift register - /// is a PEC. - - /// 1: ACK bit controls the (N)ACK of the next byte which will be received in - /// the shift register. The PEC bit indicates that the next byte in the shift - /// register is a PEC - static constexpr auto pos = hal::bit_mask::from<11>(); - /// This bit is set and cleared by software and cleared by hardware when PE=0 - /// 0: no ack return - /// 1: Acknowledge returned after a byte is received (matched address or data) - static constexpr auto ack_enable = hal::bit_mask::from<10>(); - /// Master mode: - /// 0: no stop generation - /// 1: Stop generation after the current byte transfer or after the current - static constexpr auto stop = hal::bit_mask::from<9>(); - /// Master mode: - /// 0: no start generation - /// 1: repeated start generation - static constexpr auto start = hal::bit_mask::from<8>(); - /// 0: Clock stretching enable - /// 1: Clock stretching disable - static constexpr auto clock_stretch_disable = hal::bit_mask::from<7>(); - /// 0: General call disable Address 0x00 is NACKed - /// 1: General call enable Address 0x00 is ACKed - static constexpr auto general_call_enable = hal::bit_mask::from<6>(); - /// 0: PEC calculation disable - /// 1: PEC calculation enable - static constexpr auto pec_enable = hal::bit_mask::from<5>(); - /// 0: ARP disable - /// 1: ARP enable - static constexpr auto arp_enable = hal::bit_mask::from<4>(); - /// 0: SMBus device - /// 1: SMBus host - static constexpr auto smbus_type = hal::bit_mask::from<3>(); - /// 0: i2c mode - /// 1: SMBus mode - static constexpr auto smbus_mode = hal::bit_mask::from<1>(); - /// 0: peripheral disable - /// 1: peripheral enable - static constexpr auto peripheral_enable = hal::bit_mask::from<0>(); -}; - -struct i2c_cr2 -{ - /// 0: Next DMA EOT is not the last transfer - /// 1: Next DMA EOT is the last transfer - static constexpr auto last_dma = hal::bit_mask::from<12>(); - /// 0: DMA requests disabled - /// 1: DMA request enabled when TxE=1 or RxNE =1 - static constexpr auto dma_en = hal::bit_mask::from<11>(); - /// 0: TxE = 1 or RxNE = 1 does not generate any interrupt. - /// 1: TxE = 1 or RxNE = 1 generates Event Interrupt - static constexpr auto buffer_intr_en = hal::bit_mask::from<10>(); - /// 0: Event interrupt disabled - /// 1: Event interrupt enabled - /// This interrupt is generated when: - /// - SB = 1 (Master) - /// - ADDR = 1 (Master/Slave) - /// - ADD10= 1 (Master) - /// - STOPF = 1 (Slave) - /// - BTF = 1 with no TxE or RxNE event - /// - TxE event to 1 if ITBUFEN = 1 - /// - RxNE event to 1if ITBUFEN = 1 - static constexpr auto event_intr_en = hal::bit_mask::from<9>(); - /// 0: Error interrupt disabled - /// 1: Error interrupt enabled - /// This interrupt is generated when: - /// - BERR = 1 - /// - ARLO = 1 - /// - AF = 1 - /// - OVR = 1 - /// - PECERR = 1 - /// - TIMEOUT = 1 - /// - SMBALERT = 1 - static constexpr auto error_intr_en = hal::bit_mask::from<8>(); - /// APB clock frequency - /// how many MHz - static constexpr auto apb_frequency = hal::bit_mask::from<5, 0>(); -}; -struct i2c_sr1 -{ - static constexpr auto smb_alert = hal::bit_mask::from<15>(); - /// 0: No timeout error - /// 1: SCL remained LOW for 25 ms (Timeout) - /// or - /// Master cumulative clock low extend time more than 10 ms (Tlow:mext) - /// or - /// Slave cumulative clock low extend time more than 25 ms (Tlow:sext) - /// Cleared by software writing 0, or by hardware when PE=0 - static constexpr auto timeout_error = hal::bit_mask::from<14>(); - /// 0: no PEC error: receiver returns ACK after PEC reception (if ACK=1) - /// 1: PEC error: receiver returns NACK after PEC reception (whatever ACK) - /// Cleared by software writing 0, or by hardware when PE=0 - static constexpr auto pec_error = hal::bit_mask::from<12>(); - /// 0: No overrun/underrun - /// 1: Overrun or underrun - /// Cleared by software writing 0, or by hardware when PE=0 - static constexpr auto over_under_run = hal::bit_mask::from<11>(); - /// 0: No acknowledge failure - /// 1: Acknowledge failure - /// Cleared by software writing 0, or by hardware when PE=0 - static constexpr auto ack_failure = hal::bit_mask::from<10>(); - /// 0: No Arbitration Lost detected - /// 1: Arbitration Lost detected - /// Cleared by software writing 0, or by hardware when PE=0 - static constexpr auto arbitration_lost = hal::bit_mask::from<9>(); - /// 0: No misplaced Start or Stop condition - /// 1: Misplaced Start or Stop condition - /// Cleared by software writing 0, or by hardware when PE=0 - static constexpr auto bus_error = hal::bit_mask::from<8>(); - /// 0: Data register not empty - /// 1: Data register empty - /// Cleared by software writing to the DR register or by hardware after a - /// start or a stop condition or when PE=0 - static constexpr auto tx_empty = hal::bit_mask::from<7>(); - /// 0: Data register empty - /// 1: Data register not empty - /// Cleared by software reading or writing the DR register or by hardware when - /// PE=0.RxNE is not set in case of ARLO event - static constexpr auto rx_not_empty = hal::bit_mask::from<6>(); - /// used in slave mode - static constexpr auto stop_detection = hal::bit_mask::from<4>(); - /// 0: No ADD10 event occurred - /// 1: Master has sent first address byte (header) - /// Cleared by software by either a read or write in the DR register or by - /// Cleared by software reading the SR1 register followed by a write in the DR - /// register of the second address byte, or by hardware when PE=0. - static constexpr auto addr10 = hal::bit_mask::from<3>(); - /// 0: Data byte transfer not done - /// 1: Data byte transfer succeeded - /// Cleared by software by either a read or write in the DR register or by - /// hardware after a start or a stop condition in transmission or when PE=0. - static constexpr auto byte_transfered_finish = hal::bit_mask::from<2>(); - /// This bit is cleared by software reading SR1 register followed reading SR2, - /// or by hardware when PE=0. This interrupt is generated when: - /// 0: No end of address transmission - /// 1: End of address transmission - static constexpr auto addr = hal::bit_mask::from<1>(); - /// Cleared by software by reading the SR1 register followed by writing the DR - /// register, or by hardware when peripheral_enable=0 - /// 0: No Start condition - /// 1: Start condition generated. - static constexpr auto start = hal::bit_mask::from<0>(); -}; -struct i2c_sr2 -{ - - /// 0: No General Call - /// 1: General Call Address received when ENGC=1 - /// Cleared by hardware after a Stop condition or repeated Start condition, or - /// when PE=0 - static constexpr auto general_call_addr = hal::bit_mask::from<4>(); - /// 0: No communication on the bus - /// 1: Communication ongoing on the bus - /// It indicates a communication in progress on the bus. This information is - /// still updated when the interface is disabled (PE=0). - static constexpr auto trans_reciever = hal::bit_mask::from<2>(); - /// 0: No communication on the bus - /// 1: Communication ongoing on the bus - /// It indicates a communication in progress on the bus. This information is - /// still updated when the interface is disabled (PE=0). - static constexpr auto bus_busy = hal::bit_mask::from<1>(); - /// 0: Slave Mode - /// 1: Master Mode - /// Cleared by hardware after detecting a Stop condition on the bus or a loss - /// of arbitration (ARLO=1), or by hardware when PE=0. - static constexpr auto master = hal::bit_mask::from<0>(); -}; -struct i2c_ccr -{ - /// 0: Slow mode mode I2C - /// 1: Fast mode mode I2C - static constexpr auto i2c_mode_sel = hal::bit_mask::from<14>(); - /// 0: Fm mode tlow/thigh = 2 - /// 1: Fm mode tlow/thigh = 16/9 (see CCR) - static constexpr auto duty_cycle = hal::bit_mask::from<14>(); - /// refer to CH 18.6.8 in the User manual () for equation - static constexpr auto ccr = hal::bit_mask::from<11, 0>(); -}; -struct i2c_filter -{ - /// 0 : analog filter enable - /// 1 : analog filter disable - static constexpr auto analog = hal::bit_mask::from<4>(); - - /// Digital noise filter enabled and filtering capability up to n * TPCLK1 - static constexpr auto digital_filter = hal::bit_mask::from<3, 0>(); -}; - -/// i2c register map (RM0383 CH 18.6.11) -struct i2c_reg_t -{ - /// Control reg 1 (CH 18.6.1) - hal::u32 volatile cr1; - /// Control reg 2 (CH 18.6.2) - hal::u32 volatile cr2; - /// Own address reg 1 (CH 18.6.3) - hal::u32 volatile oar1; - /// Own address reg 2 (CH 18.6.4) - hal::u32 volatile oar2; - /// Data reg (CH 18.6.5) - hal::u32 volatile data_reg; - /// Status reg 1 (CH 18.6.6) - hal::u32 volatile sr1; - /// Status reg 2 (CH 18.6.7) - hal::u32 volatile sr2; - /// Clock control reg (CH 18.6.8) - hal::u32 volatile ccr; - /// Rise time reg (CH 18.6.9) - hal::u32 volatile trise; - /// Noise filter reg (CH 18.6.10) - hal::u32 volatile filter; -}; -namespace { -inline i2c_reg_t* get_i2c_reg(void* p_i2c) -{ - return reinterpret_cast(p_i2c); -} - -/** - * @brief Reads the status register - * - * just trying to make the code more readable - * - * @param p_i2c_reg Peripheral register pointers - */ -inline void read_status_reg2(i2c_reg_t const* p_i2c_reg) -{ - p_i2c_reg->sr2; -} -} // namespace - -i2c::i2c(void* p_i2c) -{ - m_i2c = p_i2c; -} - -i2c::i2c() -{ - m_i2c = nullptr; -} - -i2c::~i2c() -{ - auto i2c_reg = get_i2c_reg(m_i2c); - bit_modify(i2c_reg->cr1).clear(i2c_cr1::peripheral_enable); - bit_modify(i2c_reg->cr1).set(i2c_cr1::software_reset); - bit_modify(i2c_reg->cr1).clear(i2c_cr1::software_reset); -} - -void i2c::configure(hal::i2c::settings const& p_settings, hertz p_frequency) -{ - constexpr auto slow_mode_max_speed = 100_Hz; - auto const freq = static_cast(p_frequency); - - if (2_MHz > freq || freq > 50_MHz) { - safe_throw(hal::argument_out_of_domain(this)); - } - auto i2c_reg = get_i2c_reg(m_i2c); - bit_modify(i2c_reg->cr1).set(i2c_cr1::software_reset); - bit_modify(i2c_reg->cr1).clear(i2c_cr1::software_reset); - - bit_modify(i2c_reg->filter) - .set(i2c_filter::digital_filter) - .clear(i2c_filter::analog); - - /// I2C communication speed, fahb / (2 * ccr). The real frequency may - /// differ due to the analog noise filter input delay. - /// CH 18.6.8 in RM0383 (stm32f411 user manual) - - u16 const ccr_value = - freq / (2 * static_cast(p_settings.clock_rate)); - if (p_settings.clock_rate > slow_mode_max_speed) { - if (ccr_value > 4) { - bit_modify(i2c_reg->ccr) - .set(i2c_ccr::i2c_mode_sel) - .insert(ccr_value); - } else { - safe_throw(hal::argument_out_of_domain(this)); - } - } else { - bit_modify(i2c_reg->ccr) - .clear(i2c_ccr::i2c_mode_sel) - .insert(ccr_value); - } - - auto const ahb_freq = static_cast(p_frequency / 1_MHz); - bit_modify(i2c_reg->cr2) - .set(i2c_cr2::buffer_intr_en) - .set(i2c_cr2::event_intr_en) - .set(i2c_cr2::error_intr_en) - .insert(ahb_freq); - bit_modify(i2c_reg->cr1) - .set(i2c_cr1::peripheral_enable) - .set(i2c_cr1::ack_enable) - .clear(i2c_cr1::smbus_mode); -} - -void i2c::handle_i2c_event() noexcept -{ - auto i2c_reg = get_i2c_reg(m_i2c); - auto& status = i2c_reg->sr1; - auto& data = i2c_reg->data_reg; - - // [ โš ๏ธ WARNING] SOMETIMES STM32 I2C peripheral enable will just self reset. - // This will cause the i2c peripheral to misbehave, so the code enables the - // peripheral at each interrupt call to ensure this never happens. - bit_modify(i2c_reg->cr1).set(i2c_cr1::peripheral_enable); - if (bit_extract(status)) { - if (!m_data_out.empty()) { - data = to_8_bit_address(m_address, i2c_operation::write); - m_state = transmission_state::transmitter; - } else { - data = to_8_bit_address(m_address, i2c_operation::read); - m_state = transmission_state::reciever; - } - return; - } - - if (bit_extract(status)) { - if (m_state == transmission_state::reciever) { - switch (m_data_in.size()) { - case 1: { - bit_modify(i2c_reg->cr1).clear(i2c_cr1::ack_enable); - i2c_reg->sr2; - break; - } - case 2: { - bit_modify(i2c_reg->cr1).clear(i2c_cr1::ack_enable).set(i2c_cr1::pos); - read_status_reg2(i2c_reg); - m_data_in[1] = data; - m_data_in[0] = data; - break; - } - default: { - read_status_reg2(i2c_reg); - } - } - } else { - read_status_reg2(i2c_reg); - } - return; - } - - if (bit_extract(status)) { - if (!m_data_out.empty()) { - data = m_data_out[0]; - m_data_out = m_data_out.subspan(1); - } else { - if (!m_data_in.empty()) { - bit_modify(i2c_reg->cr1).set(i2c_cr1::start); - } else { - bit_modify(i2c_reg->cr1).clear(i2c_cr1::ack_enable); - bit_modify(i2c_reg->cr1).set(i2c_cr1::stop); - m_state = transmission_state::free; - } - } - return; - } - - if (bit_extract(status)) { - switch (m_data_in.size()) { - case 2: { - bit_modify(i2c_reg->cr1).clear(i2c_cr1::ack_enable); - m_data_in[0] = data; - bit_modify(i2c_reg->cr1).set(i2c_cr1::stop); - m_data_in[1] = data; - m_data_in[2] = data; - m_state = transmission_state::free; - - break; - } - - case 1: { - m_data_in[0] = data; - bit_modify(i2c_reg->cr1).set(i2c_cr1::stop); - m_state = transmission_state::free; - - break; - } - - case 0: { - bit_modify(i2c_reg->cr1).set(i2c_cr1::stop).clear(i2c_cr1::ack_enable); - [[maybe_unused]] auto a = data; - break; - } - - default: { - m_data_in[0] = data; - m_data_in = m_data_in.subspan(1); - } - } - } -} - -void i2c::handle_i2c_error() noexcept -{ - auto i2c_reg = get_i2c_reg(m_i2c); - auto& status = i2c_reg->sr1; - - if (bit_extract(status)) { - m_status = error_state::arbitration_lost; - } - - if (bit_extract(status)) { - /// we don't support stm32's timeout function, but have an external io - /// waiter - bit_modify(i2c_reg->sr1).clear(i2c_sr1::timeout_error); - } - - if (bit_extract(status)) { - m_status = error_state::no_such_device; - bit_modify(i2c_reg->sr1).clear(); - } - - if (bit_extract(status)) { - m_status = error_state::io_error; - bit_modify(i2c_reg->sr1).clear(); - } -} -void i2c::transaction(hal::byte p_address, - std::span p_data_out, - std::span p_data_in, - hal::function_ref p_timeout) -{ - m_status = error_state::no_error; - m_address = p_address; - m_data_out = p_data_out; - m_data_in = p_data_in; - m_state = transmission_state::transmitter; - auto i2c_reg = get_i2c_reg(m_i2c); - bit_modify(i2c_reg->cr1).set(i2c_cr1::ack_enable); - bit_modify(i2c_reg->cr1).set(i2c_cr1::peripheral_enable); - bit_modify(i2c_reg->cr1).clear(i2c_cr1::stop); - bit_modify(i2c_reg->cr1).set(i2c_cr1::start); - while (m_state != transmission_state::free) { - try { - p_timeout(); - handle_i2c_error(); - switch (m_status) { - case error_state::no_error: { - break; - } - case error_state::no_such_device: { - safe_throw(hal::no_such_device(m_address, this)); - break; - } - case error_state::io_error: { - safe_throw(hal::io_error(this)); - break; - } - case error_state::arbitration_lost: { - while (bit_extract(i2c_reg->sr2)) { - continue; - } - bit_modify(i2c_reg->cr1) - .set(i2c_cr1::peripheral_enable) - .set(i2c_cr1::ack_enable) - .clear(i2c_cr1::stop); - bit_modify(i2c_reg->cr1).set(i2c_cr1::start); - break; - } - } - - } catch (...) { - // The expected exception is hal::timed_out, but it could be something - // else. Let rethrow the exception so the caller handle it. - // A better option here would be to use a std::scope_failure handler. - bit_value(i2c_reg->cr1).clear(i2c_cr1::peripheral_enable); - throw; - } - }; -} -} // namespace hal::stm32_generic diff --git a/src/stm32_generic/pwm.cpp b/src/stm32_generic/pwm.cpp deleted file mode 100644 index bf6f09f..0000000 --- a/src/stm32_generic/pwm.cpp +++ /dev/null @@ -1,251 +0,0 @@ -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "timer.hpp" - -namespace hal::stm32_generic { - -namespace { -void setup_channel(timer_reg_t* p_reg, u8 p_channel, bool p_is_advanced) -{ - static constexpr auto main_output_enable = bit_mask::from<15>(); - static constexpr auto ossr = bit_mask::from<11>(); - - u8 const start_pos = (p_channel - 1) * 4; - auto const cc_enable = bit_mask::from(start_pos); - auto const cc_polarity = bit_mask::from(start_pos + 1); - - bit_modify(p_reg->cc_enable_register).set(cc_enable); - bit_modify(p_reg->cc_enable_register).clear(cc_polarity); - - if (p_is_advanced) { - bit_modify(p_reg->break_and_deadtime_register) - .clear(ossr) - .set(main_output_enable); // complementary channel stuff - } -} - -u32 volatile* setup(timer_reg_t* p_reg, int p_channel, bool p_is_advanced) -{ - static constexpr auto clock_division = bit_mask::from<8, 9>(); - static constexpr auto edge_aligned_mode = bit_mask::from<5, 6>(); - static constexpr auto direction = bit_mask::from<4>(); - - static constexpr auto output_compare_odd = bit_mask::from<4, 6>(); - static constexpr auto output_compare_even = bit_mask::from<12, 14>(); - static constexpr auto channel_output_select_odd = bit_mask::from<0, 1>(); - static constexpr auto channel_output_select_even = bit_mask::from<8, 9>(); - - static constexpr auto counter_enable = bit_mask::from<0>(); - static constexpr auto auto_reload_preload_enable = bit_mask::from<7>(); - static constexpr auto odd_channel_preload_enable = bit_mask::from<3>(); - static constexpr auto even_channel_preload_enable = bit_mask::from<11>(); - static constexpr auto ug_bit = bit_mask::from<0>(); - - // The PWM_MODE 1 makes it such that output will be high when Counter < CCR - constexpr auto pwm_mode_1 = 0b110U; - constexpr auto set_output = 0b00U; - - bit_modify(p_reg->control_register) - .insert(0b00U) - .insert(0b00U) - .clear(direction); - u32 volatile* compare_register = nullptr; - switch (p_channel) { - case 1: - // Preload enable must be done for corresponding OCxPE - bit_modify(p_reg->capture_compare_mode_register) - .insert(pwm_mode_1) - .insert(set_output) - .set(odd_channel_preload_enable); - compare_register = &p_reg->capture_compare_register; - break; - - case 2: - bit_modify(p_reg->capture_compare_mode_register) - .insert(pwm_mode_1) - .insert(set_output) - .set(even_channel_preload_enable); - compare_register = &p_reg->capture_compare_register_2; - break; - - case 3: - bit_modify(p_reg->capture_compare_mode_register_2) - .insert(pwm_mode_1) - .insert(set_output) - .set(odd_channel_preload_enable); - compare_register = &p_reg->capture_compare_register_3; - break; - - case 4: - bit_modify(p_reg->capture_compare_mode_register_2) - .insert(pwm_mode_1) - .insert(set_output) - .set(even_channel_preload_enable); - compare_register = &p_reg->capture_compare_register_4; - break; - default: - std::unreachable(); - } - - setup_channel(p_reg, p_channel, p_is_advanced); - bit_modify(p_reg->event_generator_register).set(ug_bit); - bit_modify(p_reg->control_register).set(counter_enable); - bit_modify(p_reg->control_register).set(auto_reload_preload_enable); - - // If the desired frequency is really low, and 16 bits are not enough - // to represent that, the prescalar value can be increased. Example: - // if prescalar = 2, 2 clock ticks would occur before incrementing - // the counter by 1. - p_reg->prescale_register = 0x0U; - - // The counter increments every clock cycle, and compares its value - // to the CCR to check whether the output should be high or low - p_reg->counter_register = 0x0U; - - // The ARR register is the top, once the counter reaches the ARR, - // it starts counting again. ARR can be increased on decreased - // depending on frequency. - p_reg->auto_reload_register = 0xFFFF; - - return compare_register; -} - -u32 volatile* common_setup(pwm_channel_info p_settings, timer_reg_t* p_reg) -{ - if (p_settings.channel <= 4) { - u32 volatile* p_compare_register_addr = - setup(p_reg, p_settings.channel, p_settings.is_advanced); - return p_compare_register_addr; - } else { - hal::safe_throw(hal::operation_not_supported(nullptr)); - } -} -} // namespace - -pwm::pwm(unsafe, void* p_reg, pwm_channel_info p_settings) - : m_reg(p_reg) -{ - timer_reg_t* reg = get_timer_reg(m_reg); - m_compare_register_addr = common_setup(p_settings, reg); -} - -void pwm::initialize(unsafe, void* p_reg, pwm_channel_info p_settings) -{ - m_reg = p_reg; - timer_reg_t* reg = get_timer_reg(m_reg); - m_compare_register_addr = common_setup(p_settings, reg); -} - -u32 pwm::frequency(u32 p_input_clock_frequency) -{ - timer_reg_t* reg = get_timer_reg(m_reg); - - // See page 419 in RM0008.pdf to find this equation: - // - // Bits 15:0 PSC[15:0]: Prescaler value - // The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1) - // - auto const prescale_value = reg->prescale_register + 1; - auto const prescaled_clock = p_input_clock_frequency / prescale_value; - auto const final_frequency = prescaled_clock / reg->auto_reload_register; - - return final_frequency; -} - -void pwm::duty_cycle(u16 p_duty_cycle) -{ - // the output changes from high to low when the counter > ccr, therefore, we - // simply make the CCR equal to the required duty cycle fraction of the ARR - // value. - timer_reg_t* reg = get_timer_reg(m_reg); - - auto const reload_value = static_cast(reg->auto_reload_register); - auto const upscaled_value = reload_value * p_duty_cycle; - auto const normalized_ccr_value = - upscaled_value / std::numeric_limits::max(); - - *m_compare_register_addr = normalized_ccr_value; -} - -pwm_group_frequency::pwm_group_frequency(hal::unsafe, void* p_reg) - : m_reg(p_reg) -{ -} - -void pwm_group_frequency::set_group_frequency(pwm_timer_frequency p_frequency) -{ - timer_reg_t* reg = get_timer_reg(m_reg); - - // Calculate new frequency - auto const [frequency, clock_frequency] = p_frequency; - if (frequency >= clock_frequency) { - safe_throw(hal::operation_not_supported(this)); - } - - auto const possible_prescaler_value = - (clock_frequency / (frequency * std::numeric_limits::max())); - - u16 prescale = 0; - u16 auto_reload = 0xFFFF; - - if (possible_prescaler_value > 0) { - // If the frequency is low enough, the prescale can be increased, which - // will take more time to reach the ARR value - prescale = possible_prescaler_value; - } else { - // The frequency is too high, so the ARR value needs to be reduced. - auto_reload = static_cast(clock_frequency / frequency); - } - - // =========================================================================== - // Updating all PWM duty cycles - // =========================================================================== - - // NOTE: The capture_compare_register only contain 16-bits of information so - // we can legally cast them to u16 and lose no information. - auto const capture1 = static_cast(reg->capture_compare_register); - auto const capture2 = static_cast(reg->capture_compare_register_2); - auto const capture3 = static_cast(reg->capture_compare_register_3); - auto const capture4 = static_cast(reg->capture_compare_register_4); - auto const previous_auto_reload = reg->auto_reload_register; - - // Duty_new = (Duty_prev / AutoReload_prev) * AutoReload_new; - // - // Can also be written as: - // - // Duty_new = (Duty_prev * AutoReload_new) / AutoReload_prev; - // - // We choose the 2nd option because we can perform the operations with - // integers without loss of precision. - - auto const new_capture1_upscaled = static_cast(capture1 * auto_reload); - auto const new_capture2_upscaled = static_cast(capture2 * auto_reload); - auto const new_capture3_upscaled = static_cast(capture3 * auto_reload); - auto const new_capture4_upscaled = static_cast(capture4 * auto_reload); - - auto const new_capture1 = (new_capture1_upscaled / previous_auto_reload); - auto const new_capture2 = (new_capture2_upscaled / previous_auto_reload); - auto const new_capture3 = (new_capture3_upscaled / previous_auto_reload); - auto const new_capture4 = (new_capture4_upscaled / previous_auto_reload); - - reg->capture_compare_register = new_capture1; - reg->capture_compare_register_2 = new_capture2; - reg->capture_compare_register_3 = new_capture3; - reg->capture_compare_register_4 = new_capture4; - - // Set the prescale & auto reload register - reg->prescale_register = prescale; - reg->auto_reload_register = auto_reload; -} -} // namespace hal::stm32_generic diff --git a/src/stm32_generic/quadrature_encoder.cpp b/src/stm32_generic/quadrature_encoder.cpp deleted file mode 100644 index d648f9f..0000000 --- a/src/stm32_generic/quadrature_encoder.cpp +++ /dev/null @@ -1,119 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include -#include - -#include "timer.hpp" - -namespace hal::stm32_generic { - -void setup_channel(int channel, timer_reg_t* p_reg) -{ - - constexpr auto odd_channel_input_mode = bit_mask::from<0, 1>(); - constexpr auto odd_channel_filter_select = bit_mask::from<4, 7>(); - - constexpr auto even_channel_input_mode = bit_mask::from<8, 9>(); - constexpr auto even_channel_filter_select = bit_mask::from<12, 15>(); - - constexpr auto input_select = 0b01U; - constexpr auto input_capture_filter = 0b0000U; - - // Select the TI1 and TI2 polarity by programming the CC1P and CC2P bits in - // the TIMx_CCER - // register. When needed, the user can program the input filter as well. - // find out which pin is what channel - switch (channel) { - case 1: - bit_modify(p_reg->capture_compare_mode_register) - .insert(input_select) - .insert(input_capture_filter); - break; - case 2: - bit_modify(p_reg->capture_compare_mode_register) - .insert(input_select) - .insert(input_capture_filter); - break; - default: - std::unreachable(); - } -} - -void setup_enable_register(int channel, timer_reg_t* p_reg) -{ - // The polarity pits is the second bit in a set of 4 bits per channel. - // Therefore if it is channel 1-> bit 1, channel 2-> bit->5. Application Note - // Pg: 353 - auto const polarity_start_pos = ((channel - 1) * 4) + 1; - - // Similar to polarity bits, capture_enable bits are the first bit in a set of - // 4 bits per channel. Application Note Pg: 353. - auto const input_capture_enable = ((channel - 1) * 4); - - auto const input_start_pos = bit_mask::from(input_capture_enable); - auto const polarity_inverted = bit_mask::from(polarity_start_pos); - - bit_modify(p_reg->cc_enable_register).clear(polarity_inverted); - bit_modify(p_reg->cc_enable_register).set(input_start_pos); -} - -quadrature_encoder::quadrature_encoder(hal::unsafe, - encoder_channels channels, - void* p_reg, - u32 p_pulses_per_rotation) -{ - initialize(hal::unsafe{}, channels, p_reg, p_pulses_per_rotation); -} -quadrature_encoder::quadrature_encoder(hal::unsafe) -{ -} -void quadrature_encoder::initialize(unsafe, - encoder_channels channels, - void* p_reg, - u32 p_pulses_per_rotation) -{ - m_reg = p_reg; - m_pulses_per_rotation = p_pulses_per_rotation; - timer_reg_t* timer_register = get_timer_reg(m_reg); - constexpr auto set_encoder_mode = bit_mask::from<0, 2>(); - // encoder counts up/down on only TI2FP1 level - constexpr auto encoder_mode_3 = 0b010U; - - setup_channel(channels.channel_a, timer_register); - setup_channel(channels.channel_b, timer_register); - setup_enable_register(channels.channel_a, timer_register); - setup_enable_register(channels.channel_b, timer_register); - timer_register->auto_reload_register = 0xFFFF; // Set max counter value - timer_register->counter_register = 0x8000; // Start at middle value - bit_modify(timer_register->peripheral_control_register) - .insert(encoder_mode_3); - constexpr auto counter_enable = bit_mask::from<0>(); - bit_modify(timer_register->control_register).set(counter_enable); -} -quadrature_encoder::read_t quadrature_encoder::driver_read() -{ - read_t reading; - timer_reg_t* timer_register = get_timer_reg(m_reg); - i32 diff_pulses = static_cast(timer_register->counter_register) - - 0x8000; // difference from start pos - // pulses * degrees / pulses = degrees. - reading.angle = - static_cast(diff_pulses) * (360 / m_pulses_per_rotation); - return reading; -} -} // namespace hal::stm32_generic diff --git a/src/stm32_generic/spi.cpp b/src/stm32_generic/spi.cpp deleted file mode 100644 index 8c9893a..0000000 --- a/src/stm32_generic/spi.cpp +++ /dev/null @@ -1,290 +0,0 @@ -#include - -#include -#include -#include - -namespace hal::stm32_generic { - -namespace { -struct spi_reg_t -{ - /*!< Offset: 0x000 Control Register 1 (R/W) */ - uint32_t volatile cr1; - /*!< Offset: 0x004 Control Register 2 (R/W) */ - uint32_t volatile cr2; - /*!< Offset: 0x008 Status Register (R/W) */ - uint32_t volatile sr; - /*!< Offset: 0x00C Data Register (R/W) */ - uint32_t volatile dr; - /*!< Offset: 0x010 CRC polynomial register (R/ ) */ - uint32_t const volatile crcpr; - /*!< Offset: 0x014 RX CRC register (R/W) */ - uint32_t volatile rxcrcr; - /*!< Offset: 0x018 TX CRC Register (R/W) */ - uint32_t volatile txcrcr; - /*!< Offset: 0x01C configuration register (R/W) */ - uint32_t volatile i2scfgr; - /*!< Offset: 0x020 prescaler register (R/W) */ - uint32_t volatile i2spr; -}; - -/// SPI Control Register 1 -struct control_register1 -{ - /// 0: first clock transistion is the first capture edge - /// 1: second clock transition is the first data capture edge - static constexpr auto clock_phase = bit_mask::from<0>(); - - /// 0: clock to 0 when idle - /// 1: clock to 1 when idle - static constexpr auto clock_polarity = bit_mask::from<1>(); - - /// 0: slave, 1: master - static constexpr auto master_selection = bit_mask::from<2>(); - - /// baudrate control: sets the clock rate to: - /// (peripheral clock frequency)/2**(n+1) - static constexpr auto baud_rate_control = bit_mask::from<5, 3>(); - - /// Peripheral Enable - /// 0: disable, 1: enable - static constexpr auto enable = bit_mask::from<6>(); - - /// Frame Format - /// 0: msb transmitted first - /// 1: lsb tranmitted first - static constexpr auto lsb_first = bit_mask::from<7>(); - - /// internal slave select - static constexpr auto internal_slave_select = bit_mask::from<8>(); - - /// Software slave management - /// 0: disable, 1: enable - static constexpr auto software_slave_management = bit_mask::from<9>(); - - /// Recieve only - /// 0: Full Duplex, 1: Output disable - static constexpr auto rx_only = bit_mask::from<10>(); - - /// Data frame format - /// 0: 8-bits, 1: 16-bit - static constexpr auto data_frame_format = bit_mask::from<11>(); - - /// CRC transfer next - /// 0: No CRC phase, 1: transfer CRC next - static constexpr auto crc_transfer_next = bit_mask::from<12>(); - - /// CRC enable - /// 0: disable, 1: enable - static constexpr auto crc_enable = bit_mask::from<13>(); - - /// Output enable in bidirectional mode - /// 0: output disabled, 1: output enable - static constexpr auto bidirectional_output_enable = bit_mask::from<14>(); - - /// Bidirectional data mode enable - /// 0: full-duplex, 1: half-duplex - static constexpr auto bidirectional_mode_enable = bit_mask::from<15>(); -}; - -/// SPI Control Register 2 -struct control_register2 -{ - /// Rx buffer DMA enable - static constexpr auto rx_dma_enable = bit_mask::from<0>(); - - /// Tx buffer DMA enable - static constexpr auto tx_dma_enable = bit_mask::from<1>(); - - /// Slave select output enable - /// 0: use a GPIO, 1: use the NSS pin - static constexpr auto slave_select_output_enable = bit_mask::from<2>(); - - /// Frame format - /// 0: Motorola mode, 1: TI mode - static constexpr auto frame_format = bit_mask::from<4>(); - - /// Error interupt enable - static constexpr auto error_interrupt_enable = bit_mask::from<5>(); - - /// Rx buffer empty interrupt enable - static constexpr auto rx_buffer_empty_interrupt_enable = bit_mask::from<6>(); - - /// Tx buffer empty interrupt enable - static constexpr auto tx_buffer_empty_interrupt_enable = bit_mask::from<7>(); -}; - -/// SPI Status Register -struct status_register -{ - /// Recieve buffer not empty - static constexpr auto rx_buffer_not_empty = bit_mask::from<0>(); - - /// Transmit buffer not empty - static constexpr auto tx_buffer_empty = bit_mask::from<1>(); - - /// Channel side (i2s only) - /// 0: left has been transmitted/received - /// 1: right has been transmitted/received - [[maybe_unused]] static constexpr auto i2s_channel_side = bit_mask::from<2>(); - - /// Underrun flag - [[maybe_unused]] static constexpr auto underrun_flag = bit_mask::from<3>(); - - /// CRC error flag - [[maybe_unused]] static constexpr auto crc_error_flag = bit_mask::from<4>(); - - /// Mode fault flag - [[maybe_unused]] static constexpr auto mode_fault_flag = bit_mask::from<5>(); - - /// Overrun flag - [[maybe_unused]] static constexpr auto overrun_flag = bit_mask::from<6>(); - - /// Busy flag - static constexpr auto busy_flag = bit_mask::from<7>(); - - /// frame format error flag - [[maybe_unused]] static constexpr auto frame_format_error_flag = - bit_mask::from<8>(); -}; - -/** - * @brief Convert a void* to an spi_reg_t for use in the driver. - * - * @param p_address - the address of the peripheral. If the address is outside - * of valid memory, then the driver will trigger an ARM Cortex Memory Fault - * Exception. If the address points to valid memory that is not an spi - * peripheral, then using the result of this function is UB. - * @return spi_reg_t& - reference to an spi register map pointed to by p_address - */ -spi_reg_t& to_reg(void* p_address) -{ - return *reinterpret_cast(p_address); -} - -inline bool busy(spi_reg_t& p_reg) -{ - return bit_extract(p_reg.sr); -} -inline bool tx_empty(spi_reg_t& p_reg) -{ - return bit_extract(p_reg.sr); -} -inline bool rx_not_empty(spi_reg_t& p_reg) -{ - return bit_extract(p_reg.sr); -} -} // namespace - -spi::spi(hal::unsafe, void* p_peripheral_address) - : m_peripheral_address(p_peripheral_address) -{ -} - -spi::~spi() -{ - auto& reg = to_reg(m_peripheral_address); - bit_modify(reg.cr1).clear(); -} - -void spi::configure(hal::spi::settings const& p_settings, - hal::hertz p_peripheral_clock_speed) -{ - using namespace hal::literals; - - auto& reg = to_reg(m_peripheral_address); - - auto const clock_divider = p_peripheral_clock_speed / p_settings.clock_rate; - auto prescaler = static_cast(clock_divider); - - if (prescaler <= 1) { - prescaler = 2; - } else if (prescaler > 256) { - hal::safe_throw(hal::operation_not_supported(this)); - } - - uint16_t baud_control = 15 - std::countl_zero(prescaler); - if (std::has_single_bit(prescaler)) { - baud_control--; - } - - bit_modify(reg.cr2) - .clear() - .clear() - // We set `slave_select_output_enable` because it is required for master - // mode to work. - .set() - .clear() - .clear() - .clear() - .clear(); - - bit_modify(reg.cr1) - .clear() - .clear() - .clear() - .clear() - .clear() - .clear() - .clear() - .insert(baud_control) - .insert(p_settings.clock_phase) - .insert(p_settings.clock_polarity) - .set() // same as disabled - .set() - .set() - .set(); -} - -void spi::transfer(std::span p_data_out, - std::span p_data_in, - hal::byte p_filler) -{ - auto& reg = to_reg(m_peripheral_address); - size_t max_length = std::max(p_data_in.size(), p_data_out.size()); - - // NOTE: This is a paranoid check to determine that there is no bus activity - // before proceeding - while (busy(reg)) { - continue; - } - - // The stm's spi driver needs to be internally told that it is selecting a - // device before it will emit anything on the pins. This will control the NSS - // pin if it is selected, otherwise, its just an internal enable signal. - bit_modify(reg.cr1).clear(); - - for (size_t index = 0; index < max_length; index++) { - hal::byte byte = 0; - - if (index < p_data_out.size()) { - byte = p_data_out[index]; - } else { - byte = p_filler; - } - - while (not tx_empty(reg)) { - continue; - } - - reg.dr = byte; - - while (not rx_not_empty(reg)) { - continue; - } - - byte = static_cast(reg.dr); - if (index < p_data_in.size()) { - p_data_in[index] = byte; - } - } - - bit_modify(reg.cr1).set(); - - // Wait for bus activity to cease before leaving the function - while (busy(reg)) { - continue; - } -} -} // namespace hal::stm32_generic diff --git a/src/stm32_generic/timer.cpp b/src/stm32_generic/timer.cpp deleted file mode 100644 index b819933..0000000 --- a/src/stm32_generic/timer.cpp +++ /dev/null @@ -1,129 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include -#include - -#include "timer.hpp" - -namespace hal::stm32_generic { - -namespace { - -void setup(timer_reg_t* p_reg) -{ - static constexpr auto auto_reload_preload_enable = hal::bit_mask::from(7); - static constexpr auto one_pulse_mode = hal::bit_mask::from(3); - static constexpr auto update_request_source = hal::bit_mask::from(2); - static constexpr auto update_interrupt_enable = hal::bit_mask::from(0); - - bit_modify(p_reg->control_register) - .set(auto_reload_preload_enable) - .set(one_pulse_mode) - .set(update_request_source); - - bit_modify(p_reg->interrupt_enable_register).set(update_interrupt_enable); -} - -} // namespace - -timer::timer(hal::unsafe) -{ -} - -bool timer::is_running() -{ - constexpr auto counter_enable = hal::bit_mask::from(0); - auto reg = get_timer_reg(m_reg); - - return (bit_extract(reg->control_register)); -} - -void timer::cancel() -{ - constexpr auto counter_enable = hal::bit_mask::from(0); - auto reg = get_timer_reg(m_reg); - - bit_modify(reg->control_register).clear(counter_enable); -} - -void timer::schedule(hal::time_duration p_delay, u32 p_timer_clock_frequency) -{ - timer::cancel(); - - constexpr auto counter_enable = hal::bit_mask::from(0); - constexpr auto update_generation = hal::bit_mask::from(0); - constexpr auto prescaler = hal::bit_mask::from(0, 15); - constexpr auto auto_reload_value = hal::bit_mask::from(0, 15); - constexpr auto counter = hal::bit_mask::from(0, 15); - - auto reg = get_timer_reg(m_reg); - - constexpr u32 scale_factor = decltype(p_delay)::period::den; - constexpr u16 prescaler_max_value = std::numeric_limits::max(); - constexpr u16 timer_max_ticks = std::numeric_limits::max(); - constexpr u16 timer_reset_value = 0; - - u32 const time_per_tick_ns = scale_factor / p_timer_clock_frequency; - // Check if CPU Frequency too fast - if (time_per_tick_ns == 0) { - safe_throw(hal::argument_out_of_domain(this)); - } - // Use 64-bit to prevent immediate overflow. If still too big after division, - // exception thrown. - u64 const ticks_required = p_delay.count() / time_per_tick_ns; - u64 const prescaler_value = ticks_required / timer_max_ticks; - if (prescaler_value > prescaler_max_value) { - safe_throw(hal::argument_out_of_domain(this)); - } - - u16 prescaler_ticks_required; - // When the delay amount is shorter than one clock cycle - if (ticks_required == 0) { - prescaler_ticks_required = 1; - } else { - u32 const prescaler_frequency = - p_timer_clock_frequency / (static_cast(prescaler_value) + 1); - u32 const prescaler_time_per_tick_ns = scale_factor / prescaler_frequency; - prescaler_ticks_required = p_delay.count() / prescaler_time_per_tick_ns; - } - - bit_modify(reg->prescale_register) - .insert(static_cast(prescaler_value)); - bit_modify(reg->auto_reload_register) - .insert(prescaler_ticks_required); - bit_modify(reg->counter_register).insert(timer_reset_value); - bit_modify(reg->event_generator_register).set(update_generation); - bit_modify(reg->control_register).set(counter_enable); -} - -void timer::initialize(hal::unsafe, - void* p_peripheral_address, - void (*initialize_interrupts_function)(), - cortex_m::irq_t p_irq, - cortex_m::interrupt_pointer p_handler) -{ - m_reg = p_peripheral_address; - initialize_interrupts_function(); - if (hal::cortex_m::is_interrupt_enabled(p_irq)) { - hal::safe_throw(hal::device_or_resource_busy(this)); - } - cortex_m::enable_interrupt(p_irq, p_handler); - timer_reg_t* reg = get_timer_reg(m_reg); - setup(reg); -} -} // namespace hal::stm32_generic diff --git a/src/stm32_generic/timer.hpp b/src/stm32_generic/timer.hpp deleted file mode 100644 index 50543bc..0000000 --- a/src/stm32_generic/timer.hpp +++ /dev/null @@ -1,68 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -namespace hal::stm32_generic { - -struct timer_reg_t -{ - /// Offset: 0x00 Control Register (R/W) - hal::u32 volatile control_register; // sets up timers - /// Offset: 0x04 Control Register 2 (R/W) - hal::u32 volatile control_register_2; - /// Offset: 0x08 Peripheral Mode Control Register (R/W) - hal::u32 volatile peripheral_control_register; - /// Offset: 0x0C DMA/Interrupt enable register (R/W) - hal::u32 volatile interrupt_enable_register; - /// Offset: 0x10 Status Register register (R/W) - hal::u32 volatile status_register; - /// Offset: 0x14 Event Generator Register register (R/W) - hal::u32 volatile event_generator_register; - /// Offset: 0x18 Capture/Compare mode register (R/W) - hal::u32 volatile capture_compare_mode_register; // set up modes for - // channel - /// Offset: 0x1C Capture/Compare mode register (R/W) - hal::u32 volatile capture_compare_mode_register_2; - /// Offset: 0x20 Capture/Compare Enable register (R/W) - hal::u32 volatile cc_enable_register; - /// Offset: 0x24 Counter (R/W) - hal::u32 volatile counter_register; - /// Offset: 0x28 Prescalar (R/W) - hal::u32 volatile prescale_register; - /// Offset: 0x2C Auto Reload Register (R/W) - hal::u32 volatile auto_reload_register; // affects frequency - /// Offset: 0x30 Repetition Counter Register (R/W) - hal::u32 volatile repetition_counter_register; - /// Offset: 0x34 Capture Compare Register (R/W) - hal::u32 volatile capture_compare_register; // affects duty cycles - /// Offset: 0x38 Capture Compare Register (R/W) - hal::u32 volatile capture_compare_register_2; - // Offset: 0x3C Capture Compare Register (R/W) - hal::u32 volatile capture_compare_register_3; - // Offset: 0x40 Capture Compare Register (R/W) - hal::u32 volatile capture_compare_register_4; - /// Offset: 0x44 Break and dead-time register - hal::u32 volatile break_and_deadtime_register; - /// Offset: 0x48 DMA control register - hal::u32 volatile dma_control_register; - /// Offset: 0x4C DMA address for full transfer - hal::u32 volatile dma_address_register; -}; - -[[nodiscard]] inline timer_reg_t* get_timer_reg(void* p_reg) -{ - return reinterpret_cast(p_reg); -} -} // namespace hal::stm32_generic diff --git a/src/stm32_generic/uart.cpp b/src/stm32_generic/uart.cpp deleted file mode 100644 index 71fcd1e..0000000 --- a/src/stm32_generic/uart.cpp +++ /dev/null @@ -1,202 +0,0 @@ -#include - -#include -#include - -#include -#include -#include -#include - -namespace hal::stm32_generic { - -/// Namespace for the status registers (SR) bit masks -struct status_reg // NOLINT -{ - /// Indicates if the transmit data register is empty and can be loaded with - /// another byte. - static constexpr auto transit_empty = hal::bit_mask::from<7>(); -}; - -/// Namespace for the control registers (CR1, CR3) bit masks and predefined -/// settings constants. -struct control_reg // NOLINT -{ - /// When this bit is cleared the USART prescalers and outputs are stopped - /// and the end of the current byte transfer in order to reduce power - /// consumption. (CR1) - static constexpr auto usart_enable = hal::bit_mask::from<13>(); - - /// Enables DMA receiver (CR3) - static constexpr auto dma_receiver_enable = hal::bit_mask::from<6>(); - - /// This bit enables the transmitter. (CR1) - static constexpr auto transmitter_enable = hal::bit_mask::from<3>(); - - /// This bit enables the receiver. (CR1) - static constexpr auto receive_enable = hal::bit_mask::from<2>(); - - /// Enable USART + Enable Receive + Enable Transmitter - static constexpr auto control_settings1 = - hal::bit_value(0UL) - .set() - .set() - .set() - .to(); - - /// Make sure that DMA is enabled for receive only - static constexpr auto control_settings3 = - hal::bit_value(0UL) - .set() - .to(); -}; - -/// Namespace for the baud rate (BRR) registers bit masks -struct baud_rate_reg // NOLINT -{ - /// Mantissa of USART DIV - static constexpr auto mantissa = hal::bit_mask::from<4, 15>(); - - /// Fraction of USART DIV - static constexpr auto fraction = hal::bit_mask::from<0, 3>(); -}; - -struct usart_t -{ - std::uint32_t volatile status; - std::uint32_t volatile data; - std::uint32_t volatile baud_rate; - std::uint32_t volatile control1; - std::uint32_t volatile control2; - std::uint32_t volatile control3; - std::uint32_t volatile guard_time_and_prescale; -}; - -inline usart_t* to_usart(void* p_uart) -{ - return reinterpret_cast(p_uart); -} - -uart::uart(void* p_uart, std::span p_receive_buffer) - : m_uart(p_uart) - , m_receive_buffer(p_receive_buffer) - , m_read_index(0) -{ -} - -void uart::configure_baud_rate(hal::hertz p_frequency, - serial::settings const& p_settings) -{ - auto const clock_frequency = p_frequency; - float usart_divider = clock_frequency / (16.0f * p_settings.baud_rate); - - // Truncate off the decimal values - auto mantissa = static_cast(usart_divider); - - // Subtract the whole number to leave just the decimal - auto fraction = - static_cast(usart_divider - static_cast(mantissa)); - - auto fractional_int = static_cast(std::roundf(fraction * 16)); - - if (fractional_int >= 16) { - mantissa = static_cast(mantissa + 1U); - fractional_int = 0; - } - - to_usart(m_uart)->baud_rate = - hal::bit_value() - .insert(mantissa) - .insert(fractional_int) - .to(); -} - -void uart::configure_format(serial::settings const& p_settings) -{ - constexpr auto parity_selection = bit_mask::from<9>(); - constexpr auto parity_control = bit_mask::from<10>(); - constexpr auto word_length = bit_mask::from<12>(); - constexpr auto stop = bit_mask::from<12, 13>(); - - bool parity_enable = (p_settings.parity != serial::settings::parity::none); - bool parity = (p_settings.parity == serial::settings::parity::odd); - bool double_stop = (p_settings.stop == serial::settings::stop_bits::two); - std::uint16_t stop_value = (double_stop) ? 0b10U : 0b00U; - - // Parity codes are: 0 for Even and 1 for Odd, thus the expression above - // sets the bool to TRUE when odd and zero when something else. This value - // is ignored if the parity is NONE since parity_enable will be zero. - auto& uart_reg = *to_usart(m_uart); - bit_modify(uart_reg.control1) - .insert(parity_enable) - .insert(parity) - .insert(0U); - - bit_modify(uart_reg.control2).insert(stop_value); -} - -void uart::configure(serial::settings const& p_settings, hertz p_frequency) -{ - auto& uart_reg = *to_usart(m_uart); - uart_reg.control1 = control_reg::control_settings1; - - // NOTE: We leave control settings 2 alone as it is for features beyond - // basic UART such as USART clock, USART port network (LIN), and other - // things. - - uart_reg.control3 = control_reg::control_settings3; - configure_baud_rate(p_frequency, p_settings); - configure_format(p_settings); -} -// TODO(#86) Add DMA write support to stm32_generic/uart.cpp -serial::write_t uart::uart_write(std::span p_data) -{ - auto& uart_reg = *to_usart(m_uart); - - for (auto const& byte : p_data) { - while (not bit_extract(uart_reg.status)) { - continue; - } - // Load the next byte into the data register - uart_reg.data = byte; - } - - return { - .data = p_data, - }; -} - -serial::read_t uart::uart_read(std::span& p_data, - std::uint32_t const& p_dma_cursor_position) -{ - size_t count = 0; - - for (auto& byte : p_data) { - if (m_read_index == p_dma_cursor_position) { - break; - } - byte = m_receive_buffer[m_read_index++]; - m_read_index = m_read_index % m_receive_buffer.size(); - count++; - } - - return { - .data = p_data.first(count), - .available = 1, - .capacity = m_receive_buffer.size(), - }; -} -uint32_t volatile* uart::data_register() -{ - return &to_usart(m_uart)->data; -} -void uart::flush(std::uint32_t p_dma_cursor_position) -{ - m_read_index = p_dma_cursor_position; -} - -std::uint32_t uart::buffer_size() -{ - return m_receive_buffer.size(); -} -} // namespace hal::stm32_generic diff --git a/src/stm32f1/adc.cpp b/src/stm32f1/adc.cpp deleted file mode 100644 index 07f86f1..0000000 --- a/src/stm32f1/adc.cpp +++ /dev/null @@ -1,345 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "pin.hpp" -#include "power.hpp" - -namespace hal::stm32f1 { -namespace { -/// adc register map -struct adc_reg_t -{ - /// Number of injected channels - static constexpr size_t injected_channel_length = 4; - /// Offset: 0x00 A/D Status Register (RC/W0) - hal::u32 volatile status; - /// Offset: 0x04 A/D Control Register 1 (R/W) - hal::u32 volatile control_1; - /// Offset: 0x08 A/D Control Register 2 (R/W) - hal::u32 volatile control_2; - /// Offset: 0x0C A/D Sample Time Register 1 (R/W) - hal::u32 volatile sample_time_1; - /// Offset: 0x10 A/D Sample Time Register 2 (R/W) - hal::u32 volatile sample_time_2; - /// Offset: 0x14-0x20 A/D Injected Channel 0..3 Data Offset Register (R/W) - std::array - injected_channel_data_offset; - /// Offset: 0x24 A/D Watchdog High Treshold Register (R/W) - hal::u32 volatile watchdog_high_threshold; - /// Offset: 0x28 A/D Watchdog Low Treshold Register (R/W) - hal::u32 volatile watchdog_low_threshold; - /// Offset: 0x2C A/D Regular Sequence Register 1 (R/W) - hal::u32 volatile regular_sequence_1; - /// Offset: 0x30 A/D Regular Sequence Register 2 (R/W) - hal::u32 volatile regular_sequence_2; - /// Offset: 0x34 A/D Regular Sequence Register 3 (R/W) - hal::u32 volatile regular_sequence_3; - /// Offset: 0x38 A/D Injected Sequence Register (R/W) - hal::u32 volatile injected_sequence; - /// Offset: 0x3C-0x48 A/D Injected Data Register 0..3 (R/ ) - std::array injected_data; - /// Offset: 0x4C A/D Regular Data Register (R/ ) - hal::u32 volatile regular_data; -}; - -/// Namespace containing the bit_mask objects that are use to manipulate the -/// stm32f1 ADC Status register. -namespace adc_status_register { -/// This bit is set by hardware when the converted voltage crosses the values -/// programmed in the ADC_LTR and ADC_HTR registers. It is cleared by software. -[[maybe_unused]] static constexpr auto analog_watchdog_flag = - hal::bit_mask::from(0); - -/// This bit is set by hardware at the end of a group channel conversion -/// (regular or injected). It is cleared by software or by reading the ADC_DR. -static constexpr auto end_of_conversion = hal::bit_mask::from(1); - -/// This bit is set by hardware at the end of all injected group channel -/// conversion. It is cleared by software. -[[maybe_unused]] static constexpr auto injected_channel_end_of_conversion = - hal::bit_mask::from(2); - -/// This bit is set by hardware when injected channel conversion starts. It is -/// cleared by software. -[[maybe_unused]] static constexpr auto injected_channel_start_flag = - hal::bit_mask::from(3); - -/// This bit is set by hardware when regular channel conversion starts. It is -/// cleared by software. -[[maybe_unused]] static constexpr auto regular_channel_start_flag = - hal::bit_mask::from(4); -}; // namespace adc_status_register - -/// Namespace containing the bit_mask objects that are use to manipulate the -/// stm32f1 ADC Control register 2. -namespace adc_control_register_2 { -/// This bit is set and cleared by software. If this bit holds a value of zero -/// and a 1 is written to it then it wakes up the ADC from Power Down state. -/// Conversion starts when this bit holds a value of 1 and a 1 is written to it. -/// The application should allow a delay of tSTAB between power up and start of -/// conversion. Refer to Figure 23. -/// 0: Disable ADC conversion/calibration and go to power down mode. -/// 1: Enable ADC and to start conversion -/// Note: If any other bit in this register apart from ADON is changed at the -/// same time, then conversion is not triggered. This is to prevent triggering -/// an erroneous conversion. -static constexpr auto ad_converter_on = hal::bit_mask::from(0); - -/// This bit is set and cleared by software. If set conversion takes place -/// continuously till this bit is reset. -[[maybe_unused]] static constexpr auto continuous_conversion = - hal::bit_mask::from(1); - -/// This bit is set by software to start the calibration. It is reset by -/// hardware after calibration is complete. -static constexpr auto ad_calibration = hal::bit_mask::from(2); - -/// This bit is set by software and cleared by hardware, and is used to reset -/// the ADC calibration. It is cleared after the calibration registers are -/// initialized. -[[maybe_unused]] static constexpr auto reset_calibration = - hal::bit_mask::from(3); - -/// This bit is set and cleared by software to enable or disable DMA mode. If -/// its 0 then its disabled, and if its 1 then its enabled. -[[maybe_unused]] static constexpr auto direct_memory_access_mode = - hal::bit_mask::from(8); - -/// This bit is set and cleared by software to determine which data alignment to -/// use. If its 0 then its right-aligned, if its 1 then its left-aligned. -[[maybe_unused]] static constexpr auto data_alignment = hal::bit_mask::from(11); - -/// These bits select the external event used to trigger the start of conversion -/// of an injected group. -[[maybe_unused]] static constexpr auto external_event_select_injected_group = - hal::bit_mask::from(12, 14); - -/// This bit is set and cleared by software to enable/disable the external -/// trigger used to start conversion of an injected channel group. -[[maybe_unused]] static constexpr auto - external_trigger_conversion_mode_injected_channels = hal::bit_mask::from(15); - -/// These bits select the external event used to trigger the start of conversion -/// of a regular group. -[[maybe_unused]] static constexpr auto external_event_select_regular_group = - hal::bit_mask::from(17, 19); - -/// This bit is set and cleared by software to enable/disable the external -/// trigger used to start conversion of a regular channel group. -[[maybe_unused]] static constexpr auto - external_trigger_conversion_mode_regular_channel = hal::bit_mask::from(20); - -/// This bit is set by software and cleared by software or by hardware as soon -/// as the conversion starts. It starts a conversion of a group of injected -/// channels (if JSWSTART is selected as trigger event by the JEXTSEL[2:0] bits. -[[maybe_unused]] static constexpr auto start_conversion_injected_channels = - hal::bit_mask::from(21); - -/// This bit is set by software to start conversion and cleared by hardware as -/// soon as conversion starts. It starts a conversion of a group of regular -/// channels if SWSTART is selected as trigger event by the EXTSEL[2:0] bits. -[[maybe_unused]] static constexpr auto start_conversion_regular_channels = - hal::bit_mask::from(22); - -/// This bit is set and cleared by software to enable/disable the temperature -/// sensor and VREFINT channel. In devices with dual ADCs this bit is present -/// only in ADC1. -[[maybe_unused]] static constexpr auto - temperature_sensor_and_reference_voltage_enable = hal::bit_mask::from(23); -}; // namespace adc_control_register_2 - -/// Namespace containing the bit_mask objects that are use to manipulate the -/// stm32f1 ADC Regular Sequence register 3. -namespace adc_regular_sequence_register_3 { -/// First channel conversion in regular sequence. -static constexpr auto first_conversion = hal::bit_mask::from(0, 4); - -/// Second channel conversion in regular sequence. -[[maybe_unused]] static constexpr auto second_conversion = - hal::bit_mask::from(5, 9); - -/// Third channel conversion in regular sequence. -[[maybe_unused]] static constexpr auto third_conversion = - hal::bit_mask::from(10, 14); - -/// Fourth channel conversion in regular sequence. -[[maybe_unused]] static constexpr auto fourth_conversion = - hal::bit_mask::from(15, 19); - -/// Fifth channel conversion in regular sequence. -[[maybe_unused]] static constexpr auto fifth_conversion = - hal::bit_mask::from(20, 24); - -/// Sixth channel conversion in regular sequence. -[[maybe_unused]] static constexpr auto sixth_conversion = - hal::bit_mask::from(25, 29); -}; // namespace adc_regular_sequence_register_3 - -/// Namespace containing the bit_mask objects that are use to manipulate the -/// stm32f1 ADC Regular Data register. -namespace adc_regular_data_register { -/// These bits are read only. They contain the conversion result from the -/// regular channels. The data is left or right-aligned depending on bit 11 in -/// ADC_CR2. -static constexpr auto regular_data = hal::bit_mask::from(0, 15); - -/// In ADC1: In dual mode, these bits contain the regular data of ADC2. Refer to -/// Section 11.9: Dual ADC mode. -/// In ADC2 and ADC3: these bits are not used. -[[maybe_unused]] static constexpr auto dual_mode_data = - hal::bit_mask::from(16, 31); -}; // namespace adc_regular_data_register - -adc_reg_t& to_reg(void* p_address) -{ - return *reinterpret_cast(p_address); -} - -pin_select to_pin_select(adc_pins const& p_pin) -{ - // Derive port and pin from the enum. - hal::u8 port = 0, pin = 0; - if (hal::value(p_pin) <= 7) { - port = 'A'; - pin = hal::value(p_pin); - } else if (hal::value(p_pin) <= 9) { - port = 'B'; - pin = hal::value(p_pin) - 8; - } else { - port = 'C'; - pin = hal::value(p_pin) - 10; - } - return { .port = port, .pin = pin }; -} -} // namespace - -adc_manager::adc_manager(peripheral p_id, hal::basic_lock& p_lock) - : m_lock(&p_lock) - , m_reg(nullptr) - , m_id(p_id) -{ - switch (p_id) { - case peripheral::adc1: - // NOLINTNEXTLINE(performance-no-int-to-ptr) - m_reg = reinterpret_cast(0x4001'2400UL); - break; - case peripheral::adc2: - // NOLINTNEXTLINE(performance-no-int-to-ptr): Need - m_reg = reinterpret_cast(0x4001'2800UL); - break; - default: - hal::safe_throw(hal::argument_out_of_domain(this)); - break; - } - - auto& adc_reg = to_reg(m_reg); - - // Verify adc's clock is not higher than the maximum frequency. - auto const adc_frequency = frequency(m_id); - if (adc_frequency > 14.0_MHz) { - hal::safe_throw(hal::operation_not_supported(nullptr)); - } - - // Power on adc clock. - power_on(m_id); - - // Turns on and calibrates the adc only if its the first time power-on. This - // is to prevent accidentally toggling the start of a new conversion as it - // uses the same bit. - if (not bit_extract( - adc_reg.control_2)) { - // Power on the adc. - hal::bit_modify(adc_reg.control_2) - .set(); - - // Start adc calibration. ADC must have been in power-on state for a minimum - // of 2 clock cycles before starting calibration. - hal::bit_modify(adc_reg.control_2) - .set(); - - // Wait for calibration to complete. - while ( - bit_extract(adc_reg.control_2)) { - continue; - } - } -} -adc_manager::channel adc_manager::acquire_channel(adc_pins p_pin) -{ - return { *this, p_pin }; -} - -float adc_manager::read_channel(adc_pins p_pin) -{ - // Lock the lock. - std::lock_guard acquire_lock(*m_lock); - - auto& adc_reg = to_reg(m_reg); - // Set the specified channel to be sampled. - hal::bit_modify(adc_reg.regular_sequence_3) - .insert( - hal::value(p_pin)); - - // Start adc conversion. - hal::bit_modify(adc_reg.control_2) - .set(); - - // Wait for conversion to complete. - while ( - not bit_extract(adc_reg.status)) { - continue; - } - - auto constexpr full_scale_max = bit_limits<12, size_t>::max(); - auto constexpr full_scale_float = static_cast(full_scale_max); - // Read sample from peripheral's memory. - auto const sample_integer = - hal::bit_extract( - adc_reg.regular_data); - auto const sample = static_cast(sample_integer); - return sample / full_scale_float; -} - -adc_manager::channel::channel(adc_manager& p_manager, adc_pins p_pin) - : m_manager(&p_manager) - , m_pin(p_pin) -{ - // Set specified pin to analog input mode. - configure_pin(to_pin_select(m_pin), input_analog); -} - -float adc_manager::channel::driver_read() -{ - return m_manager->read_channel(m_pin); -} - -adc_manager::channel::~channel() -{ - reset_pin(to_pin_select(m_pin)); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/can.cpp b/src/stm32f1/can.cpp deleted file mode 100644 index bf36cbd..0000000 --- a/src/stm32f1/can.cpp +++ /dev/null @@ -1,1261 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "can_reg.hpp" -#include "pin.hpp" -#include "power.hpp" - -// This is needed to allow backwards compatibility with previous versions of the -// can APIs. -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wdeprecated-declarations" - -namespace hal::stm32f1 { -namespace { -/// Enable/Disable controller modes -/// -/// @param mode - which mode to enable/disable -/// @param enable_mode - true if you want to enable the mode. False otherwise. -void set_master_mode(bit_mask p_mode, bool p_enable_mode) -{ - bit_modify(can1_reg->MCR).insert(p_mode, p_enable_mode); -} - -bool get_master_status(bit_mask p_mode) -{ - return bit_extract(p_mode, can1_reg->MSR); -} - -void enter_initialization() -{ - // Enter Initialization mode in order to write to CAN registers. - set_master_mode(master_control::initialization_request, true); - - // Wait to enter Initialization mode - while (not get_master_status(master_status::initialization_acknowledge)) { - continue; - } -} - -void exit_initialization() -{ - // Leave Initialization mode - set_master_mode(master_control::initialization_request, false); - - // Wait to leave initialization mode - while (get_master_status(master_status::initialization_acknowledge)) { - continue; - } -} - -void timed_exit_initialization(hal::steady_clock& p_clock, - hal::time_duration p_timeout_time) -{ - // Leave Initialization mode - set_master_mode(master_control::initialization_request, false); - - auto const deadline = hal::future_deadline(p_clock, p_timeout_time); - while (deadline > p_clock.uptime()) { - if (not get_master_status(master_status::initialization_acknowledge)) { - return; - } - } - hal::safe_throw(hal::timed_out(nullptr)); -} - -void configure_baud_rate(hal::u32 p_baud_rate) -{ - auto const can_frequency = frequency(peripheral::can1); - auto const valid_divider = - calculate_can_bus_divider(can_frequency, static_cast(p_baud_rate)); - - if (not valid_divider) { - hal::safe_throw(hal::operation_not_supported(nullptr)); - } - - auto const divisors = valid_divider.value(); - - auto const prescale = divisors.clock_divider - 1U; - auto const sync_jump_width = divisors.synchronization_jump_width - 1U; - - auto phase_segment1 = - (divisors.phase_segment1 + divisors.propagation_delay) - 1U; - auto phase_segment2 = divisors.phase_segment2 - 1U; - - constexpr auto segment2_bit_limit = - hal::bit_limits::max(); - - // Check if phase segment 2 does not fit - if (phase_segment2 > segment2_bit_limit) { - // Take the extra time quanta and add it to the phase 1 segment - auto const phase_segment2_remainder = phase_segment2 - segment2_bit_limit; - phase_segment1 += phase_segment2_remainder; - // Cap phase segment 2 to the max available in the bit field - phase_segment2 = segment2_bit_limit; - } - - bit_modify(can1_reg->BTR) - .insert(prescale) - .insert(phase_segment1) - .insert(phase_segment2) - .insert(sync_jump_width) - .clear(); -} - -void set_filter_bank_mode(filter_bank_master_control p_mode) -{ - bit_modify(can1_reg->FMR) - .insert(hal::value(p_mode)); -} - -void set_filter_type(hal::u8 p_filter, filter_type p_filter_type) -{ - auto const filter_bit_mask = bit_mask::from(p_filter); - bit_modify(can1_reg->FM1R).insert(filter_bit_mask, hal::value(p_filter_type)); -} - -void set_filter_scale(hal::u8 p_filter, filter_scale p_scale) -{ - auto const filter_bit_mask = bit_mask::from(p_filter); - bit_modify(can1_reg->FS1R).insert(filter_bit_mask, hal::value(p_scale)); -} - -void set_filter_fifo_assignment(hal::u8 p_filter, - can_peripheral_manager::fifo_assignment p_fifo) -{ - auto const filter_bit_mask = bit_mask::from(p_filter); - bit_modify(can1_reg->FFA1R).insert(filter_bit_mask, hal::value(p_fifo)); -} - -void set_filter_activation_state(hal::u8 p_filter, filter_activation p_state) -{ - auto const filter_bit_mask = bit_mask::from(p_filter); - bit_modify(can1_reg->FA1R).insert(filter_bit_mask, hal::value(p_state)); -} - -void allow_all_acceptance_filter() -{ - // Activate filter initialization mode (Set bit) - set_filter_bank_mode(filter_bank_master_control::initialization); - - // Deactivate filter 0 (Clear bit) - set_filter_activation_state(0, filter_activation::not_active); - - // Configure filter 0 to single 32-bit scale configuration (Set bit) - set_filter_scale(0, filter_scale::single_32_bit_scale); - - // Set ID and mask to 0, where a mask value of 0 means accept any message. - can1_reg->filter_registers[0].FR1 = 0; - can1_reg->filter_registers[0].FR2 = 0; - - // Set filter to mask mode - set_filter_type(0, filter_type::mask); - - // Assign filter 0 to FIFO 0 (Clear bit) - set_filter_fifo_assignment(0, can_peripheral_manager::fifo_assignment::fifo1); - - // Activate filter 0 (Set bit) - set_filter_activation_state(0, filter_activation::active); - - // Deactivate filter initialization mode (clear bit) - set_filter_bank_mode(filter_bank_master_control::active); -} - -struct can_data_registers_t -{ - /// TFI register contents - uint32_t frame = 0; - /// TID register contents - uint32_t id = 0; - /// TDA register contents - uint32_t data_a = 0; - /// TDB register contents - uint32_t data_b = 0; -}; - -/// Converts desired message to the CANx registers -can_data_registers_t convert_message_to_stm_can( - hal::can::message_t const& message) -{ - can_data_registers_t registers; - - auto frame_info = - bit_value(0U) - .insert(message.length) - .to(); - - uint32_t frame_id = 0; - - if (message.id >= (1UL << 11UL)) { - frame_id = - bit_value(0U) - .insert(true) - .insert(message.is_remote_request) - .insert( - value(mailbox_identifier::id_type::extended)) - .insert(message.id) - .to(); - } else { - frame_id = - bit_value(0U) - .insert(true) - .insert(message.is_remote_request) - .insert( - value(mailbox_identifier::id_type::standard)) - .insert(message.id) - .to(); - } - - uint32_t data_a = 0; - data_a |= message.payload[0] << (0 * 8); - data_a |= message.payload[1] << (1 * 8); - data_a |= message.payload[2] << (2 * 8); - data_a |= message.payload[3] << (3 * 8); - - uint32_t data_b = 0; - data_b |= message.payload[4] << (0 * 8); - data_b |= message.payload[5] << (1 * 8); - data_b |= message.payload[6] << (2 * 8); - data_b |= message.payload[7] << (3 * 8); - - registers.frame = frame_info; - registers.id = frame_id; - registers.data_a = data_a; - registers.data_b = data_b; - - return registers; -} - -/// Converts desired message to the CANx registers -can_data_registers_t convert_message_to_stm_can(hal::can_message const& message) -{ - can_data_registers_t registers; - - auto frame_info = - bit_value(0U) - .insert(message.length) - .to(); - - uint32_t frame_id = 0; - - if (message.extended) { - frame_id = - bit_value(0U) - .insert(true) - .insert(message.remote_request) - .set(mailbox_identifier::identifier_type) - .insert(message.id) - .to(); - } else { - frame_id = - bit_value(0U) - .insert(true) - .insert(message.remote_request) - .clear() - .insert(message.id) - .to(); - } - - uint32_t data_a = 0; - data_a |= message.payload[0] << (0 * 8); - data_a |= message.payload[1] << (1 * 8); - data_a |= message.payload[2] << (2 * 8); - data_a |= message.payload[3] << (3 * 8); - - uint32_t data_b = 0; - data_b |= message.payload[4] << (0 * 8); - data_b |= message.payload[5] << (1 * 8); - data_b |= message.payload[6] << (2 * 8); - data_b |= message.payload[7] << (3 * 8); - - registers.frame = frame_info; - registers.id = frame_id; - registers.data_a = data_a; - registers.data_b = data_b; - - return registers; -} - -bool is_bus_off() -{ - // True = Bus is in sleep mode - // False = Bus has left sleep mode. - return bit_extract(can1_reg->MCR); -} - -void setup_can(hal::u32 p_baud_rate, can_pins p_pins, bool p_self_test = false) -{ - power_on(peripheral::can1); - - set_master_mode(master_control::sleep_mode_request, false); - set_master_mode(master_control::no_automatic_retransmission, false); - set_master_mode(master_control::automatic_bus_off_management, false); - - enter_initialization(); - - // Ensure we have left initialization phase so the peripheral can operate - // correctly. If an exception is thrown at any point, this will ensure that - // the can peripheral is taken out of initialization. - nonstd::scope_exit on_exit(&exit_initialization); - - configure_baud_rate(p_baud_rate); - - switch (p_pins) { - case can_pins::pa11_pa12: - configure_pin({ .port = 'A', .pin = 11 }, input_pull_up); - configure_pin({ .port = 'A', .pin = 12 }, push_pull_alternative_output); - break; - case can_pins::pb9_pb8: - configure_pin({ .port = 'B', .pin = 8 }, input_pull_up); - configure_pin({ .port = 'B', .pin = 9 }, push_pull_alternative_output); - break; - case can_pins::pd0_pd1: - configure_pin({ .port = 'D', .pin = 0 }, input_pull_up); - configure_pin({ .port = 'D', .pin = 1 }, push_pull_alternative_output); - break; - } - - bit_modify(can1_reg->BTR).insert(p_self_test); - - remap_pins(p_pins); -} - -void setup_can(hal::u32 p_baud_rate, - can_pins p_pins, - can_peripheral_manager::self_test p_enable_self_test, - hal::steady_clock& p_clock, - hal::time_duration p_timeout_time) -{ - power_on(peripheral::can1); - - set_master_mode(master_control::sleep_mode_request, false); - set_master_mode(master_control::no_automatic_retransmission, false); - set_master_mode(master_control::automatic_bus_off_management, false); - - enter_initialization(); - - configure_baud_rate(p_baud_rate); - - switch (p_pins) { - case can_pins::pa11_pa12: - configure_pin({ .port = 'A', .pin = 11 }, input_pull_up); - configure_pin({ .port = 'A', .pin = 12 }, push_pull_alternative_output); - break; - case can_pins::pb9_pb8: - configure_pin({ .port = 'B', .pin = 8 }, input_pull_up); - configure_pin({ .port = 'B', .pin = 9 }, push_pull_alternative_output); - break; - case can_pins::pd0_pd1: - configure_pin({ .port = 'D', .pin = 0 }, input_pull_up); - configure_pin({ .port = 'D', .pin = 1 }, push_pull_alternative_output); - break; - } - - bit_modify(can1_reg->BTR) - .insert(hal::value(p_enable_self_test)); - - remap_pins(p_pins); - - timed_exit_initialization(p_clock, p_timeout_time); -} - -can::message_t read_receive_mailbox() -{ - can::message_t message{ .id = 0 }; - - uint32_t fifo0_status = can1_reg->RF0R; - uint32_t fifo1_status = can1_reg->RF1R; - - can_peripheral_manager::fifo_assignment fifo_select = - can_peripheral_manager::fifo_assignment::fifo1; - - if (bit_extract(fifo0_status)) { - fifo_select = can_peripheral_manager::fifo_assignment::fifo1; - } else if (bit_extract(fifo1_status)) { - fifo_select = can_peripheral_manager::fifo_assignment::fifo2; - } else { - // Error, tried to receive when there were no pending messages. - return message; - } - - uint32_t frame = can1_reg->fifo_mailbox[value(fifo_select)].RDTR; - uint32_t id = can1_reg->fifo_mailbox[value(fifo_select)].RIR; - - // Extract all of the information from the message frame - bool is_remote_request = bit_extract(id); - uint32_t length = bit_extract(frame); - uint32_t format = bit_extract(id); - - message.is_remote_request = is_remote_request; - message.length = static_cast(length); - - // Get the frame ID - if (format == value(mailbox_identifier::id_type::extended)) { - message.id = bit_extract(id); - } else { - message.id = bit_extract(id); - } - - auto low_read_data = can1_reg->fifo_mailbox[value(fifo_select)].RDLR; - auto high_read_data = can1_reg->fifo_mailbox[value(fifo_select)].RDHR; - - // Pull the bytes from RDL into the payload array - message.payload[0] = (low_read_data >> (0 * 8)) & 0xFF; - message.payload[1] = (low_read_data >> (1 * 8)) & 0xFF; - message.payload[2] = (low_read_data >> (2 * 8)) & 0xFF; - message.payload[3] = (low_read_data >> (3 * 8)) & 0xFF; - - // Pull the bytes from RDH into the payload array - message.payload[4] = (high_read_data >> (0 * 8)) & 0xFF; - message.payload[5] = (high_read_data >> (1 * 8)) & 0xFF; - message.payload[6] = (high_read_data >> (2 * 8)) & 0xFF; - message.payload[7] = (high_read_data >> (3 * 8)) & 0xFF; - - // Release the RX buffer and allow another buffer to be read. - if (fifo_select == can_peripheral_manager::fifo_assignment::fifo1) { - bit_modify(can1_reg->RF0R).set(); - } else if (fifo_select == can_peripheral_manager::fifo_assignment::fifo2) { - bit_modify(can1_reg->RF1R).set(); - } - - return message; -} - -hal::callback can_receive_handler{}; - -void handler_can_interrupt() -{ - auto const message = read_receive_mailbox(); - // Why is this here? Because there was an stm32f103c8 chip that may have a - // defect or was damaged in testing. That device was then able to set its - // length to 9. The actual data in the data registers were garbage data. Even - // if the device is damaged, its best to throw out those damaged frames then - // attempt to pass them to a handler that may not able to manage them. - if (message.length <= 8) { - can_receive_handler(message); - } -} - -struct v2 -{}; - -can_message read_receive_mailbox(v2) -{ - using fifo_assignment = can_peripheral_manager::fifo_assignment; - - can_message message{}; - - uint32_t fifo0_status = can1_reg->RF0R; - uint32_t fifo1_status = can1_reg->RF1R; - - fifo_assignment fifo_select = fifo_assignment::fifo1; - - if (bit_extract(fifo0_status)) { - fifo_select = fifo_assignment::fifo1; - } else if (bit_extract(fifo1_status)) { - fifo_select = fifo_assignment::fifo2; - } else { - // Error, tried to receive when there were no pending messages. - return message; - } - - uint32_t frame = can1_reg->fifo_mailbox[value(fifo_select)].RDTR; - uint32_t id = can1_reg->fifo_mailbox[value(fifo_select)].RIR; - - // Extract all of the information from the message frame - bool const is_remote_request = - bit_extract(id); - uint32_t const length = - bit_extract(frame); - uint32_t const format = bit_extract(id); - bool const is_extended = - format == value(mailbox_identifier::id_type::extended); - - message.remote_request = is_remote_request; - message.length = static_cast(length); - message.extended = is_extended; - - // Get the frame ID - if (is_extended) { - message.id = bit_extract(id); - } else { - message.id = bit_extract(id); - } - - auto low_read_data = can1_reg->fifo_mailbox[value(fifo_select)].RDLR; - auto high_read_data = can1_reg->fifo_mailbox[value(fifo_select)].RDHR; - - // Pull the bytes from RDL into the payload array - message.payload[0] = (low_read_data >> (0 * 8)) & 0xFF; - message.payload[1] = (low_read_data >> (1 * 8)) & 0xFF; - message.payload[2] = (low_read_data >> (2 * 8)) & 0xFF; - message.payload[3] = (low_read_data >> (3 * 8)) & 0xFF; - - // Pull the bytes from RDH into the payload array - message.payload[4] = (high_read_data >> (0 * 8)) & 0xFF; - message.payload[5] = (high_read_data >> (1 * 8)) & 0xFF; - message.payload[6] = (high_read_data >> (2 * 8)) & 0xFF; - message.payload[7] = (high_read_data >> (3 * 8)) & 0xFF; - - // Release the RX buffer and allow another buffer to be read. - if (fifo_select == can_peripheral_manager::fifo_assignment::fifo1) { - bit_modify(can1_reg->RF0R).set(); - } else if (fifo_select == can_peripheral_manager::fifo_assignment::fifo2) { - bit_modify(can1_reg->RF1R).set(); - } - - return message; -} - -void bus_on() -{ - constexpr auto bus_off_mask = error_status_register::bus_off; - bool const bus_off = bit_extract(can1_reg->ESR); - - if (not bus_off) { - return; // nothing to do here, return - } - - // RM0008 page 670 states that bus off can be recovered from by entering and - // Request to enter initialization mode - enter_initialization(); - - // Leave Initialization mode - exit_initialization(); -} -} // namespace - -can::can(can::settings const& p_settings, can_pins p_pins) -{ - setup_can(static_cast(p_settings.baud_rate), p_pins); - allow_all_acceptance_filter(); // Default behavior in the original design -} - -void can::enable_self_test(bool p_enable) -{ - enter_initialization(); - nonstd::scope_exit on_exit(&exit_initialization); - - if (p_enable) { - bit_modify(can1_reg->BTR).set(); - } else { - bit_modify(can1_reg->BTR).clear(); - } -} - -can::~can() -{ - hal::cortex_m::disable_interrupt(irq::can1_rx0); - power_off(peripheral::can1); -} - -void can::driver_configure(can::settings const& p_settings) -{ - enter_initialization(); - nonstd::scope_exit on_exit(&exit_initialization); - - configure_baud_rate(static_cast(p_settings.baud_rate)); - allow_all_acceptance_filter(); -} - -void can::driver_bus_on() -{ - hal::stm32f1::bus_on(); -} - -void can::driver_send(can::message_t const& p_message) -{ - if (is_bus_off()) { - hal::safe_throw(hal::operation_not_permitted(this)); - } - - can_data_registers_t registers = convert_message_to_stm_can(p_message); - std::optional available_mailbox{}; - - while (not available_mailbox) { - hal::u32 const status_register = can1_reg->TSR; - // Check if any buffer is available. - if (bit_extract( - status_register)) { - available_mailbox = 0; - } else if (bit_extract( - status_register)) { - available_mailbox = 1; - } else if (bit_extract( - status_register)) { - available_mailbox = 2; - } - } - - // NOLINTNEXTLINE(bugprone-unchecked-optional-access) - auto& mailbox = can1_reg->transmit_mailbox[*available_mailbox]; - // The above is removed from lint because the while loop is our check that the - // optional value has been set. - - bit_modify(mailbox.TDTR) - .insert(p_message.length); - mailbox.TDLR = registers.data_a; - mailbox.TDHR = registers.data_b; - mailbox.TIR = registers.id; -} - -void can::driver_on_receive(hal::callback p_handler) -{ - initialize_interrupts(); - can_receive_handler = p_handler; - - // Enable interrupt service routine. - cortex_m::enable_interrupt(irq::can1_rx0, handler_can_interrupt); - cortex_m::enable_interrupt(irq::can1_rx1, handler_can_interrupt); - - bit_modify(can1_reg->IER) - .set(); - bit_modify(can1_reg->IER) - .set(); -} -} // namespace hal::stm32f1 - -// ============================================================================= -// -// Split can driver code -// -// ============================================================================= - -namespace hal::stm32f1 { -namespace { -std::span can_receive_buffer{}; -hal::u32 receive_count{}; -hal::u32 current_baud_rate = 0; -can_interrupt::optional_receive_handler can_v2_receive_handler{}; -can_bus_manager::optional_bus_off_handler can_v2_bus_off_handler{}; -std::bitset<28> acquired_banks{}; -can_peripheral_manager::disable_ids disable_id{}; - -void handler_circular_buffer_interrupt() -{ - auto const message = read_receive_mailbox(v2{}); - // Why is this here? Because there was an stm32f103c8 chip that may have a - // defect or was damaged in testing. That device was then able to set its - // length to 9. The actual data in the data registers were garbage data. Even - // if the device is damaged, its best to throw out those damaged frames then - // attempt to pass them to a handler that may not able to manage them. - if (message.length > 8) { - return; - } - - if (can_v2_receive_handler) { - using tag = hal::can_interrupt::on_receive_tag; - (*can_v2_receive_handler)(tag{}, message); - } - - if (not can_receive_buffer.empty()) { - auto const write_index = receive_count++ % can_receive_buffer.size(); - can_receive_buffer[write_index] = message; - } -} - -void handler_status_change_interrupt() -{ - bool is_bus_off = bit_extract(can1_reg->ESR); - if (is_bus_off && can_v2_bus_off_handler) { - using tag = hal::can_bus_manager::bus_off_tag; - (*can_v2_bus_off_handler)(tag{}); - } -} - -hal::u16 standard_id_to_stm_filter(hal::u16 p_id) -{ - auto const reg = hal::bit_value() - .insert(p_id) - .clear(standard_filter_bank::rtr1) - .clear(standard_filter_bank::id_extension1) - .insert(standard_filter_bank::extended_id1, 0UL) - .to(); - return reg; -} - -hal::u32 extended_id_to_stm_filter(hal::u32 p_id) -{ - auto const reg = hal::bit_value() - .insert(p_id) - .clear(extended_filter_bank::rtr) - .clear(extended_filter_bank::id_extension) - .clear(extended_filter_bank::reserved) - .to(); - return reg; -} - -/** - * @brief Scan through the acquired banks and return the index to an available - * one. - * - * @return hal::u8 - returns the index of the filter banks that has been - * acquired for the caller. - * @throws hal::resource_unavailable_try_again - if no filter banks are - * available - */ -hal::u8 available_filter() -{ - for (std::size_t i = 0; i < acquired_banks.size(); i++) { - if (not acquired_banks.test(i)) { - acquired_banks.set(i); - return i; - } - } - - hal::safe_throw(hal::resource_unavailable_try_again(nullptr)); -} -} // namespace - -can_peripheral_manager::can_peripheral_manager(hal::u32 p_baud_rate, - can_pins p_pins, - disable_ids p_disabled_ids, - bool p_self_test) -{ - current_baud_rate = p_baud_rate; - disable_id = p_disabled_ids; - - setup_can(p_baud_rate, p_pins, p_self_test); - - initialize_interrupts(); - - // Setup interrupt service routines - cortex_m::enable_interrupt(irq::can1_rx0, handler_circular_buffer_interrupt); - cortex_m::enable_interrupt(irq::can1_rx1, handler_circular_buffer_interrupt); - cortex_m::enable_interrupt(irq::can1_sce, handler_status_change_interrupt); - - bit_modify(can1_reg->IER) - .set(); - bit_modify(can1_reg->IER) - .set(); -} - -can_peripheral_manager::can_peripheral_manager( - hal::u32 p_baud_rate, - hal::steady_clock& p_clock, - hal::time_duration p_timeout_time, - can_pins p_pins, - self_test p_enable_self_test, - disable_ids p_disabled_ids) -{ - current_baud_rate = p_baud_rate; - disable_id = p_disabled_ids; - setup_can(p_baud_rate, p_pins, p_enable_self_test, p_clock, p_timeout_time); - - initialize_interrupts(); - - // Setup interrupt service routines - cortex_m::enable_interrupt(irq::can1_rx0, handler_circular_buffer_interrupt); - cortex_m::enable_interrupt(irq::can1_rx1, handler_circular_buffer_interrupt); - cortex_m::enable_interrupt(irq::can1_sce, handler_status_change_interrupt); - - bit_modify(can1_reg->IER) - .set(); - bit_modify(can1_reg->IER) - .set(); -} - -void can_peripheral_manager::enable_self_test(bool p_enable) -{ - enter_initialization(); - nonstd::scope_exit on_exit(&exit_initialization); - - if (p_enable) { - bit_modify(can1_reg->BTR).set(); - } else { - bit_modify(can1_reg->BTR).clear(); - } -} - -can_peripheral_manager::transceiver::transceiver( - std::span p_receive_buffer) -{ - can_receive_buffer = p_receive_buffer; - receive_count = 0; -} - -u32 can_peripheral_manager::transceiver::driver_baud_rate() -{ - return current_baud_rate; -} - -void can_peripheral_manager::transceiver::driver_send( - can_message const& p_message) -{ - if (is_bus_off()) { - hal::safe_throw(hal::operation_not_permitted(this)); - } - - can_data_registers_t const registers = convert_message_to_stm_can(p_message); - std::optional available_mailbox{}; - - while (not available_mailbox) { - hal::u32 const status_register = can1_reg->TSR; - // Check if any buffer is available. - if (bit_extract( - status_register)) { - available_mailbox = 0; - } else if (bit_extract( - status_register)) { - available_mailbox = 1; - } else if (bit_extract( - status_register)) { - available_mailbox = 2; - } - } - - // NOLINTNEXTLINE(bugprone-unchecked-optional-access) - auto& mailbox = can1_reg->transmit_mailbox[*available_mailbox]; - // The above is removed from lint because the while loop is our check that the - // optional value has been set. - - bit_modify(mailbox.TDTR) - .insert(p_message.length); - mailbox.TDLR = registers.data_a; - mailbox.TDHR = registers.data_b; - mailbox.TIR = registers.id; -} - -std::span -can_peripheral_manager::transceiver::driver_receive_buffer() -{ - return can_receive_buffer; -} - -std::size_t can_peripheral_manager::transceiver::driver_receive_cursor() -{ - return receive_count % can_receive_buffer.size(); -} - -can_peripheral_manager::interrupt::interrupt() -{ - bit_modify(can1_reg->IER).set(interrupt_enable_register::bus_off); -} - -void can_peripheral_manager::interrupt::driver_on_receive( - optional_receive_handler p_callback) -{ - can_v2_receive_handler = p_callback; -} - -void can_peripheral_manager::bus_manager::driver_baud_rate(hal::u32 p_hertz) -{ - enter_initialization(); - // Ensure we have left initialization phase so the peripheral can operate - // correctly. If an exception is thrown at any point, this will ensure that - // the can peripheral is taken out of initialization. - nonstd::scope_exit on_exit(&exit_initialization); - - configure_baud_rate(p_hertz); - current_baud_rate = p_hertz; -} - -void can_peripheral_manager::bus_manager::driver_filter_mode(accept) -{ - // this does nothing for now. We should consider dropping this in favor of - // always using a filter to manager message acceptance. A single mask filter - // with its mask set to all ZEROs would do the trick. -} - -void can_peripheral_manager::bus_manager::driver_on_bus_off( - optional_bus_off_handler p_callback) -{ - can_v2_bus_off_handler = p_callback; -} - -void can_peripheral_manager::bus_manager::driver_bus_on() -{ - bus_on(); -} - -can_peripheral_manager::transceiver can_peripheral_manager::acquire_transceiver( - std::span p_receive_buffer) -{ - return can_peripheral_manager::transceiver{ p_receive_buffer }; -} - -can_peripheral_manager::bus_manager -can_peripheral_manager::acquire_bus_manager() -{ - return can_peripheral_manager::bus_manager{}; -} - -can_peripheral_manager::interrupt can_peripheral_manager::acquire_interrupt() -{ - return can_peripheral_manager::interrupt{}; -} - -// ============================================================================= -// -// Acquire Filters -// -// ============================================================================= - -can_peripheral_manager::identifier_filter_set -can_peripheral_manager::acquire_identifier_filter(fifo_assignment p_fifo) -{ - return identifier_filter_set{ available_filter(), p_fifo }; -} - -can_peripheral_manager::mask_filter_set -can_peripheral_manager::acquire_mask_filter(fifo_assignment p_fifo) -{ - return mask_filter_set{ available_filter(), p_fifo }; -} - -can_peripheral_manager::extended_identifier_filter_set -can_peripheral_manager::acquire_extended_identifier_filter( - fifo_assignment p_fifo) -{ - return extended_identifier_filter_set{ available_filter(), p_fifo }; -} - -can_peripheral_manager::extended_mask_filter -can_peripheral_manager::acquire_extended_mask_filter(fifo_assignment p_fifo) -{ - return extended_mask_filter{ available_filter(), p_fifo }; -} - -// ============================================================================= -// -// Filter Constructors -// -// ============================================================================= - -can_peripheral_manager::mask_filter::mask_filter(filter_resource p_resource) - : m_resource(p_resource) -{ -} - -can_peripheral_manager::identifier_filter::identifier_filter( - filter_resource p_resource) - : m_resource(p_resource) -{ -} - -can_peripheral_manager::extended_mask_filter::extended_mask_filter( - hal::u8 p_filter_index, - fifo_assignment p_fifo) - : m_filter_index(p_filter_index) -{ - set_filter_bank_mode(filter_bank_master_control::initialization); - - // On scope exit, whether via a return or an exception, invoke this. - nonstd::scope_exit on_exit([p_filter_index]() { - // Deactivate filter initialization mode (clear bit) - set_filter_bank_mode(filter_bank_master_control::active); - set_filter_activation_state(p_filter_index, filter_activation::active); - }); - - set_filter_activation_state(p_filter_index, filter_activation::not_active); - set_filter_scale(p_filter_index, filter_scale::single_32_bit_scale); - set_filter_type(p_filter_index, filter_type::mask); - set_filter_fifo_assignment(p_filter_index, p_fifo); - - auto const id_reg = extended_id_to_stm_filter(disable_id.extended); - auto const mask_reg = extended_id_to_stm_filter(0x1FFF'FFFF); - can1_reg->filter_registers[p_filter_index].FR1 = id_reg; - can1_reg->filter_registers[p_filter_index].FR2 = mask_reg; -} - -can_peripheral_manager::extended_identifier_filter::extended_identifier_filter( - filter_resource p_resource) - : m_resource(p_resource) -{ -} - -can_peripheral_manager::mask_filter_set::mask_filter_set(hal::u8 p_filter_index, - fifo_assignment p_fifo) - : filter{ - mask_filter{ { .filter_index = p_filter_index, .word_index = 0 } }, - mask_filter{ { .filter_index = p_filter_index, .word_index = 1 } }, - } -{ - // Required to change filter scale and type - set_filter_bank_mode(filter_bank_master_control::initialization); - - // On scope exit, whether via a return or an exception, invoke this. - nonstd::scope_exit on_exit([p_filter_index]() { - set_filter_bank_mode(filter_bank_master_control::active); - set_filter_activation_state(p_filter_index, filter_activation::active); - }); - - set_filter_activation_state(p_filter_index, filter_activation::not_active); - set_filter_scale(p_filter_index, filter_scale::dual_16_bit_scale); - set_filter_type(p_filter_index, filter_type::mask); - set_filter_fifo_assignment(p_filter_index, p_fifo); - - auto const disable_id_reg = standard_id_to_stm_filter(disable_id.standard); - auto const disable_mask_reg = standard_id_to_stm_filter(0x1FF); - auto const disable_mask = (disable_mask_reg << 16) | disable_id_reg; - - can1_reg->filter_registers[p_filter_index].FR1 = disable_mask; - can1_reg->filter_registers[p_filter_index].FR2 = disable_mask; -} - -can_peripheral_manager::identifier_filter_set::identifier_filter_set( - hal::u8 p_filter_index, - fifo_assignment p_fifo) - : filter{ - identifier_filter{ { .filter_index = p_filter_index, .word_index = 0 } }, - identifier_filter{ { .filter_index = p_filter_index, .word_index = 1 } }, - identifier_filter{ { .filter_index = p_filter_index, .word_index = 2 } }, - identifier_filter{ { .filter_index = p_filter_index, .word_index = 3 } }, - } -{ - // Required to change filter scale and type - set_filter_bank_mode(filter_bank_master_control::initialization); - - // On scope exit, whether via a return or an exception, invoke this. - nonstd::scope_exit on_exit([p_filter_index]() { - set_filter_bank_mode(filter_bank_master_control::active); - set_filter_activation_state(p_filter_index, filter_activation::active); - }); - - set_filter_activation_state(p_filter_index, filter_activation::not_active); - set_filter_scale(p_filter_index, filter_scale::dual_16_bit_scale); - set_filter_type(p_filter_index, filter_type::list); - set_filter_fifo_assignment(p_filter_index, p_fifo); - - auto const disable_reg = standard_id_to_stm_filter(disable_id.standard); - auto const disable_mask = (disable_reg << 16) | disable_reg; - can1_reg->filter_registers[p_filter_index].FR1 = disable_mask; - can1_reg->filter_registers[p_filter_index].FR2 = disable_mask; -} - -can_peripheral_manager::extended_identifier_filter_set:: - extended_identifier_filter_set(hal::u8 p_filter_index, fifo_assignment p_fifo) - : filter{ - can_peripheral_manager::extended_identifier_filter{ - { .filter_index = p_filter_index, .word_index = 0 } }, - can_peripheral_manager::extended_identifier_filter{ - { .filter_index = p_filter_index, .word_index = 1 } }, - } -{ - // Required to set filter scale and type - set_filter_bank_mode(filter_bank_master_control::initialization); - - // On scope exit, whether via a return or an exception, invoke this. - nonstd::scope_exit on_exit([p_filter_index]() { - set_filter_bank_mode(filter_bank_master_control::active); - set_filter_activation_state(p_filter_index, filter_activation::active); - }); - - set_filter_activation_state(p_filter_index, filter_activation::not_active); - set_filter_scale(p_filter_index, filter_scale::single_32_bit_scale); - set_filter_type(p_filter_index, filter_type::list); - set_filter_fifo_assignment(p_filter_index, p_fifo); - - auto const disable_mask = extended_id_to_stm_filter(disable_id.extended); - - can1_reg->filter_registers[p_filter_index].FR1 = disable_mask; - can1_reg->filter_registers[p_filter_index].FR2 = disable_mask; -} - -// ============================================================================= -// -// ::driver_allow()... -// -// ============================================================================= - -void can_peripheral_manager::identifier_filter::driver_allow( - std::optional p_id) -{ - auto const id = p_id.value_or(disable_id.standard); - - set_filter_activation_state(m_resource.filter_index, - filter_activation::not_active); - - auto& filter = can1_reg->filter_registers[m_resource.filter_index]; - auto const reg = standard_id_to_stm_filter(id); - - switch (m_resource.word_index) { - case 0: - hal::bit_modify(filter.FR1).insert(reg); - break; - case 1: - hal::bit_modify(filter.FR1).insert(reg); - break; - case 2: - hal::bit_modify(filter.FR2).insert(reg); - break; - case 3: - hal::bit_modify(filter.FR2).insert(reg); - break; - default: - hal::safe_throw(hal::operation_not_supported(this)); - break; - } - - set_filter_activation_state(m_resource.filter_index, - filter_activation::active); -} - -void can_peripheral_manager::mask_filter::driver_allow( - std::optional p_pair) -{ - auto const selected_pair = p_pair.value_or(pair{ - .id = disable_id.standard, - .mask = 0x1FF, - }); - - auto& filter = can1_reg->filter_registers[m_resource.filter_index]; - - set_filter_activation_state(m_resource.filter_index, - filter_activation::not_active); - - auto const id_reg = standard_id_to_stm_filter(selected_pair.id); - auto const mask_reg = standard_id_to_stm_filter(selected_pair.mask); - - if (m_resource.word_index == 0) { - hal::bit_modify(filter.FR1) - .insert(id_reg) - .insert(mask_reg); - } else { - hal::bit_modify(filter.FR2) - .insert(id_reg) - .insert(mask_reg); - } - - set_filter_activation_state(m_resource.filter_index, - filter_activation::active); -} - -void can_peripheral_manager::extended_identifier_filter::driver_allow( - std::optional p_id) -{ - auto const id = p_id.value_or(disable_id.extended); - auto const reg = extended_id_to_stm_filter(id); - - set_filter_activation_state(m_resource.filter_index, - filter_activation::not_active); - - auto& filter = can1_reg->filter_registers[m_resource.filter_index]; - - if (m_resource.word_index == 0) { - filter.FR1 = reg; - } else { - filter.FR2 = reg; - } - - set_filter_activation_state(m_resource.filter_index, - filter_activation::active); -} - -void can_peripheral_manager::extended_mask_filter::driver_allow( - std::optional p_pair) -{ - auto const selected_pair = p_pair.value_or(pair{ - .id = disable_id.standard, - .mask = 0x1FFF'FFFF, - }); - - auto const id_reg = extended_id_to_stm_filter(selected_pair.id); - auto const mask_reg = extended_id_to_stm_filter(selected_pair.mask); - - auto& filter = can1_reg->filter_registers[m_filter_index]; - - set_filter_activation_state(m_filter_index, filter_activation::not_active); - filter.FR1 = id_reg; - filter.FR2 = mask_reg; - set_filter_activation_state(m_filter_index, filter_activation::active); -} - -// ============================================================================= -// -// Filter Destructors -// -// ============================================================================= - -can_peripheral_manager::~can_peripheral_manager() -{ - hal::cortex_m::disable_interrupt(irq::can1_rx0); - hal::cortex_m::disable_interrupt(irq::can1_rx1); - hal::cortex_m::disable_interrupt(irq::can1_sce); - power_off(peripheral::can1); -} - -can_peripheral_manager::transceiver::~transceiver() -{ - can_receive_buffer = {}; -} - -can_peripheral_manager::interrupt::~interrupt() -{ - can_v2_receive_handler = std::nullopt; -} - -can_peripheral_manager::bus_manager::~bus_manager() -{ - can_v2_bus_off_handler = std::nullopt; -} - -// NOLINTNEXTLINE(bugprone-exception-escape) -can_peripheral_manager::identifier_filter_set::~identifier_filter_set() -{ - // Free filter bank for use by a different identifier filter - auto const index = filter[0].m_resource.filter_index; - acquired_banks.reset(index); - set_filter_activation_state(index, filter_activation::not_active); -} - -// NOLINTNEXTLINE(bugprone-exception-escape) -can_peripheral_manager::mask_filter_set::~mask_filter_set() -{ - auto const index = filter[0].m_resource.filter_index; - acquired_banks.reset(index); - set_filter_activation_state(index, filter_activation::not_active); -} - -can_peripheral_manager::extended_identifier_filter_set:: - // NOLINTNEXTLINE(bugprone-exception-escape) - ~extended_identifier_filter_set() -{ - auto const index = filter[0].m_resource.filter_index; - acquired_banks.reset(index); - set_filter_activation_state(index, filter_activation::not_active); -} - -// NOLINTNEXTLINE(bugprone-exception-escape) -can_peripheral_manager::extended_mask_filter::~extended_mask_filter() -{ - // Free filter bank for use by a different identifier filter - acquired_banks.reset(m_filter_index); - set_filter_activation_state(m_filter_index, filter_activation::not_active); -} -} // namespace hal::stm32f1 - -#pragma GCC diagnostic pop diff --git a/src/stm32f1/can2.cpp b/src/stm32f1/can2.cpp deleted file mode 100644 index f0bdeb3..0000000 --- a/src/stm32f1/can2.cpp +++ /dev/null @@ -1,1101 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "can_reg.hpp" -#include "pin.hpp" -#include "power.hpp" - -namespace hal::stm32f1 { -namespace { -/// Enable/Disable controller modes -/// -/// @param mode - which mode to enable/disable -/// @param enable_mode - true if you want to enable the mode. False otherwise. -void set_master_mode(bit_mask p_mode, bool p_enable_mode) -{ - bit_modify(can1_reg->MCR).insert(p_mode, p_enable_mode); -} - -bool get_master_status(bit_mask p_mode) -{ - return bit_extract(p_mode, can1_reg->MSR); -} - -void enter_initialization() -{ - // Enter Initialization mode in order to write to CAN registers. - set_master_mode(master_control::initialization_request, true); - - // Wait to enter Initialization mode - while (not get_master_status(master_status::initialization_acknowledge)) { - continue; - } -} - -void exit_initialization() -{ - // Leave Initialization mode - set_master_mode(master_control::initialization_request, false); - - // Wait to leave initialization mode - while (get_master_status(master_status::initialization_acknowledge)) { - continue; - } -} - -void timed_exit_initialization(hal::steady_clock& p_clock, - hal::time_duration p_timeout_time) -{ - // Leave Initialization mode - set_master_mode(master_control::initialization_request, false); - - auto const deadline = hal::future_deadline(p_clock, p_timeout_time); - while (deadline > p_clock.uptime()) { - if (not get_master_status(master_status::initialization_acknowledge)) { - return; - } - } - hal::safe_throw(hal::timed_out(nullptr)); -} - -void configure_baud_rate(hal::u32 p_baud_rate) -{ - auto const can_frequency = frequency(peripheral::can1); - auto const valid_divider = - calculate_can_bus_divider(can_frequency, static_cast(p_baud_rate)); - - if (not valid_divider) { - hal::safe_throw(hal::operation_not_supported(nullptr)); - } - - auto const divisors = valid_divider.value(); - - auto const prescale = divisors.clock_divider - 1U; - auto const sync_jump_width = divisors.synchronization_jump_width - 1U; - - auto phase_segment1 = - (divisors.phase_segment1 + divisors.propagation_delay) - 1U; - auto phase_segment2 = divisors.phase_segment2 - 1U; - - constexpr auto segment2_bit_limit = - hal::bit_limits::max(); - - // Check if phase segment 2 does not fit - if (phase_segment2 > segment2_bit_limit) { - // Take the extra time quanta and add it to the phase 1 segment - auto const phase_segment2_remainder = phase_segment2 - segment2_bit_limit; - phase_segment1 += phase_segment2_remainder; - // Cap phase segment 2 to the max available in the bit field - phase_segment2 = segment2_bit_limit; - } - - bit_modify(can1_reg->BTR) - .insert(prescale) - .insert(phase_segment1) - .insert(phase_segment2) - .insert(sync_jump_width) - .clear(); -} - -void set_filter_bank_mode(filter_bank_master_control p_mode) -{ - bit_modify(can1_reg->FMR) - .insert(hal::value(p_mode)); -} - -void set_filter_type(hal::u8 p_filter, filter_type p_filter_type) -{ - auto const filter_bit_mask = bit_mask::from(p_filter); - bit_modify(can1_reg->FM1R).insert(filter_bit_mask, hal::value(p_filter_type)); -} - -void set_filter_scale(hal::u8 p_filter, filter_scale p_scale) -{ - auto const filter_bit_mask = bit_mask::from(p_filter); - bit_modify(can1_reg->FS1R).insert(filter_bit_mask, hal::value(p_scale)); -} - -void set_filter_fifo_assignment(hal::u8 p_filter, can_fifo p_fifo) -{ - auto const filter_bit_mask = bit_mask::from(p_filter); - bit_modify(can1_reg->FFA1R).insert(filter_bit_mask, hal::value(p_fifo)); -} - -void set_filter_activation_state(hal::u8 p_filter, filter_activation p_state) -{ - auto const filter_bit_mask = bit_mask::from(p_filter); - bit_modify(can1_reg->FA1R).insert(filter_bit_mask, hal::value(p_state)); -} - -struct can_data_registers_t -{ - /// TFI register contents - uint32_t frame = 0; - /// TID register contents - uint32_t id = 0; - /// TDA register contents - uint32_t data_a = 0; - /// TDB register contents - uint32_t data_b = 0; -}; - -/// Converts desired message to the CANx registers -can_data_registers_t convert_message_to_stm_can(hal::can_message const& message) -{ - can_data_registers_t registers; - - auto frame_info = - bit_value(0U) - .insert(message.length) - .to(); - - uint32_t frame_id = 0; - - if (message.extended) { - frame_id = - bit_value(0U) - .insert(true) - .insert(message.remote_request) - .set(mailbox_identifier::identifier_type) - .insert(message.id) - .to(); - } else { - frame_id = - bit_value(0U) - .insert(true) - .insert(message.remote_request) - .clear() - .insert(message.id) - .to(); - } - - uint32_t data_a = 0; - data_a |= message.payload[0] << (0 * 8); - data_a |= message.payload[1] << (1 * 8); - data_a |= message.payload[2] << (2 * 8); - data_a |= message.payload[3] << (3 * 8); - - uint32_t data_b = 0; - data_b |= message.payload[4] << (0 * 8); - data_b |= message.payload[5] << (1 * 8); - data_b |= message.payload[6] << (2 * 8); - data_b |= message.payload[7] << (3 * 8); - - registers.frame = frame_info; - registers.id = frame_id; - registers.data_a = data_a; - registers.data_b = data_b; - - return registers; -} - -bool is_bus_off() -{ - // True = Bus is in sleep mode - // False = Bus has left sleep mode. - return bit_extract(can1_reg->MCR); -} - -void setup_can(hal::u32 p_baud_rate, - can_pins p_pins, - can_self_test p_enable_self_test, - hal::steady_clock& p_clock, - hal::time_duration p_timeout_time) -{ - power_on(peripheral::can1); - - set_master_mode(master_control::sleep_mode_request, false); - set_master_mode(master_control::no_automatic_retransmission, false); - set_master_mode(master_control::automatic_bus_off_management, false); - - enter_initialization(); - - configure_baud_rate(p_baud_rate); - - switch (p_pins) { - case can_pins::pa11_pa12: - configure_pin({ .port = 'A', .pin = 11 }, input_pull_up); - configure_pin({ .port = 'A', .pin = 12 }, push_pull_alternative_output); - break; - case can_pins::pb9_pb8: - configure_pin({ .port = 'B', .pin = 8 }, input_pull_up); - configure_pin({ .port = 'B', .pin = 9 }, push_pull_alternative_output); - break; - case can_pins::pd0_pd1: - configure_pin({ .port = 'D', .pin = 0 }, input_pull_up); - configure_pin({ .port = 'D', .pin = 1 }, push_pull_alternative_output); - break; - } - - bit_modify(can1_reg->BTR) - .insert(hal::value(p_enable_self_test)); - - remap_pins(p_pins); - - timed_exit_initialization(p_clock, p_timeout_time); -} - -can_message read_receive_mailbox() -{ - can_message message{}; - - auto const fifo0_status = can1_reg->RF0R; - auto const fifo1_status = can1_reg->RF1R; - - auto fifo_select = can_fifo::select1; - - if (bit_extract(fifo0_status)) { - fifo_select = can_fifo::select1; - } else if (bit_extract(fifo1_status)) { - fifo_select = can_fifo::select2; - } else { - // Error, tried to receive when there were no pending messages. - return message; - } - - uint32_t frame = can1_reg->fifo_mailbox[value(fifo_select)].RDTR; - uint32_t id = can1_reg->fifo_mailbox[value(fifo_select)].RIR; - - // Extract all of the information from the message frame - bool const is_remote_request = - bit_extract(id); - uint32_t const length = - bit_extract(frame); - uint32_t const format = bit_extract(id); - bool const is_extended = - format == value(mailbox_identifier::id_type::extended); - - message.remote_request = is_remote_request; - message.length = static_cast(length); - message.extended = is_extended; - - // Get the frame ID - if (is_extended) { - message.id = bit_extract(id); - } else { - message.id = bit_extract(id); - } - - auto low_read_data = can1_reg->fifo_mailbox[value(fifo_select)].RDLR; - auto high_read_data = can1_reg->fifo_mailbox[value(fifo_select)].RDHR; - - // Pull the bytes from RDL into the payload array - message.payload[0] = (low_read_data >> (0 * 8)) & 0xFF; - message.payload[1] = (low_read_data >> (1 * 8)) & 0xFF; - message.payload[2] = (low_read_data >> (2 * 8)) & 0xFF; - message.payload[3] = (low_read_data >> (3 * 8)) & 0xFF; - - // Pull the bytes from RDH into the payload array - message.payload[4] = (high_read_data >> (0 * 8)) & 0xFF; - message.payload[5] = (high_read_data >> (1 * 8)) & 0xFF; - message.payload[6] = (high_read_data >> (2 * 8)) & 0xFF; - message.payload[7] = (high_read_data >> (3 * 8)) & 0xFF; - - // Release the RX buffer and allow another buffer to be read. - if (fifo_select == can_fifo::select1) { - bit_modify(can1_reg->RF0R).set(); - } else if (fifo_select == can_fifo::select2) { - bit_modify(can1_reg->RF1R).set(); - } - - return message; -} - -void bus_on() -{ - constexpr auto bus_off_mask = error_status_register::bus_off; - bool const bus_off = bit_extract(can1_reg->ESR); - - if (not bus_off) { - return; // nothing to do here, return - } - - // RM0008 page 670 states that bus off can be recovered from by entering and - // Request to enter initialization mode - enter_initialization(); - - // Leave Initialization mode - exit_initialization(); -} - -hal::u16 standard_id_to_stm_filter(hal::u16 p_id) -{ - auto const reg = hal::bit_value() - .insert(p_id) - .clear(standard_filter_bank::rtr1) - .clear(standard_filter_bank::id_extension1) - .insert(standard_filter_bank::extended_id1, 0UL) - .to(); - return reg; -} - -hal::u32 extended_id_to_stm_filter(hal::u32 p_id) -{ - auto const reg = hal::bit_value() - .insert(p_id) - .clear(extended_filter_bank::rtr) - .clear(extended_filter_bank::id_extension) - .clear(extended_filter_bank::reserved) - .to(); - return reg; -} -} // namespace - -can_peripheral_manager_v2::can_peripheral_manager_v2( - hal::usize p_message_count, - std::pmr::polymorphic_allocator<> p_allocator, - hal::u32 p_baud_rate, - hal::steady_clock& p_clock, - hal::time_duration p_timeout_time, - can_pins p_pins, - can_self_test p_enable_self_test) - : m_buffer(p_allocator, p_message_count) - , m_current_baud_rate(p_baud_rate) -{ - setup_can(p_baud_rate, p_pins, p_enable_self_test, p_clock, p_timeout_time); - - initialize_interrupts(); - - hal::static_callable rx_handler( - [this]() { - auto const message = read_receive_mailbox(); - // Why is this here? Because there was an stm32f103c8 chip that may have a - // defect or was damaged in testing. That device was then able to set its - // length to 9. The actual data in the data registers were garbage data. - // Even if the device is damaged, its best to throw out those damaged - // frames then attempt to pass them to a handler that may not able to - // manage them. - if (message.length > 8) { - return; - } - - if (m_receive_handler) { - using tag = hal::can_interrupt::on_receive_tag; - (*m_receive_handler)(tag{}, message); - } - - m_buffer.push(message); - }); - - // Setup interrupt service routines - cortex_m::enable_interrupt(irq::can1_rx0, rx_handler.get_handler()); - cortex_m::enable_interrupt(irq::can1_rx1, rx_handler.get_handler()); - bit_modify(can1_reg->IER) - .set(); - bit_modify(can1_reg->IER) - .set(); -} - -hal::u8 can_peripheral_manager_v2::available_filter() -{ - for (std::size_t i = 0; i < m_acquired_banks.size(); i++) { - if (not m_acquired_banks.test(i)) { - m_acquired_banks.set(i); - // NOTE: This is only safe because m_acquired_banks bitset size is less - // than 256. - return static_cast(i); - } - } - - hal::safe_throw(hal::resource_unavailable_try_again(this)); -} - -void can_peripheral_manager_v2::release_filter(hal::u8 p_filter_bank) -{ - m_acquired_banks.reset(p_filter_bank); -} - -void can_peripheral_manager_v2::enable_self_test(bool p_enable) -{ - enter_initialization(); - nonstd::scope_exit on_exit(&exit_initialization); - - if (p_enable) { - bit_modify(can1_reg->BTR).set(); - } else { - bit_modify(can1_reg->BTR).clear(); - } -} - -void can_peripheral_manager_v2::bus_on() -{ - hal::stm32f1::bus_on(); -} - -hal::u32 can_peripheral_manager_v2::baud_rate() const -{ - return m_current_baud_rate; -} - -void can_peripheral_manager_v2::baud_rate(hal::u32 p_hertz) -{ - enter_initialization(); - // Ensure we have left initialization phase so the peripheral can operate - // correctly. If an exception is thrown at any point, this will ensure that - // the can peripheral is taken out of initialization. - nonstd::scope_exit on_exit(&exit_initialization); - configure_baud_rate(p_hertz); - m_current_baud_rate = p_hertz; -} - -void can_peripheral_manager_v2::send(can_message const& p_message) -{ - if (is_bus_off()) { - hal::safe_throw(hal::operation_not_permitted(this)); - } - - can_data_registers_t const registers = convert_message_to_stm_can(p_message); - std::optional available_mailbox{}; - i8 count_limit = 10; - - while (not available_mailbox) { - if (count_limit <= 0) { - hal::safe_throw(hal::resource_unavailable_try_again(this)); - } - - hal::u32 const status_register = can1_reg->TSR; - // Check if any buffer is available. - if (bit_extract( - status_register)) { - available_mailbox = 0; - } else if (bit_extract( - status_register)) { - available_mailbox = 1; - } else if (bit_extract( - status_register)) { - available_mailbox = 2; - } - - count_limit--; - } - - // NOLINTNEXTLINE(bugprone-unchecked-optional-access) - auto& mailbox = can1_reg->transmit_mailbox[*available_mailbox]; - // The above is removed from lint because the while loop is our check that the - // optional value has been set. - - bit_modify(mailbox.TDTR) - .insert(p_message.length); - mailbox.TDLR = registers.data_a; - mailbox.TDHR = registers.data_b; - mailbox.TIR = registers.id; -} - -void can_peripheral_manager_v2::on_receive( - can_interrupt::optional_receive_handler const& p_callback) -{ - m_receive_handler = p_callback; -} - -can_peripheral_manager_v2::~can_peripheral_manager_v2() -{ - hal::cortex_m::disable_interrupt(irq::can1_rx0); - hal::cortex_m::disable_interrupt(irq::can1_rx1); - hal::cortex_m::disable_interrupt(irq::can1_sce); - power_off(peripheral::can1); -} - -/** - * @brief Acquire an `hal::can_transceiver` implementation - * - * @return transceiver - object implementing the `hal::can_transceiver` - * interface for this can peripheral. - */ -hal::v5::strong_ptr acquire_can_transceiver( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager) -{ - struct transceiver : public hal::can_transceiver - { - public: - explicit transceiver( - hal::v5::strong_ptr const& p_manager) - : m_manager(p_manager) - { - } - - transceiver(transceiver const&) = delete; - transceiver& operator=(transceiver const&) = delete; - transceiver(transceiver&&) = delete; - transceiver& operator=(transceiver&&) = delete; - ~transceiver() override = default; - - private: - u32 driver_baud_rate() override - { - return m_manager->baud_rate(); - } - - void driver_send(can_message const& p_message) override - { - m_manager->send(p_message); - } - - std::span driver_receive_buffer() override - { - return m_manager->receive_buffer(); - } - - std::size_t driver_receive_cursor() override - { - return m_manager->receive_cursor(); - } - - hal::v5::strong_ptr m_manager; - }; - - return hal::v5::make_strong_ptr(p_allocator, p_manager); -} - -/** - * @brief Acquire an `hal::can_bus_manager` implementation - * - * @return bus_manager - object implementing the `hal::can_bus_manager` - * interface for this can peripheral. - */ -hal::v5::strong_ptr acquire_can_bus_manager( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager) -{ - class bus_manager : public hal::can_bus_manager - { - public: - bus_manager(hal::v5::strong_ptr const& p_manager) - : m_manager(p_manager) - { - hal::static_callable static_callable( - [this]() { - if (m_bus_off_handler) { - (*m_bus_off_handler)(hal::can_bus_manager::bus_off_tag{}); - } - }); - - cortex_m::enable_interrupt(irq::can1_sce, static_callable.get_handler()); - } - bus_manager(bus_manager const&) = delete; - bus_manager& operator=(bus_manager const&) = delete; - bus_manager(bus_manager&&) = delete; - bus_manager& operator=(bus_manager&&) = delete; - ~bus_manager() override - { - cortex_m::disable_interrupt(irq::can1_sce); - } - - private: - friend class can_peripheral_manager; - - void driver_baud_rate(hal::u32 p_hertz) override - { - m_manager->baud_rate(p_hertz); - } - - void driver_filter_mode(accept) override - { - // this does nothing for now. We should consider dropping this in favor of - // always using a filter to manager message acceptance. A single mask - // filter with its mask set to all ZEROs would do the trick. - } - - void driver_on_bus_off(optional_bus_off_handler p_callback) override - { - m_bus_off_handler = p_callback; - } - - void driver_bus_on() override - { - m_manager->bus_on(); - } - - hal::v5::strong_ptr m_manager; - can_bus_manager::optional_bus_off_handler m_bus_off_handler{}; - }; - - return hal::v5::make_strong_ptr(p_allocator, p_manager); -} - -/** - * @brief Acquire an `hal::can_interrupt` implementation - * - * @return interrupt - object implementing the `hal::can_interrupt` interface - * for this can peripheral. - */ -hal::v5::strong_ptr acquire_can_interrupt( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager) -{ - class interrupt : public hal::can_interrupt - { - public: - interrupt(hal::v5::strong_ptr const& p_manager) - : m_manager(p_manager) - { - } - interrupt(interrupt const&) = delete; - interrupt& operator=(interrupt const&) = delete; - interrupt(interrupt&&) = delete; - interrupt& operator=(interrupt&&) = delete; - ~interrupt() override - { - m_manager->on_receive(std::nullopt); - } - - private: - void driver_on_receive(optional_receive_handler p_callback) override - { - m_manager->on_receive(p_callback); - } - hal::v5::strong_ptr m_manager; - }; - - return hal::v5::make_strong_ptr(p_allocator, p_manager); -} - -/** - * @brief Acquire a set of 4x standard identifier filters - * - * @return identifier_filter_set - A set of 4x identifier filters. When - * destroyed, releases the filter resource it held on to. - */ -std::array, 4> -acquire_can_identifier_filter( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo) -{ - struct identifier_filter : public hal::can_identifier_filter - { - identifier_filter(can_filter_resource p_resource) - : m_resource(p_resource) - { - } - - void driver_allow(std::optional p_id) override - { - auto const id = p_id.value_or(0 /* disable_id.standard */); - - set_filter_activation_state(m_resource.filter_index, - filter_activation::not_active); - - auto& filter = can1_reg->filter_registers[m_resource.filter_index]; - auto const reg = standard_id_to_stm_filter(id); - - switch (m_resource.word_index) { - case 0: - hal::bit_modify(filter.FR1) - .insert(reg); - break; - case 1: - hal::bit_modify(filter.FR1) - .insert(reg); - break; - case 2: - hal::bit_modify(filter.FR2) - .insert(reg); - break; - case 3: - hal::bit_modify(filter.FR2) - .insert(reg); - break; - default: - hal::safe_throw(hal::operation_not_supported(this)); - break; - } - - set_filter_activation_state(m_resource.filter_index, - filter_activation::active); - } - - can_filter_resource m_resource; - }; - - struct filter_set - { - filter_set(hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo) - : m_manager(p_manager) - , filters{ - identifier_filter{ { .filter_index = 0, .word_index = 0 } }, - identifier_filter{ { .filter_index = 0, .word_index = 1 } }, - identifier_filter{ { .filter_index = 0, .word_index = 2 } }, - identifier_filter{ { .filter_index = 0, .word_index = 3 } }, - } - { - auto const available_filter = p_manager->available_filter(); - for (auto& filter : filters) { - filter.m_resource.filter_index = available_filter; - } - // Required to change filter scale and type - set_filter_bank_mode(filter_bank_master_control::initialization); - - // On scope exit, whether via a return or an exception, invoke this. - nonstd::scope_exit on_exit([available_filter]() { - set_filter_bank_mode(filter_bank_master_control::active); - set_filter_activation_state(available_filter, - filter_activation::active); - }); - - set_filter_activation_state(available_filter, - filter_activation::not_active); - set_filter_scale(available_filter, filter_scale::dual_16_bit_scale); - set_filter_type(available_filter, filter_type::list); - set_filter_fifo_assignment(available_filter, p_fifo); - - auto const disable_reg = - standard_id_to_stm_filter(0 /* disable_id.standard*/); - auto const disable_mask = (disable_reg << 16) | disable_reg; - can1_reg->filter_registers[available_filter].FR1 = disable_mask; - can1_reg->filter_registers[available_filter].FR2 = disable_mask; - } - - ~filter_set() - { - auto const index = filters[0].m_resource.filter_index; - m_manager->release_filter(index); - set_filter_activation_state(index, filter_activation::not_active); - } - - hal::v5::strong_ptr m_manager; - std::array filters; - }; - - auto set = - hal::v5::make_strong_ptr(p_allocator, p_manager, p_fifo); - - return { - hal::v5::strong_ptr( - set, &filter_set::filters, 0), - hal::v5::strong_ptr( - set, &filter_set::filters, 1), - hal::v5::strong_ptr( - set, &filter_set::filters, 2), - hal::v5::strong_ptr( - set, &filter_set::filters, 3), - }; -} - -/** - * @brief Acquire a pair of two extended identifier filters - * - * @return extended_identifier_filter_set - A set of 2x extended identifier - * filters. - */ -std::array, 2> -acquire_can_extended_identifier_filter( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo) -{ - struct extended_id_filter : public hal::can_extended_identifier_filter - { - extended_id_filter(can_filter_resource p_resource) - : m_resource(p_resource) - { - } - - void driver_allow(std::optional p_id) override - { - auto const id = p_id.value_or(/*disable_id.extended*/ 0); - auto const reg = extended_id_to_stm_filter(id); - - set_filter_activation_state(m_resource.filter_index, - filter_activation::not_active); - - auto& filter = can1_reg->filter_registers[m_resource.filter_index]; - - if (m_resource.word_index == 0) { - filter.FR1 = reg; - } else { - filter.FR2 = reg; - } - - set_filter_activation_state(m_resource.filter_index, - filter_activation::active); - } - - can_filter_resource m_resource; - }; - - struct filter_set - { - filter_set(hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo) - : m_manager(p_manager) - , m_filters({ - { can_filter_resource{ .filter_index = 0, .word_index = 0 } }, - { can_filter_resource{ .filter_index = 0, .word_index = 1 } }, - }) - { - auto const available_filter = p_manager->available_filter(); - - for (auto& filter : m_filters) { - filter.m_resource.filter_index = available_filter; - } - - // Required to set filter scale and type - set_filter_bank_mode(filter_bank_master_control::initialization); - - // On scope exit, whether via a return or an exception, invoke this. - nonstd::scope_exit on_exit([available_filter]() { - set_filter_bank_mode(filter_bank_master_control::active); - set_filter_activation_state(available_filter, - filter_activation::active); - }); - - set_filter_activation_state(available_filter, - filter_activation::not_active); - set_filter_scale(available_filter, filter_scale::single_32_bit_scale); - set_filter_type(available_filter, filter_type::list); - set_filter_fifo_assignment(available_filter, p_fifo); - - auto const disable_mask = - extended_id_to_stm_filter(/*disable_id.extended*/ 0); - - can1_reg->filter_registers[available_filter].FR1 = disable_mask; - can1_reg->filter_registers[available_filter].FR2 = disable_mask; - } - - // NOLINTNEXTLINE(bugprone-exception-escape) - ~filter_set() - { - auto const index = m_filters[0].m_resource.filter_index; - m_manager->release_filter(index); - set_filter_activation_state(index, filter_activation::not_active); - } - - hal::v5::strong_ptr m_manager; - std::array m_filters; - }; - - auto set = - hal::v5::make_strong_ptr(p_allocator, p_manager, p_fifo); - - return { - hal::v5::strong_ptr( - set, &filter_set::m_filters, 0), - hal::v5::strong_ptr( - set, &filter_set::m_filters, 1), - }; -} - -/** - * @brief Acquire a pair of mask filters - * - * @param p_manager - Manager for which to extract the filter - * @param p_fifo - Select the FIFO to store the received message - * @return hal::v5::strong_ptr - A set of 2x standard - * mask filters - */ -std::array, 2> -acquire_can_mask_filter( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo) -{ - struct mask_filter : public hal::can_mask_filter - { - mask_filter(can_filter_resource p_resource) - : m_resource(p_resource) - { - } - - void driver_allow(std::optional p_pair) override - { - auto const selected_pair = p_pair.value_or(pair{ - .id = 0, // disable_id.standard, - .mask = 0x1FF, - }); - - auto& filter = can1_reg->filter_registers[m_resource.filter_index]; - - set_filter_activation_state(m_resource.filter_index, - filter_activation::not_active); - - auto const id_reg = standard_id_to_stm_filter(selected_pair.id); - auto const mask_reg = standard_id_to_stm_filter(selected_pair.mask); - - if (m_resource.word_index == 0) { - hal::bit_modify(filter.FR1) - .insert(id_reg) - .insert(mask_reg); - } else { - hal::bit_modify(filter.FR2) - .insert(id_reg) - .insert(mask_reg); - } - - set_filter_activation_state(m_resource.filter_index, - filter_activation::active); - } - - can_filter_resource m_resource; - }; - - struct mask_filter_set - { - mask_filter_set( - hal::v5::strong_ptr const& p_manager, - hal::u8 p_filter_index, - can_fifo p_fifo) - : m_manager(p_manager) - , filter{ - mask_filter{ { .filter_index = p_filter_index, .word_index = 0 } }, - mask_filter{ { .filter_index = p_filter_index, .word_index = 1 } }, - } - { - // Required to change filter scale and type - set_filter_bank_mode(filter_bank_master_control::initialization); - - // On scope exit, whether via a return or an exception, invoke this. - nonstd::scope_exit on_exit([p_filter_index]() { - set_filter_bank_mode(filter_bank_master_control::active); - set_filter_activation_state(p_filter_index, filter_activation::active); - }); - - set_filter_activation_state(p_filter_index, - filter_activation::not_active); - set_filter_scale(p_filter_index, filter_scale::dual_16_bit_scale); - set_filter_type(p_filter_index, filter_type::mask); - set_filter_fifo_assignment(p_filter_index, p_fifo); - - auto const disable_id_reg = - standard_id_to_stm_filter(0 /* disable_id.standard*/); - auto const disable_mask_reg = standard_id_to_stm_filter(0x1FF); - auto const disable_mask = (disable_mask_reg << 16) | disable_id_reg; - - can1_reg->filter_registers[p_filter_index].FR1 = disable_mask; - can1_reg->filter_registers[p_filter_index].FR2 = disable_mask; - } - - // NOLINTNEXTLINE(bugprone-exception-escape) - ~mask_filter_set() - { - auto const index = filter[0].m_resource.filter_index; - m_manager->release_filter(index); - set_filter_activation_state(index, filter_activation::not_active); - } - - hal::v5::strong_ptr m_manager; - std::array filter; - }; - - auto set = hal::v5::make_strong_ptr( - p_allocator, p_manager, p_manager->available_filter(), p_fifo); - - return { - hal::v5::strong_ptr(set, &mask_filter_set::filter, 0), - hal::v5::strong_ptr(set, &mask_filter_set::filter, 1), - }; -} - -/** - * @brief Acquire an extended mask filter - * - * @param p_manager - Manager for which to extract the filter - * @param p_fifo - Select the FIFO to store the received message - * @return hal::v5::strong_ptr - An extended - * mask filter - */ -hal::v5::strong_ptr -acquire_can_extended_mask_filter( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo) -{ - struct extended_mask_filter : public hal::can_extended_mask_filter - { - extended_mask_filter( - hal::v5::strong_ptr const& p_manager, - can_fifo p_fifo) - : m_manager(p_manager) - , m_filter_index(p_manager->available_filter()) - { - set_filter_bank_mode(filter_bank_master_control::initialization); - - // On scope exit, whether via a return or an exception, invoke this. - nonstd::scope_exit on_exit([this]() { - // Deactivate filter initialization mode (clear bit) - set_filter_bank_mode(filter_bank_master_control::active); - set_filter_activation_state(m_filter_index, filter_activation::active); - }); - - set_filter_activation_state(m_filter_index, - filter_activation::not_active); - set_filter_scale(m_filter_index, filter_scale::single_32_bit_scale); - set_filter_type(m_filter_index, filter_type::mask); - set_filter_fifo_assignment(m_filter_index, p_fifo); - - auto const id_reg = extended_id_to_stm_filter(/*disable_id.extended*/ 0); - auto const mask_reg = extended_id_to_stm_filter(0x1FFF'FFFF); - can1_reg->filter_registers[m_filter_index].FR1 = id_reg; - can1_reg->filter_registers[m_filter_index].FR2 = mask_reg; - } - - void driver_allow(std::optional p_pair) override - { - auto const selected_pair = p_pair.value_or(pair{ - .id = 0, // disable_id.standard, - .mask = 0x1FFF'FFFF, - }); - - auto const id_reg = extended_id_to_stm_filter(selected_pair.id); - auto const mask_reg = extended_id_to_stm_filter(selected_pair.mask); - - auto& filter = can1_reg->filter_registers[m_filter_index]; - - set_filter_activation_state(m_filter_index, - filter_activation::not_active); - filter.FR1 = id_reg; - filter.FR2 = mask_reg; - set_filter_activation_state(m_filter_index, filter_activation::active); - } - - ~extended_mask_filter() override - { - m_manager->release_filter(m_filter_index); - set_filter_activation_state(m_filter_index, - filter_activation::not_active); - } - - hal::v5::strong_ptr m_manager; - hal::u8 m_filter_index; - }; - - return hal::v5::make_strong_ptr( - p_allocator, p_manager, p_fifo); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/can_reg.hpp b/src/stm32f1/can_reg.hpp deleted file mode 100644 index d77ba6b..0000000 --- a/src/stm32f1/can_reg.hpp +++ /dev/null @@ -1,374 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include - -namespace hal::stm32f1 { - -struct can_tx_mailbox_t -{ - u32 volatile TIR; - u32 volatile TDTR; - u32 volatile TDLR; - u32 volatile TDHR; -}; - -struct can_fifo_mailbox_t -{ - u32 volatile RIR; - u32 volatile RDTR; - u32 volatile RDLR; - u32 volatile RDHR; -}; - -struct can_filter_register_t -{ - u32 volatile FR1; - u32 volatile FR2; -}; - -/** - * @brief Controller Area Network - */ - -struct can_reg_t -{ - u32 volatile MCR; - u32 volatile MSR; - u32 volatile TSR; - u32 volatile RF0R; - u32 volatile RF1R; - u32 volatile IER; - u32 volatile ESR; - u32 volatile BTR; - std::array reserved0; - std::array transmit_mailbox; - std::array fifo_mailbox; - std::array reserved1; - u32 volatile FMR; - u32 volatile FM1R; - u32 volatile reserved2; - u32 volatile FS1R; - u32 volatile reserved3; - u32 volatile FFA1R; - u32 volatile reserved4; - u32 volatile FA1R; - std::array volatile reserved5; - // Limited to only 14 on connectivity line devices - std::array filter_registers; -}; - -inline auto* can1_reg = reinterpret_cast(0x4000'6400); - -/// This struct holds bit timing values. -/// It is HW mapped to a 32-bit register: BTR (pg. 683). -struct bus_timing // NOLINT -{ - /// Baud Rate Prescaler - static constexpr auto prescalar = bit_mask::from<0, 9>(); - /// Time Segment 1 - static constexpr auto time_segment1 = bit_mask::from<16, 19>(); - /// Time Segment 2 - static constexpr auto time_segment2 = bit_mask::from<20, 22>(); - /// Resynchronization Jump Width - static constexpr auto sync_jump_width = bit_mask::from<24, 25>(); - /// Loop back mode (debug) - static constexpr auto loop_back_mode = bit_mask::from<30>(); - /// Silent Mode (debug) - static constexpr auto silent_mode = bit_mask::from<31>(); -}; - -/// This struct holds bit values for master control of CANx. -/// It is HW mapped to a 32-bit register: MCR (pg. 674). -struct master_control // NOLINT -{ - /// Software sets this bit to request the CAN hardware to enter - /// initialization mode. - static constexpr auto initialization_request = bit_mask::from<0>(); - /// Software sets this bit to request the CAN hardware to enter sleep mode. - static constexpr auto sleep_mode_request = bit_mask::from<1>(); - /// Set the transmission order when several mailboxes are pending at the - /// same time. - static constexpr auto transmit_fifo_priority = bit_mask::from<2>(); - /// Lock the FIFO from receiving new messages. - static constexpr auto receive_fifo_locked = bit_mask::from<3>(); - /// Disable CAN hardware from retransmiting until successfully transmitted. - static constexpr auto no_automatic_retransmission = bit_mask::from<4>(); - /// Controls the behavior of the CAN hardware on message reception during - /// Sleep. - static constexpr auto automatic_wakeup_mode = bit_mask::from<5>(); - /// Controls the behavior of the CAN hardware on leaving Bus-Off state. - static constexpr auto automatic_bus_off_management = bit_mask::from<6>(); - /// Enable Time Triggered Communication mode. - static constexpr auto time_triggered_comm_mode = bit_mask::from<7>(); - /// Force a master reset of the bxCan and go to Sleep mode. - static constexpr auto can_master_reset = bit_mask::from<15>(); - /// Freeze CAN reception/transmission during debug. - static constexpr auto debug_freeze = bit_mask::from<16>(); -}; - -/// This struct holds bit assignments for the Master Status Register (MSR) -/// It is HW mapped to a 32-bit register: MSR (pg. 676). -struct master_status // NOLINT -{ - /// Indicates to the software that the CAN hardware is now in initialization - /// mode - static constexpr auto initialization_acknowledge = bit_mask::from<0>(); - /// Indicates to the software that the CAN hardware is now in Sleep mode. - static constexpr auto sleep_acknowledge = bit_mask::from<1>(); - /// Set by hardware when a bit of the ESR has been set - static constexpr auto error_interrupt = bit_mask::from<2>(); - /// Set by hardware to signal that a SOF bit has been set. - static constexpr auto wakeup_interrupt = bit_mask::from<3>(); - /// Set by hardware to signal that the bxCan has entered sleep. - static constexpr auto sleep_acknowledge_interrupt = bit_mask::from<4>(); - /// Indicates if the CAN is a Transmitter - static constexpr auto transmit_mode = bit_mask::from<8>(); - /// Indicates if the CAN is a receiver - static constexpr auto receive_mode = bit_mask::from<9>(); - /// Holds the last value of Rx - static constexpr auto last_sample_point = bit_mask::from<10>(); - /// Monitors the actual value of the CAN_Rx pin. - static constexpr auto can_rx_signal = bit_mask::from<11>(); -}; - -/// This struct holds CANx transmit status information. -/// It is HW mapped to a 32-bit register: TSR (pg. 677). -struct transmit_status // NOLINT -{ - /// Mailbox 0 - Set by hardware when the last request (transmit or abort) - /// has been completed - static constexpr auto request_completed_mailbox0 = bit_mask::from<0>(); - /// Mailbox 0 - Hardware updates this bit after each transmission attempt - static constexpr auto transmission_ok_mailbox0 = bit_mask::from<1>(); - /// Mailbox 0 - Set when the previous TX failed due to arbitration lost - static constexpr auto arbitration_lost_mailbox0 = bit_mask::from<2>(); - /// Mailbox 0 - Set when the previous TX failed due to an error - static constexpr auto transmission_error_mailbox0 = bit_mask::from<3>(); - /// Mailbox 0 - Set by software to abort the transmission for the mailbox - static constexpr auto abort_request_mailbox0 = bit_mask::from<7>(); - /// Mailbox 1 - Set by hardware when the last request (transmit or abort) - /// has been completed - static constexpr auto request_completed_mailbox1 = bit_mask::from<8>(); - /// Mailbox 1 - Hardware updates this bit after each transmission attempt - static constexpr auto transmission_ok_mailbox1 = bit_mask::from<9>(); - /// Mailbox 1 - Set when the previous TX failed due to arbitration lost - static constexpr auto arbitration_lost_mailbox1 = bit_mask::from<10>(); - /// Mailbox 1 - Set when the previous TX failed due to an error - static constexpr auto transmission_error_mailbox1 = bit_mask::from<11>(); - /// Mailbox 1 - Set by software to abort the transmission for the mailbox - static constexpr auto abort_request_mailbox1 = bit_mask::from<15>(); - /// Mailbox 2 - Set by hardware when the last request (transmit or abort) - /// has been completed - static constexpr auto request_completed_mailbox2 = bit_mask::from<16>(); - /// Mailbox 2 - Hardware updates this bit after each transmission attempt - static constexpr auto transmission_ok_mailbox2 = bit_mask::from<17>(); - /// Mailbox 2 - Set when the previous TX failed due to arbitration lost - static constexpr auto arbitration_lost_mailbox2 = bit_mask::from<18>(); - /// Mailbox 2 - Set when the previous TX failed due to an error - static constexpr auto transmission_error_mailbox2 = bit_mask::from<19>(); - /// Mailbox 2 - Set by software to abort the transmission for the mailbox - static constexpr auto abort_request_mailbox2 = bit_mask::from<23>(); - /// Number of empty mailboxes - static constexpr auto mailbox_code = bit_mask::from<24, 25>(); - /// Mailbox 0 - Set by hardware to indicate empty - static constexpr auto transmit_mailbox0_empty = bit_mask::from<26>(); - /// Mailbox 1 - Set by hardware to indicate empty - static constexpr auto transmit_mailbox1_empty = bit_mask::from<27>(); - /// Mailbox 2 - Set by hardware to indicate empty - static constexpr auto transmit_mailbox2_empty = bit_mask::from<28>(); - /// Set by hardware when more than one mailbox is pending and mailbox 0 has - /// lower priority - static constexpr auto lowest_priority_flag_mailbox0 = bit_mask::from<29>(); - /// Set by hardware when more than one mailbox is pending and mailbox 1 has - /// lower priority - static constexpr auto lowest_priority_flag_mailbox1 = bit_mask::from<30>(); - /// Set by hardware when more than one mailbox is pending and mailbox 2 has - /// lower priority - static constexpr auto lowest_priority_flag_mailbox2 = bit_mask::from<31>(); -}; - -/// This struct holds the bitmap for enabling CANx interrupts. -/// It is HW mapped to a 32-bit register: TSR (pg. 680). -struct interrupt_enable_register // NOLINT -{ - /// Transmit mailbox empty interrupt enable - static constexpr auto transmit_mailbox_empty = bit_mask::from<0>(); - /// FIFO 0 message pending interrupt enable - static constexpr auto fifo0_message_pending = bit_mask::from<1>(); - /// FIFO 0 full interrupt enable - static constexpr auto fifo0_full = bit_mask::from<2>(); - /// FIFO 0 overrun interrupt enable - static constexpr auto fifo0_overrun = bit_mask::from<3>(); - /// FIFO 1 message pending interrupt enable - static constexpr auto fifo1_message_pending = bit_mask::from<4>(); - /// FIFO 1 full interrupt enable - static constexpr auto fifo1_full = bit_mask::from<5>(); - /// FIFO 1 overrun interrupt enable - static constexpr auto fifo1_overrun = bit_mask::from<6>(); - /// Error warning interrupt enable - static constexpr auto error_warning = bit_mask::from<8>(); - /// Error passive interrupt enable - static constexpr auto error_passive = bit_mask::from<9>(); - /// Bus-off interrupt enable - static constexpr auto bus_off = bit_mask::from<10>(); - /// Last error code interrupt enable - static constexpr auto last_error_code = bit_mask::from<11>(); - /// Error interrupt enable - static constexpr auto error_interrupt = bit_mask::from<15>(); - /// Wakeup interrupt enable - static constexpr auto wakeup = bit_mask::from<16>(); - /// Sleep interrupt enable - static constexpr auto sleep = bit_mask::from<17>(); -}; - -/// Strut holding the masks for the error status register -struct error_status_register -{ - /// Set to 1 if the device has been put in to the bus off state - static constexpr auto bus_off = bit_mask::from<2>(); -}; - -/// This struct holds the bitmap for the mailbox identifier. -/// It is represents 32-bit register: CAN_TIxR(0 - 2) (pg. 685). -/// It is represents 32-bit register: CAN_RIxR(0 - 1) (pg. 688). -struct mailbox_identifier // NOLINT -{ - enum class id_type : std::uint8_t - { - standard = 0, - extended = 1, - }; - - /// Transmit - static constexpr auto transmit_mailbox_request = bit_mask::from<0>(); - /// Receive/Transmit - static constexpr auto remote_request = bit_mask::from<1>(); - /// Receive/Transmit - static constexpr auto identifier_type = bit_mask::from<2>(); - /// Receive/Transmit - static constexpr auto standard_identifier = bit_mask::from<21, 31>(); - /// Receive/Transmit - static constexpr auto extended_identifier = bit_mask::from<3, 31>(); -}; - -/// This struct holds the bitmap for data length control and time stamp. -/// It is represents 32-bit register: CAN_TDTxR(0 - 2) (pg. 686). -/// It is represents 32-bit register: CAN_RDTxR(0 - 1) (pg. 689). -struct frame_length_and_info // NOLINT -{ - /// Receive/Transmit - static constexpr auto data_length_code = bit_mask::from<0, 3>(); - /// Transmit - static constexpr auto transmit_global_time = bit_mask::from<8>(); - /// Receive - static constexpr auto filter_match_index = bit_mask::from<8, 15>(); - /// Receive/Transmit - static constexpr auto message_time_stamp = bit_mask::from<16, 31>(); -}; - -/// This struct holds the bitmap for the FIFOx Status -/// It is represents 32-bit register: CAN_RFxR(0 - 1) (pg. 680). -struct fifo_status // NOLINT -{ - /// Indicates how many messages are pending in the receive FIFO - static constexpr auto messages_pending = bit_mask::from<0, 1>(); - /// Set by hardware when three messages are stored in the FIFO. - static constexpr auto is_fifo_full = bit_mask::from<3>(); - /// Set by hardware when a new message has been released and passed the - /// filter while the FIFO is full. - static constexpr auto is_fifo_overrun = bit_mask::from<4>(); - /// Release the output mailbox of the FIFO. - static constexpr auto release_output_mailbox = bit_mask::from<5>(); -}; - -/// This struct holds the bitmap for the filter master control. -/// It is represents 32-bit register: CAN_FMR (pg. 691). -struct filter_master -{ - /// Initialization mode for filter banks - static constexpr auto initialization_mode = bit_mask::from<0>(); - /// Defines the start bank for CAN2 - static constexpr auto can2_start_bank = bit_mask::from<8, 13>(); -}; - -/// This enumeration labels the initialization state of a filter. -/// Used with CAN Filter Master Register (CAN_FMR) (pg. 691). -enum class filter_bank_master_control : std::uint8_t -{ - /// Active filters state - active = 0, - /// Initialization state for the filter - initialization = 1 -}; - -/// This enumeration labels the mode of a filter -/// Used with CAN Filter Mode Register (CAN_FM1R) (pg. 692) -enum class filter_type : std::uint8_t -{ - /// Mask what bits in the identifier to accept - mask = 0, - /// List the identifier to accept - list = 1 -}; - -/// This enumeration labels the scale of a filter -/// Used with CAN Filter Scale Register (CAN_FS1R) (pg. 692) -enum class filter_scale : std::uint8_t -{ - /// Use two 16 bit identifiers - dual_16_bit_scale = 0, - /// Use one 32 bit identifier - single_32_bit_scale = 1 -}; - -/// This enumeration labels the activation state of a filter -/// Used with CAN Filter Activation Register (CAN_FFA1R) (pg. 693) -enum class filter_activation : std::uint8_t -{ - /// Disable filter - not_active = 0, - /// Enable fIlter - active = 1 -}; - -struct can_id -{ - static constexpr auto standard_id = hal::bit_mask::from(10, 0); - static constexpr auto standard_id_part = hal::bit_mask::from(29, 0); -}; - -struct standard_filter_bank -{ - static constexpr auto standard_id1 = hal::bit_mask::from(5, 15); - static constexpr auto rtr1 = hal::bit_mask::from(4); - static constexpr auto id_extension1 = hal::bit_mask::from(3); - static constexpr auto extended_id1 = hal::bit_mask::from(0, 2); - - static constexpr auto sub_bank1 = hal::bit_mask::from(0, 15); - static constexpr auto sub_bank2 = hal::bit_mask::from(16, 31); -}; -struct extended_filter_bank -{ - static constexpr auto id = hal::bit_mask::from(3, 31); - static constexpr auto id_extension = hal::bit_mask::from(2); - static constexpr auto rtr = hal::bit_mask::from(1); - static constexpr auto reserved = hal::bit_mask::from(0); -}; -} // namespace hal::stm32f1 diff --git a/src/stm32f1/clock.cpp b/src/stm32f1/clock.cpp deleted file mode 100644 index a355060..0000000 --- a/src/stm32f1/clock.cpp +++ /dev/null @@ -1,442 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include - -#include "flash_reg.hpp" -#include "rcc_reg.hpp" - -namespace hal::stm32f1 { - -namespace { -hal::hertz rtc_clock_rate = 0.0_Hz; // defaults to "no clock" -hal::hertz usb_clock_rate = 0.0_Hz; // pll is required thus undefined -hal::hertz pll_clock_rate = 0.0_Hz; // undefined until pll is enabled -hal::hertz ahb_clock_rate = internal_high_speed_oscillator; -hal::hertz apb1_clock_rate = internal_high_speed_oscillator; -hal::hertz apb2_clock_rate = internal_high_speed_oscillator; -hal::hertz timer_apb1_clock_rate = internal_high_speed_oscillator; -hal::hertz timer_apb2_clock_rate = internal_high_speed_oscillator; -hal::hertz adc_clock_rate = internal_high_speed_oscillator / 2; -} // namespace - -/// @attention If configuration of the system clocks is desired, one should -/// consult the user manual of the target MCU in use to determine -/// the valid clock configuration values that can/should be used. -/// The Initialize() method is only responsible for configuring the -/// clock system based on configurations in the -/// clock_configuration. Incorrect configurations may result in a -/// hard fault or cause the clock system(s) to supply incorrect -/// clock rate(s). -/// -/// @see Figure 11. Clock Tree -/// https://www.st.com/resource/en/reference_manual/cd00171190-stm32f101xx-stm32f102xx-stm32f103xx-stm32f105xx-and-stm32f107xx-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf#page=126 -void configure_clocks(clock_tree p_clock_tree) -{ - hal::hertz system_clock = 0.0_Hz; - - // ========================================================================= - // Step 1. Select internal clock source for everything. - // Make sure PLLs are not clock sources for everything. - // ========================================================================= - // Step 1.1 Set SystemClock to HSI - clock_configuration::reg().insert( - value(system_clock_select::high_speed_internal)); - - // Step 1.4 Reset RTC clock registers - rtc_register::reg().set(rtc_register::backup_domain_reset); - - // Manually clear the RTC reset bit - rtc_register::reg().clear(rtc_register::backup_domain_reset); - - // ========================================================================= - // Step 2. Disable PLL and external clock sources - // ========================================================================= - clock_control::reg() - // Step 2.1 Disable PLLs - .clear(clock_control::pll_enable) - // Step 2.1 Disable External Oscillators - .clear(clock_control::external_osc_enable); - - // ========================================================================= - // Step 3. Enable External Oscillators - // ========================================================================= - // Step 3.1 Enable High speed external Oscillator - if (p_clock_tree.high_speed_external > 1.0_MHz) { - clock_control::reg().set(clock_control::external_osc_enable); - - while (!bit_extract( - clock_control::reg().get())) { - continue; - } - } - - // Step 3.2 Enable Low speed external Oscillator - if (p_clock_tree.low_speed_external > 1.0_MHz) { - rtc_register::reg().set(rtc_register::low_speed_osc_enable); - - while (!bit_extract( - rtc_register::reg().get())) { - continue; - } - } - - // ========================================================================= - // Step 4. Set oscillator source for PLLs - // ========================================================================= - clock_configuration::reg() - .insert( - (p_clock_tree.pll.source == pll_source::high_speed_external_divided_by_2)) - .insert(value(p_clock_tree.pll.source)); - - // ========================================================================= - // Step 5. Setup PLLs and enable them where necessary - // ========================================================================= - if (p_clock_tree.pll.enable) { - clock_configuration::reg().insert( - value(p_clock_tree.pll.multiply)); - - clock_control::reg().set(); - - while (!bit_extract(clock_control::reg().get())) { - continue; - } - - switch (p_clock_tree.pll.source) { - case pll_source::internal_8mhz_divided_by_2: - pll_clock_rate = internal_high_speed_oscillator / 2; - break; - case pll_source::high_speed_external: - pll_clock_rate = p_clock_tree.high_speed_external; - break; - case pll_source::high_speed_external_divided_by_2: - pll_clock_rate = p_clock_tree.high_speed_external / 2; - break; - } - - // Multiply the PLL clock up to the correct rate. - float multiply = value(p_clock_tree.pll.multiply); - pll_clock_rate = pll_clock_rate * (multiply + 2.0f); - } - - // ========================================================================= - // Step 6. Setup peripheral dividers - // ========================================================================= - clock_configuration::reg() - // Step 6.1 Set USB divider - .insert( - value(p_clock_tree.pll.usb.divider)) - // Step 6.2 Set AHB divider - .insert(value(p_clock_tree.ahb.divider)) - // Step 6.3 Set APB1 divider - .insert( - value(p_clock_tree.ahb.apb1.divider)) - // Step 6.4 Set APB2 divider - .insert( - value(p_clock_tree.ahb.apb2.divider)) - // Step 6.5 Set ADC divider - .insert( - value(p_clock_tree.ahb.apb2.adc.divider)); - - // ========================================================================= - // Step 7. Set System Clock and RTC Clock - // ========================================================================= - uint32_t target_clock_source = value(p_clock_tree.system_clock); - - // Step 7.1 Set the Flash wait states appropriately prior to setting the - // system clock frequency. Failure to do this will cause the system - // to be unable to read from flash, resulting in the platform - // locking up. See p.60 of RM0008 for the Flash ACR register - if (p_clock_tree.system_clock == system_clock_select::pll) { - if (pll_clock_rate <= 24.0_MHz) { - // 0 Wait states - bit_modify(flash->acr).insert()>(0b000U); - } else if (24.0_MHz <= pll_clock_rate && pll_clock_rate <= 48.0_MHz) { - // 1 Wait state - bit_modify(flash->acr).insert()>(0b001U); - } else { - // 2 Wait states - bit_modify(flash->acr).insert()>(0b010U); - } - } - - // Step 7.2 Set system clock source - // NOTE: return error if clock = system_clock_select::high_speed_external - // and - // high speed external is not enabled. - clock_configuration::reg().insert( - value(p_clock_tree.system_clock)); - - while (bit_extract( - clock_configuration::reg().get()) != target_clock_source) { - continue; - } - - switch (p_clock_tree.system_clock) { - case system_clock_select::high_speed_internal: - system_clock = internal_high_speed_oscillator; - break; - case system_clock_select::high_speed_external: - system_clock = p_clock_tree.high_speed_external; - break; - case system_clock_select::pll: - system_clock = pll_clock_rate; - break; - } - - rtc_register::reg() - // Step 7.3 Set the RTC oscillator source - .insert(value(p_clock_tree.rtc.source)) - // Step 7.4 Enable/Disable the RTC - .insert(p_clock_tree.rtc.enable); - - // ========================================================================= - // Step 8. Define the clock rates for the system - // ========================================================================= - switch (p_clock_tree.ahb.divider) { - case ahb_divider::divide_by_1: - ahb_clock_rate = system_clock / 1; - break; - case ahb_divider::divide_by_2: - ahb_clock_rate = system_clock / 2; - break; - case ahb_divider::divide_by_4: - ahb_clock_rate = system_clock / 4; - break; - case ahb_divider::divide_by_8: - ahb_clock_rate = system_clock / 8; - break; - case ahb_divider::divide_by_16: - ahb_clock_rate = system_clock / 16; - break; - case ahb_divider::divide_by_64: - ahb_clock_rate = system_clock / 64; - break; - case ahb_divider::divide_by_128: - ahb_clock_rate = system_clock / 128; - break; - case ahb_divider::divide_by_256: - ahb_clock_rate = system_clock / 256; - break; - case ahb_divider::divide_by_512: - ahb_clock_rate = system_clock / 512; - break; - } - - switch (p_clock_tree.ahb.apb1.divider) { - case apb_divider::divide_by_1: - apb1_clock_rate = ahb_clock_rate / 1; - break; - case apb_divider::divide_by_2: - apb1_clock_rate = ahb_clock_rate / 2; - break; - case apb_divider::divide_by_4: - apb1_clock_rate = ahb_clock_rate / 4; - break; - case apb_divider::divide_by_8: - apb1_clock_rate = ahb_clock_rate / 8; - break; - case apb_divider::divide_by_16: - apb1_clock_rate = ahb_clock_rate / 16; - break; - } - - switch (p_clock_tree.ahb.apb2.divider) { - case apb_divider::divide_by_1: - apb2_clock_rate = ahb_clock_rate / 1; - break; - case apb_divider::divide_by_2: - apb2_clock_rate = ahb_clock_rate / 2; - break; - case apb_divider::divide_by_4: - apb2_clock_rate = ahb_clock_rate / 4; - break; - case apb_divider::divide_by_8: - apb2_clock_rate = ahb_clock_rate / 8; - break; - case apb_divider::divide_by_16: - apb2_clock_rate = ahb_clock_rate / 16; - break; - } - - switch (p_clock_tree.rtc.source) { - case rtc_source::no_clock: - rtc_clock_rate = 0.0_Hz; - break; - case rtc_source::low_speed_internal: - rtc_clock_rate = internal_low_speed_oscillator; - break; - case rtc_source::low_speed_external: - rtc_clock_rate = p_clock_tree.low_speed_external; - break; - case rtc_source::high_speed_external_divided_by_128: - rtc_clock_rate = p_clock_tree.high_speed_external / 128; - break; - } - - switch (p_clock_tree.pll.usb.divider) { - case usb_divider::divide_by_1: - usb_clock_rate = pll_clock_rate; - break; - case usb_divider::divide_by_1_point_5: - usb_clock_rate = (pll_clock_rate * 2) / 3; - break; - } - - switch (p_clock_tree.ahb.apb1.divider) { - case apb_divider::divide_by_1: - timer_apb1_clock_rate = apb1_clock_rate; - break; - default: - timer_apb1_clock_rate = apb1_clock_rate * 2; - break; - } - - switch (p_clock_tree.ahb.apb2.divider) { - case apb_divider::divide_by_1: - timer_apb2_clock_rate = apb2_clock_rate; - break; - default: - timer_apb2_clock_rate = apb2_clock_rate * 2; - break; - } - - switch (p_clock_tree.ahb.apb2.adc.divider) { - case adc_divider::divide_by_2: - adc_clock_rate = apb2_clock_rate / 2; - break; - case adc_divider::divide_by_4: - adc_clock_rate = apb2_clock_rate / 4; - break; - case adc_divider::divide_by_6: - adc_clock_rate = apb2_clock_rate / 6; - break; - case adc_divider::divide_by_8: - adc_clock_rate = apb2_clock_rate / 8; - break; - } -} - -/// @return the clock rate frequency of a peripheral -hal::hertz frequency(peripheral p_id) -{ - switch (p_id) { - case peripheral::i2s: - return pll_clock_rate; - case peripheral::usb: - return usb_clock_rate; - case peripheral::flitf: - return internal_high_speed_oscillator; - - // Arm Cortex running clock rate. - // This code does not utilize the /8 clock for the system timer, thus the - // clock rate for that subsystem is equal to the CPU running clock. - case peripheral::system_timer: - [[fallthrough]]; - case peripheral::cpu: - return ahb_clock_rate; - - // APB1 Timers - case peripheral::timer2: - [[fallthrough]]; - case peripheral::timer3: - [[fallthrough]]; - case peripheral::timer4: - [[fallthrough]]; - case peripheral::timer5: - [[fallthrough]]; - case peripheral::timer6: - [[fallthrough]]; - case peripheral::timer7: - [[fallthrough]]; - case peripheral::timer12: - [[fallthrough]]; - case peripheral::timer13: - [[fallthrough]]; - case peripheral::timer14: - return timer_apb1_clock_rate; - - // APB2 Timers - case peripheral::timer1: - [[fallthrough]]; - case peripheral::timer8: - [[fallthrough]]; - case peripheral::timer9: - [[fallthrough]]; - case peripheral::timer10: - [[fallthrough]]; - case peripheral::timer11: - return timer_apb2_clock_rate; - - case peripheral::adc1: - [[fallthrough]]; - case peripheral::adc2: - [[fallthrough]]; - case peripheral::adc3: - return adc_clock_rate; - default: { - auto id = value(p_id); - - if (id < apb1_bus) { - return ahb_clock_rate; - } - - if (apb1_bus <= id && id < apb2_bus) { - return apb1_clock_rate; - } - - if (apb2_bus <= id && id < beyond_bus) { - return apb2_clock_rate; - } - - return 0.0_Hz; - } - } - - return 0.0_Hz; -} - -void maximum_speed_using_internal_oscillator() -{ - using namespace hal::literals; - - configure_clocks(clock_tree{ - .high_speed_external = 0.0f, - .pll = { - .enable = true, - .source = pll_source::internal_8mhz_divided_by_2, - .multiply = pll_multiply::multiply_by_16, - .usb = { // NOTE: Cannot be used when using the internal oscillator - .divider = usb_divider::divide_by_1_point_5, - } - }, - .system_clock = system_clock_select::pll, - .ahb = { - .divider = ahb_divider::divide_by_1, - .apb1 = { - .divider = apb_divider::divide_by_2, - }, - .apb2 = { - .divider = apb_divider::divide_by_1, - .adc = { - .divider = adc_divider::divide_by_6, - } - }, - }, - }); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/dma.hpp b/src/stm32f1/dma.hpp deleted file mode 100644 index 93fae05..0000000 --- a/src/stm32f1/dma.hpp +++ /dev/null @@ -1,104 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include - -namespace hal::stm32f1::dma { -/// Namespace for the control registers (DMA->CCR) bit masks and predefined -/// settings constants. - -/// Declare this channel for Memory to memory mode -static constexpr auto memory_to_memory = hal::bit_mask::from<14>(); - -/// Configure the channel priority for this channel. -/// 0b00: Low -/// 0b01: Medium -/// 0b10: High -/// 0b11: Very high -static constexpr auto channel_priority = hal::bit_mask::from<12, 13>(); - -/// The size of each element of the memory. -/// 0b00: 8-bits -/// 0b01: 16-bits -/// 0b10: 32-bits -/// 0b11: Reserved -static constexpr auto memory_size = hal::bit_mask::from<10, 11>(); - -/// The peripheral register size. -/// 0b00: 8-bits -/// 0b01: 16-bits -/// 0b10: 32-bits -/// 0b11: Reserved -static constexpr auto peripheral_size = hal::bit_mask::from<8, 9>(); - -/// Activate memory increment mode, which will increment the memory address -/// with each transfer -static constexpr auto memory_increment_enable = hal::bit_mask::from<7>(); - -/// Activate memory increment mode, which will increment the peripheral -/// address with each transfer -static constexpr auto peripheral_increment_enable = hal::bit_mask::from<6>(); - -/// DMA will continuous load bytes into the buffer supplied in a circular -/// buffer manner. -static constexpr auto circular_mode = hal::bit_mask::from<5>(); - -/// Data transfer direction -/// 0: Read from peripheral -/// 1: Read from memory -static constexpr auto data_transfer_direction = hal::bit_mask::from<4>(); - -/// Enable interrupt on transfer error -static constexpr auto transfer_error_interrupt_enable = - hal::bit_mask::from<3>(); - -/// Enable interrupt on half of data transferred -static constexpr auto half_transfer_interrupt_enable = hal::bit_mask::from<2>(); - -/// Enable interrupt on complete transfer -static constexpr auto transfer_complete_interrupt_enable = - hal::bit_mask::from<1>(); - -/// Enable this DMA channel -static constexpr auto enable = hal::bit_mask::from<0>(); - -struct dma_channel_t -{ - std::uint32_t volatile configuration; - std::uint32_t volatile transfer_amount; - std::uint32_t volatile peripheral_address; - std::uint32_t volatile memory_address; - std::uint32_t volatile reserved; -}; - -struct dma_t -{ - std::uint32_t volatile interrupt_status; - std::uint32_t volatile interrupt_flag_clear; - std::array channel; -}; - -/// System control block address -inline constexpr auto dma1_addr = static_cast(0x4002'0000); -inline constexpr auto dma2_addr = static_cast(0x4002'0400); -// NOLINTBEGIN(performance-no-int-to-ptr) -inline auto* dma1 = reinterpret_cast(dma1_addr); -inline auto* dma2 = reinterpret_cast(dma2_addr); -// NOLINTEND(performance-no-int-to-ptr) -} // namespace hal::stm32f1::dma diff --git a/src/stm32f1/flash_reg.hpp b/src/stm32f1/flash_reg.hpp deleted file mode 100644 index bd090fe..0000000 --- a/src/stm32f1/flash_reg.hpp +++ /dev/null @@ -1,43 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include - -namespace hal::stm32f1 { -struct flash_t -{ - u32 volatile acr; - u32 volatile keyr; - u32 volatile optkeyr; - u32 volatile sr; - u32 volatile cr; - u32 volatile ar; - u32 volatile reserved; - u32 volatile obr; - u32 volatile wrpr; - std::array reserved1; - u32 volatile keyr2; - u32 reserved2; - u32 volatile sr2; - u32 volatile cr2; - u32 volatile ar2; -}; - -/// Pointer to the flash control register -inline flash_t* flash = reinterpret_cast(0x4002'2000); -} // namespace hal::stm32f1 diff --git a/src/stm32f1/gpio.cpp b/src/stm32f1/gpio.cpp deleted file mode 100644 index 80cd74d..0000000 --- a/src/stm32f1/gpio.cpp +++ /dev/null @@ -1,319 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "pin.hpp" -#include "power.hpp" - -namespace hal::stm32f1 { -namespace { -struct exti_reg_t -{ - /// Offset: 0x00 Interrupt Mask Register (R/W) - u32 volatile interrupt_mask; - /// Offset: 0x04 Event Mask Register (R/W) - u32 volatile event_mask; - /// Offset: 0x08 Rising Trigger Selection Register (R/W) - u32 volatile rising_trigger_selection; - /// Offset: 0x0C Falling Trigger Selection Register (R/W) - u32 volatile falling_trigger_selection; - /// Offset: 0x10 Software Interrupt Event Register Register (R/W) - u32 volatile software_interrupt_event; - /// Offset: 0x14 Pending Register (RC/W1) - u32 volatile pending; -}; - -constexpr std::uintptr_t stm_exti_addr = 0x4001'0400UL; -// NOLINTNEXTLINE(performance-no-int-to-ptr) -inline auto* exti_reg = reinterpret_cast(stm_exti_addr); - -std::array>, 16> - interrupt_handlers = {}; - -void external_interrupt_isr() -{ - // Find first interrupt to service - static constexpr auto pr_mask = hal::bit_mask::from(0, 15); - auto pending_reg = bit_extract(pr_mask, exti_reg->pending); - auto const pin_index = std::countr_zero(pending_reg); - - if (pin_index <= 15 && interrupt_handlers[pin_index]) { - // Determine which port is selected for given pin - int const afio_exticr_num = pin_index / 4; - int const afio_exti_bit_offset = (pin_index % 4) * 4; - auto const port_mask = - hal::bit_mask::from(afio_exti_bit_offset, afio_exti_bit_offset + 3); - auto const port = - bit_extract(port_mask, alternative_function_io->exticr[afio_exticr_num]); - - // Grab input pin value - auto const& gpio_reg = hal::stm32f1::gpio_reg('A' + port); - auto const pin_value = bit_extract(bit_mask::from(pin_index), gpio_reg.idr); - - // Call and handle callback - (*interrupt_handlers[pin_index])(pin_value); - auto const pending_mask = hal::bit_mask::from(pin_index); - hal::bit_modify(exti_reg->pending).set(pending_mask); - } -} - -u8 peripheral_to_letter(peripheral p_peripheral) -{ - // The numeric value of `peripheral::gpio_a` to ``peripheral::gpio_g` are - // contiguous in numeric value thus we can map letters 'A' to 'G' by doing - // this math here. - auto const offset = value(p_peripheral) - value(peripheral::gpio_a); - return 'A' + offset; -} -} // namespace - -gpio_manager::gpio_manager(peripheral p_port) - : m_port(p_port) -{ - if (not is_on(m_port)) { - power_on(m_port); - } -} - -gpio_manager::input gpio_manager::acquire_input_pin( - u8 p_pin, - input_pin::settings const& p_settings) -{ - return { m_port, p_pin, p_settings }; -} - -gpio_manager::output gpio_manager::acquire_output_pin( - u8 p_pin, - output_pin::settings const& p_settings) -{ - return { m_port, p_pin, p_settings }; -} - -gpio_manager::interrupt gpio_manager::acquire_interrupt_pin( - u8 p_pin, - interrupt_pin::settings const& p_settings) -{ - return { m_port, p_pin, p_settings }; -} - -gpio_manager::input::input(peripheral p_port, - u8 p_pin, - input_pin::settings const& p_settings) - : m_pin({ .port = peripheral_to_letter(p_port), .pin = p_pin }) -{ - reset_pin(m_pin); - gpio_manager::input::driver_configure(p_settings); -} - -void gpio_manager::input::driver_configure(settings const& p_settings) -{ - reset_pin(m_pin); - - if (p_settings.resistor == pin_resistor::pull_up) { - configure_pin(m_pin, input_pull_up); - } else if (p_settings.resistor == pin_resistor::pull_down) { - configure_pin(m_pin, input_pull_down); - } else { - configure_pin(m_pin, input_float); - } -} - -bool gpio_manager::input::driver_level() -{ - auto const& reg = gpio_reg(m_pin.port); - auto const pin_value = bit_extract(bit_mask::from(m_pin.pin), reg.idr); - return static_cast(pin_value); -} - -gpio_manager::output::output(peripheral p_port, - u8 p_pin, - output_pin::settings const& p_settings) - : m_pin({ .port = peripheral_to_letter(p_port), .pin = p_pin }) -{ - throw_if_pin_is_unavailable(m_pin); - gpio_manager::output::driver_configure(p_settings); -} - -void gpio_manager::output::driver_configure(settings const& p_settings) -{ - reset_pin(m_pin); - if (p_settings.open_drain) { - configure_pin(m_pin, open_drain_gpio_output); - } else { - configure_pin(m_pin, push_pull_gpio_output); - } - // NOTE: The `resistor` field is ignored in this function -} - -void gpio_manager::output::driver_level(bool p_high) -{ - if (p_high) { - // The first 16 bits of the register set the output state - gpio_reg(m_pin.port).bsrr = 1 << m_pin.pin; - } else { - // The last 16 bits of the register reset the output state - gpio_reg(m_pin.port).bsrr = 1 << (16 + m_pin.pin); - } -} - -bool gpio_manager::output::driver_level() -{ - auto const& reg = gpio_reg(m_pin.port); - auto const pin_value = bit_extract(bit_mask::from(m_pin.pin), reg.idr); - return static_cast(pin_value); -} - -gpio_manager::interrupt::interrupt(peripheral p_port, - u8 p_pin, - interrupt_pin::settings const& p_settings) - : m_pin({ .port = peripheral_to_letter(p_port), .pin = p_pin }) -{ - throw_if_pin_is_unavailable(m_pin); - setup_interrupt(); - driver_configure(p_settings); -} - -void gpio_manager::interrupt::setup_interrupt() -{ - // Verify EXTI line is not already in use - auto const exti_mask = hal::bit_mask::from(m_pin.pin); - auto const interrupt_enabled = - bit_extract(exti_mask, exti_reg->interrupt_mask); - auto const event_enabled = bit_extract(exti_mask, exti_reg->event_mask); - if (interrupt_enabled || event_enabled) { - hal::safe_throw(hal::device_or_resource_busy(this)); - } - - // Determine location of port selection for given pin and set the port - int const afio_exticr_num = m_pin.pin / 4; - int const afio_exti_bit_offset = (m_pin.pin % 4) * 4; - auto const port_mask = - hal::bit_mask::from(afio_exti_bit_offset, afio_exti_bit_offset + 3); - hal::bit_modify(alternative_function_io->exticr[afio_exticr_num]) - .insert(port_mask, static_cast(m_pin.port - 'A')); - - initialize_interrupts(); - // Some EXTI lines share the same IRQ, this skips enabling if this is the - // case. - auto const irq = get_irq(); - if (not hal::cortex_m::is_interrupt_enabled(irq)) { - cortex_m::enable_interrupt(irq, external_interrupt_isr); - } -} - -void gpio_manager::interrupt::driver_configure(settings const& p_settings) -{ - auto const exti_mask = hal::bit_mask::from(m_pin.pin); - hal::bit_modify(exti_reg->interrupt_mask).clear(exti_mask); - - reset_pin(m_pin); - if (p_settings.resistor == pin_resistor::pull_up) { - configure_pin(m_pin, input_pull_up); - } else if (p_settings.resistor == pin_resistor::pull_down) { - configure_pin(m_pin, input_pull_down); - } else { - configure_pin(m_pin, input_float); - } - - if (p_settings.trigger == trigger_edge::rising) { - hal::bit_modify(exti_reg->rising_trigger_selection).set(exti_mask); - hal::bit_modify(exti_reg->falling_trigger_selection).clear(exti_mask); - } else if (p_settings.trigger == trigger_edge::falling) { - hal::bit_modify(exti_reg->rising_trigger_selection).clear(exti_mask); - hal::bit_modify(exti_reg->falling_trigger_selection).set(exti_mask); - } else { - hal::bit_modify(exti_reg->rising_trigger_selection).set(exti_mask); - hal::bit_modify(exti_reg->falling_trigger_selection).set(exti_mask); - } - - hal::bit_modify(exti_reg->interrupt_mask).set(exti_mask); -} - -void gpio_manager::interrupt::driver_on_trigger( - hal::callback p_callback) -{ - interrupt_handlers[m_pin.pin] = p_callback; -} - -cortex_m::irq_t gpio_manager::interrupt::get_irq() -{ - switch (m_pin.pin) { - case 0: - return static_cast(irq::exti0); - case 1: - return static_cast(irq::exti1); - case 2: - return static_cast(irq::exti2); - case 3: - return static_cast(irq::exti3); - case 4: - return static_cast(irq::exti4); - case 5: - [[fallthrough]]; - case 6: - [[fallthrough]]; - case 7: - [[fallthrough]]; - case 8: - [[fallthrough]]; - case 9: - return static_cast(irq::exti9_5); - case 10: - [[fallthrough]]; - case 11: - [[fallthrough]]; - case 12: - [[fallthrough]]; - case 13: - [[fallthrough]]; - case 14: - [[fallthrough]]; - case 15: - [[fallthrough]]; - default: - return static_cast(irq::exti15_10); - } -} - -hal::v5::strong_ptr acquire_input_pin( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - u8 p_pin, - input_pin::settings const& p_settings) -{ - return hal::v5::make_strong_ptr( - p_allocator, p_manager->acquire_input_pin(p_pin, p_settings)); -} - -hal::v5::strong_ptr acquire_output_pin( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_manager, - u8 p_pin, - output_pin::settings const& p_settings) -{ - return hal::v5::make_strong_ptr( - p_allocator, p_manager->acquire_output_pin(p_pin, p_settings)); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/independent_watchdog.cpp b/src/stm32f1/independent_watchdog.cpp deleted file mode 100644 index 7d9ac42..0000000 --- a/src/stm32f1/independent_watchdog.cpp +++ /dev/null @@ -1,112 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include - -using namespace std::chrono_literals; - -namespace { -struct independent_watchdog_registers -{ - // setters are to not acidentily write in reserved memory - - void set_kr(uint16_t p_value) - { - constexpr hal::bit_mask writeable_kr = hal::bit_mask::from(0, 15); - hal::bit_modify(kr).insert(p_value); - } - void set_pr(uint8_t p_value) - { - constexpr hal::bit_mask writeable_pr = hal::bit_mask::from(0, 2); - hal::bit_modify(pr).insert(p_value); - } - void set_rlr(uint16_t p_value) - { - constexpr hal::bit_mask writeable_rlr = hal::bit_mask::from(0, 11); - hal::bit_modify(rlr).insert(p_value); - } - - uint32_t volatile kr; - uint32_t volatile pr; - uint32_t volatile rlr; - uint32_t volatile sr; -}; - -auto* const iwdg_regs = - reinterpret_cast(0x40003000); -// NOLINTBEGIN(performance-no-int-to-ptr) -uint32_t* const reset_status_register = - reinterpret_cast(0x40021000 + 0x24); -// NOLINTEND(performance-no-int-to-ptr) - -} // namespace - -namespace hal::stm32f1 { -void independent_watchdog::start() -{ - iwdg_regs->set_kr(0xCCCC); -} -void independent_watchdog::reset() -{ - iwdg_regs->set_kr(0xAAAA); -} - -void independent_watchdog::set_countdown_time(hal::time_duration p_wait_time) -{ - // convert to counts of 40khz clock (figure 11, pg. 126) - constexpr hal::time_duration nano_seconds_per_clock_cycle = - 1'000'000'000ns / 40'000; - long long cycle_count = p_wait_time / nano_seconds_per_clock_cycle; - // frq divider starts a /4 (table 96, pg. 495) - cycle_count = cycle_count >> 2; - if (cycle_count == 0) { - throw hal::operation_not_supported(nullptr); - } - - hal::byte frq_divider = 0; - while (cycle_count > 0x1000 && frq_divider <= 7) { - cycle_count = cycle_count >> 1; - frq_divider++; - } - if (frq_divider >= 7) { - throw hal::operation_not_supported(nullptr); - } else { - // register's shouldn't be edited when bits are 1 (sec. 19.4.4, pg. 498) - if (bit_extract(bit_mask::from(0, 1), iwdg_regs->sr)) { - throw hal::resource_unavailable_try_again(nullptr); - } - iwdg_regs->set_kr(0x5555); - iwdg_regs->set_pr(frq_divider); - iwdg_regs->set_rlr(cycle_count - 1); - } -} - -bool independent_watchdog::check_flag() -{ - // sec. 8.3.10, pg. 152 - bit_mask const flag = bit_mask::from(29); - return bit_extract(flag, *reset_status_register); -} - -void independent_watchdog::clear_flag() -{ - // sec. 8.3.10, pg. 152 - bit_mask const reset_flag = bit_mask::from(24); - bit_modify(*reset_status_register).set(reset_flag); -} - -} // namespace hal::stm32f1 diff --git a/src/stm32f1/input_pin.cpp b/src/stm32f1/input_pin.cpp deleted file mode 100644 index c8fae23..0000000 --- a/src/stm32f1/input_pin.cpp +++ /dev/null @@ -1,53 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include - -#include "pin.hpp" - -namespace hal::stm32f1 { -input_pin::input_pin(u8 p_port, // NOLINT - u8 p_pin) // NOLINT - - : m_port(p_port) - , m_pin(p_pin) -{ - input_pin::driver_configure({}); -} - -void input_pin::driver_configure(settings const& p_settings) -{ - pin_select const pin = { .port = m_port, .pin = m_pin }; - reset_pin(pin); - if (p_settings.resistor == pin_resistor::pull_up) { - configure_pin(pin, input_pull_up); - } else if (p_settings.resistor == pin_resistor::pull_down) { - configure_pin(pin, input_pull_down); - } else { - configure_pin(pin, input_float); - } -} - -bool input_pin::driver_level() -{ - auto const pin_value = - bit_extract(bit_mask::from(m_pin), gpio_reg(m_port).idr); - return static_cast(pin_value); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/interrupt.cpp b/src/stm32f1/interrupt.cpp deleted file mode 100644 index 32a20f7..0000000 --- a/src/stm32f1/interrupt.cpp +++ /dev/null @@ -1,23 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -namespace hal::stm32f1 { -void initialize_interrupts() -{ - hal::cortex_m::initialize_interrupts(); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/output_pin.cpp b/src/stm32f1/output_pin.cpp deleted file mode 100644 index 901a5ca..0000000 --- a/src/stm32f1/output_pin.cpp +++ /dev/null @@ -1,63 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include - -#include "pin.hpp" - -namespace hal::stm32f1 { -output_pin::output_pin(u8 p_port, // NOLINT - u8 p_pin, // NOLINT - output_pin::settings p_settings) - : m_port(p_port) - , m_pin(p_pin) -{ - // Ignore result as this function is infallible - output_pin::driver_configure(p_settings); -} - -void output_pin::driver_configure(settings const& p_settings) -{ - pin_select const pin = { .port = m_port, .pin = m_pin }; - reset_pin(pin); - if (p_settings.open_drain) { - configure_pin(pin, open_drain_gpio_output); - } else { - configure_pin(pin, push_pull_gpio_output); - } - // NOTE: The `resistor` field is ignored in this function -} - -void output_pin::driver_level(bool p_high) -{ - if (p_high) { - // The first 16 bits of the register set the output state - gpio_reg(m_port).bsrr = 1 << m_pin; - } else { - // The last 16 bits of the register reset the output state - gpio_reg(m_port).bsrr = 1 << (16 + m_pin); - } -} - -bool output_pin::driver_level() -{ - auto const pin_value = - bit_extract(bit_mask::from(m_pin), gpio_reg(m_port).idr); - - return static_cast(pin_value); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/pin.cpp b/src/stm32f1/pin.cpp deleted file mode 100644 index a0d3eea..0000000 --- a/src/stm32f1/pin.cpp +++ /dev/null @@ -1,193 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include -#include - -#include "pin.hpp" -#include "power.hpp" -#include "rcc_reg.hpp" - -namespace hal::stm32f1 { -namespace { -/// Returns a bit mask indicating where the config bits are in the config -/// registers. -bit_mask config_mask(u8 p_pin) -{ - return { - .position = static_cast((p_pin * 4) % 32), - .width = 4, - }; -} -/// Returns a bit mask indicating where the odr bit is in the output data -/// register. -bit_mask odr_mask(u8 p_pin) -{ - return { - .position = static_cast(p_pin), - .width = 1, - }; -} - -/// Returns the configuration control register for the specific pin. -/// Pins 0 - 7 are in CRL and Pins 8 - 15 are in CRH. -uint32_t volatile& config_register(pin_select const& p_pin_select) -{ - if (p_pin_select.pin <= 7) { - return gpio_reg(p_pin_select.port).crl; - } - return gpio_reg(p_pin_select.port).crh; -} - -/// Returns the output data register for the specific pin. -uint32_t volatile& odr_register(pin_select const& p_pin_select) -{ - return gpio_reg(p_pin_select.port).odr; -} - -void safely_power_on(pin_select const& p_pin_select) -{ - // Ensure that AFIO is powered on before attempting to access it - if (not is_on(peripheral::afio)) { - power_on(peripheral::afio); - } - - switch (p_pin_select.port) { - case 'A': - if (not is_on(peripheral::gpio_a)) { - power_on(peripheral::gpio_a); - } - break; - case 'B': - if (not is_on(peripheral::gpio_b)) { - power_on(peripheral::gpio_b); - } - break; - case 'C': - if (not is_on(peripheral::gpio_c)) { - power_on(peripheral::gpio_c); - } - break; - case 'D': - if (not is_on(peripheral::gpio_d)) { - power_on(peripheral::gpio_d); - } - break; - case 'E': - if (not is_on(peripheral::gpio_e)) { - power_on(peripheral::gpio_e); - } - break; - default: - hal::safe_throw(hal::argument_out_of_domain(nullptr)); - } -} - -std::array gpio_reg_map{ - reinterpret_cast(0x4001'0800), // 'A' - reinterpret_cast(0x4001'0c00), // 'B' - reinterpret_cast(0x4001'1000), // 'C' - reinterpret_cast(0x4001'1400), // 'D' - reinterpret_cast(0x4001'1800), // 'E' - reinterpret_cast(0x4001'1c00), // 'F' - reinterpret_cast(0x4001'2000), // 'G' -}; - -bool is_pin_reset(pin_select p_pin_select) -{ - auto& config_reg = config_register(p_pin_select); - auto const current_configuration = - bit_extract(config_mask(p_pin_select.pin), config_reg); - - return reset_pin_config == current_configuration; -} -} // namespace - -gpio_t& gpio_reg(u8 p_port) -{ - auto const offset = p_port - 'A'; - return *gpio_reg_map.at(offset); -} - -void throw_if_pin_is_unavailable(pin_select p_pin_select) -{ - if (not is_pin_reset(p_pin_select)) { - hal::safe_throw(hal::device_or_resource_busy(nullptr)); - } -} - -void configure_pin(pin_select p_pin_select, pin_config_t p_config) -{ - // The GPIO pins PB3, PB4, and PA15 are default initalized to be used for - // JTAG purposes. This releases them if they are being configured - if ((p_pin_select.port == 'B' && p_pin_select.pin == 3) || - (p_pin_select.port == 'B' && p_pin_select.pin == 4) || - (p_pin_select.port == 'A' && p_pin_select.pin == 15)) { - release_jtag_pins(); - } - auto& config_reg = config_register(p_pin_select); - auto& odr_reg = odr_register(p_pin_select); - safely_power_on(p_pin_select); - throw_if_pin_is_unavailable(p_pin_select); - - auto const config = bit_value(0) - .insert(p_config.CNF1) - .insert(p_config.CNF0) - .insert(p_config.MODE) - .get(); - - bit_modify(config_reg).insert(config_mask(p_pin_select.pin), config); - bit_modify(odr_reg).insert(odr_mask(p_pin_select.pin), p_config.PxODR); -} - -void reset_pin(pin_select p_pin_select) -{ - auto& config_reg = config_register(p_pin_select); - config_reg = bit_modify(config_reg) - .insert(config_mask(p_pin_select.pin), reset_pin_config) - .to(); -} - -void release_jtag_pins() -{ - // Ensure that AFIO is powered on before attempting to access it - if (not is_on(peripheral::afio)) { - power_on(peripheral::afio); - } - // Set the JTAG Release code - bit_modify(alternative_function_io->mapr) - .insert()>(0b010U); -} - -void activate_mco_pa8(mco_source p_source) -{ - configure_pin({ .port = 'A', .pin = 8 }, push_pull_alternative_output); - bit_modify(rcc->cfgr).insert(value(p_source)); -} - -void reset_mco_pa8() -{ - reset_pin({ .port = 'A', .pin = 8 }); -} - -void remap_pins(can_pins p_pin_select) -{ - constexpr auto can_pin_remap = bit_mask::from<14, 13>(); - bit_modify(alternative_function_io->mapr) - .insert(value(p_pin_select)); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/pin.hpp b/src/stm32f1/pin.hpp deleted file mode 100644 index 17c8510..0000000 --- a/src/stm32f1/pin.hpp +++ /dev/null @@ -1,243 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include -#include -#include -#include - -namespace hal::stm32f1 { - -struct alternative_function_io_t -{ - u32 volatile evcr; - u32 volatile mapr; - std::array exticr; - u32 reserved0; - u32 volatile mapr2; -}; - -/** - * @brief GPIO register map - * - */ -struct gpio_t -{ - u32 volatile crl; - u32 volatile crh; - u32 volatile idr; - u32 volatile odr; - u32 volatile bsrr; - u32 volatile brr; - u32 volatile lckr; -}; - -/** - * @brief Map the CONFIG flags for each pin use case - * - */ -struct pin_config_t -{ - /// Configuration bit 1 - u8 CNF1; - /// Configuration bit 0 - u8 CNF0; - /// Mode bits - u8 MODE; - /// Output data register - u8 PxODR; -}; - -static constexpr pin_config_t push_pull_gpio_output = { - .CNF1 = 0, - .CNF0 = 0, - .MODE = 0b11, // Default to high speed 50 MHz - .PxODR = 0b0, // Default to 0 LOW Voltage -}; - -static constexpr pin_config_t open_drain_gpio_output = { - .CNF1 = 0, - .CNF0 = 1, - .MODE = 0b11, // Default to high speed 50 MHz - .PxODR = 0b0, // Default to 0 LOW Voltage -}; - -static constexpr pin_config_t push_pull_alternative_output = { - .CNF1 = 1, - .CNF0 = 0, - .MODE = 0b11, // Default to high speed 50 MHz - .PxODR = 0b0, // Default to 0 LOW Voltage -}; - -static constexpr pin_config_t open_drain_alternative_output = { - .CNF1 = 1, - .CNF0 = 1, - .MODE = 0b11, // Default to high speed 50 MHz - .PxODR = 0b0, // Default to 0 LOW Voltage -}; - -static constexpr pin_config_t input_analog = { - .CNF1 = 0, - .CNF0 = 0, - .MODE = 0b00, - .PxODR = 0b0, // Don't care -}; - -static constexpr pin_config_t input_float = { - .CNF1 = 0, - .CNF0 = 1, - .MODE = 0b00, - .PxODR = 0b0, // Don't care -}; - -static constexpr pin_config_t input_pull_down = { - .CNF1 = 1, - .CNF0 = 0, - .MODE = 0b00, - .PxODR = 0b0, // Pull Down -}; - -static constexpr pin_config_t input_pull_up = { - .CNF1 = 1, - .CNF0 = 0, - .MODE = 0b00, - .PxODR = 0b1, // Pull Up -}; - -constexpr auto cnf1 = bit_mask::from<3>(); -constexpr auto cnf0 = bit_mask::from<2>(); -constexpr auto mode = bit_mask::from<0, 1>(); - -/** - * @brief This is the default state of each pin when the stm32f1 resets - * - * This is used to determine if a pin is in the reset state prior to - * configuration. This is also used to set the pin state when `reset_pin` is - * called. - */ -static constexpr auto reset_pin_config = bit_value(0) - .insert(input_float.CNF1) - .insert(input_float.CNF0) - .insert(input_float.MODE) - .get(); - -/** - * @brief Construct pin manipulation object - * - * @param p_pin_select - the pin to configure - * @param p_config - Configuration to set the pin to - * @throw hal::argument_out_of_domain - pin select is outside of the range of - * available pins. - * @throw hal::device_or_resource_busy - pin has already been configured once - * from its reset state and thus is in use by something else in the code. - */ -void configure_pin(pin_select p_pin_select, pin_config_t p_config); - -/** - * @brief Set pin to the system reset state - * - * This releases control over the pin and allows the pin to be reused by other - * drivers. - * - * @param p_pin_select - the pin to configure - * @param p_config - Configuration to set the pin to - */ -void reset_pin(pin_select p_pin_select); - -/** - * @brief Throws an exception if a pin is not available - * - * Use this function to validate if a pin is available. - * - * @param p_pin_select - the pin to validate - * @throw hal::device_or_resource_busy - if the pin is not available, meaning it - * was not in the reset state. - */ -void throw_if_pin_is_unavailable(pin_select p_pin_select); - -/** - * @brief Remap can pins - * - * @param p_pin_select - pair of pins to select - */ -void remap_pins(can_pins p_pin_select); - -/** - * @brief Returns the gpio register based on the port - * - * @param p_port - port letter, must be from 'A' to 'G' - * @return gpio_t& - gpio register map - */ -gpio_t& gpio_reg(u8 p_port); - -constexpr auto gpio_peripheral_offset(peripheral p_peripheral) -{ - // The numeric value of `peripheral::gpio_a` to ``peripheral::gpio_g` are - // contiguous in numeric value thus we can map letters 'A' to 'G' by doing - // this math here. - return value(p_peripheral) - value(peripheral::gpio_a); -} - -inline auto* alternative_function_io = - reinterpret_cast(0x4001'0000); - -struct pin_remap -{ - static constexpr auto adc2_etrgreg_remap = hal::bit_mask::from<20>(); - static constexpr auto adc2_etrginj_remap = hal::bit_mask::from<19>(); - static constexpr auto adc1_etrgreg_remap = hal::bit_mask::from<18>(); - static constexpr auto adc1_etrginj_remap = hal::bit_mask::from<17>(); - static constexpr auto tim5ch4_iremap = hal::bit_mask::from<16>(); - static constexpr auto pd01_remap = hal::bit_mask::from<15>(); - static constexpr auto can1_remap = hal::bit_mask::from<13, 14>(); - static constexpr auto tim4_rempap = hal::bit_mask::from<12>(); - static constexpr auto tim3_rempap = hal::bit_mask::from<10, 11>(); - static constexpr auto tim2_rempap = hal::bit_mask::from<8, 9>(); - static constexpr auto tim1_rempap = hal::bit_mask::from<6, 7>(); - static constexpr auto usart3_remap = hal::bit_mask::from<4, 5>(); - static constexpr auto usart2_remap = hal::bit_mask::from<3>(); - static constexpr auto usart1_remap = hal::bit_mask::from<2>(); - static constexpr auto i2c1_remap = hal::bit_mask::from<1>(); - static constexpr auto spi1_remap = hal::bit_mask::from<0>(); -}; - -struct pin_remap2 -{ - static constexpr auto ptp_pps_remap = hal::bit_mask::from<30>(); - static constexpr auto tim2itr1_iremap = hal::bit_mask::from<29>(); - static constexpr auto spi3_remap = hal::bit_mask::from<28>(); - static constexpr auto swj_cfg = hal::bit_mask::from<26, 24>(); - static constexpr auto mii_rmii_sel = hal::bit_mask::from<23>(); - static constexpr auto can2_remap = hal::bit_mask::from<22>(); - static constexpr auto eth_remap = hal::bit_mask::from<21>(); - - static constexpr auto tim5ch4_iremap = hal::bit_mask::from<16>(); - static constexpr auto pd01_remap = hal::bit_mask::from<15>(); - static constexpr auto can1_remap = hal::bit_mask::from<14, 13>(); - static constexpr auto tim4_rempap = hal::bit_mask::from<12>(); - static constexpr auto tim3_rempap = hal::bit_mask::from<11, 10>(); - static constexpr auto tim2_rempap = hal::bit_mask::from<9, 8>(); - static constexpr auto tim1_rempap = hal::bit_mask::from<7, 6>(); - static constexpr auto usart3_remap = hal::bit_mask::from<5, 4>(); - static constexpr auto usart2_remap = hal::bit_mask::from<3>(); - static constexpr auto usart1_remap = hal::bit_mask::from<2>(); - static constexpr auto i2c1_remap = hal::bit_mask::from<1>(); - static constexpr auto spi1_remap = hal::bit_mask::from<0>(); -}; -} // namespace hal::stm32f1 diff --git a/src/stm32f1/power.cpp b/src/stm32f1/power.cpp deleted file mode 100644 index 4a50d7a..0000000 --- a/src/stm32f1/power.cpp +++ /dev/null @@ -1,96 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include - -#include "power.hpp" -#include "rcc_reg.hpp" - -namespace hal::stm32f1 { -namespace { -struct rcc_register_info -{ - u32 volatile* reg; - hal::bit_mask mask; -}; - -rcc_register_info get_enable_register_info(peripheral p_peripheral) -{ - auto const peripheral_value = hal::value(p_peripheral); - auto const bus_number = peripheral_value / bus_id_offset; - auto const mask = bit_mask::from(peripheral_value % bus_id_offset); - switch (bus_number) { - case 0: - return { .reg = &rcc->ahbenr, .mask = mask }; - case 1: - return { .reg = &rcc->apb1enr, .mask = mask }; - case 2: - return { .reg = &rcc->apb2enr, .mask = mask }; - default: - hal::safe_throw(hal::argument_out_of_domain(nullptr)); - } -} - -rcc_register_info get_reset_register_info(peripheral p_peripheral) -{ - auto const peripheral_value = hal::value(p_peripheral); - auto const bus_number = peripheral_value / bus_id_offset; - auto const mask = bit_mask::from(peripheral_value % bus_id_offset); - switch (bus_number) { - case 0: - return { .reg = &rcc->ahbrstr, .mask = mask }; - case 1: - return { .reg = &rcc->apb1rstr, .mask = mask }; - case 2: - [[fallthrough]]; - default: - return { .reg = &rcc->apb2rstr, .mask = mask }; - } -} -} // namespace - -void power_on(peripheral p_peripheral) -{ - auto const info = get_enable_register_info(p_peripheral); - - if (hal::bit_extract(info.mask, *info.reg)) { - hal::safe_throw(hal::device_or_resource_busy(nullptr)); - } - - hal::bit_modify(*info.reg).set(info.mask); -} - -void power_off(peripheral p_peripheral) -{ - auto const info = get_enable_register_info(p_peripheral); - hal::bit_modify(*info.reg).clear(info.mask); -} - -bool is_on(peripheral p_peripheral) -{ - auto const info = get_enable_register_info(p_peripheral); - return hal::bit_extract(info.mask, *info.reg); -} - -void reset_peripheral(peripheral p_peripheral) -{ - auto const info = get_reset_register_info(p_peripheral); - hal::bit_modify(*info.reg).set(info.mask); - hal::bit_modify(*info.reg).clear(info.mask); -} - -} // namespace hal::stm32f1 diff --git a/src/stm32f1/power.hpp b/src/stm32f1/power.hpp deleted file mode 100644 index ec34d9c..0000000 --- a/src/stm32f1/power.hpp +++ /dev/null @@ -1,60 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::stm32f1 { -/** - * @brief Power on the peripheral - * - * This API also acts as a resource overlap detector. If this API is called - * twice on the same peripheral, it will throw an exception. Only drivers with - * control over the entire peripheral should call this API for their respective - * peripheral. This allows this API to detect when two driver attempt to utilize - * the same resource. - * - * @throws hal::device_or_resource_busy - if the peripheral is already powered - * on, constituting a violation of the 1 peripheral manager per peripheral rule. - * @throws hal::argument_out_of_domain - if the peripheral's value is outside of - * the bounds of the enum class OR if there is on enable register for that - * peripheral. - */ -void power_on(peripheral p_peripheral); - -/** - * @brief Power off peripheral - * - * If the peripheral is already powered off, this does nothing. - */ -void power_off(peripheral p_peripheral); - -/** - * @brief Check if the peripheral is powered on - * - * @return true - peripheral is on - * @return false - peripheral is off - */ -[[nodiscard]] bool is_on(peripheral p_peripheral); - -/** - * @brief Resets the peripheral - * - * This will reset all the peripheral's registers to their reset/default values. - * - */ -void reset_peripheral(peripheral p_peripheral); -} // namespace hal::stm32f1 diff --git a/src/stm32f1/pwm.cpp b/src/stm32f1/pwm.cpp deleted file mode 100644 index 5a72a9d..0000000 --- a/src/stm32f1/pwm.cpp +++ /dev/null @@ -1,369 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "pin.hpp" -#include "power.hpp" - -namespace { -struct pin_information -{ - hal::u8 channel; - hal::stm32f1::pin_select pin_select; -}; - -constexpr pin_information determine_pin_info( - hal::stm32f1::timer_pins p_pin, - hal::stm32f1::peripheral p_peripheral) -{ - pin_information pin_info; - switch (p_pin) { - case hal::stm32f1::timer_pins::pa0: - pin_info.pin_select.port = 'A'; - pin_info.pin_select.pin = 0; - pin_info.channel = 1; - break; - case hal::stm32f1::timer_pins::pa1: - pin_info.pin_select.port = 'A'; - pin_info.pin_select.pin = 1; - pin_info.channel = 2; - break; - case hal::stm32f1::timer_pins::pa2: - pin_info.pin_select.port = 'A'; - pin_info.pin_select.pin = 2; - pin_info.channel = - p_peripheral == hal::stm32f1::peripheral::timer9 ? 1 : 3; - break; - case hal::stm32f1::timer_pins::pa3: - pin_info.pin_select.port = 'A'; - pin_info.pin_select.pin = 3; - pin_info.channel = - p_peripheral == hal::stm32f1::peripheral::timer9 ? 2 : 4; - break; - case hal::stm32f1::timer_pins::pa6: - pin_info.pin_select.port = 'A'; - pin_info.pin_select.pin = 6; - pin_info.channel = 1; - break; - case hal::stm32f1::timer_pins::pa7: - pin_info.pin_select.port = 'A'; - pin_info.pin_select.pin = 7; - pin_info.channel = - p_peripheral == hal::stm32f1::peripheral::timer14 ? 1 : 2; - break; - case hal::stm32f1::timer_pins::pb0: - pin_info.pin_select.port = 'B'; - pin_info.pin_select.pin = 0; - pin_info.channel = 3; - break; - case hal::stm32f1::timer_pins::pb1: - pin_info.pin_select.port = 'B'; - pin_info.pin_select.pin = 1; - pin_info.channel = 4; - break; - case hal::stm32f1::timer_pins::pb6: - pin_info.pin_select.port = 'B'; - pin_info.pin_select.pin = 6; - pin_info.channel = 1; - break; - case hal::stm32f1::timer_pins::pb7: - pin_info.pin_select.port = 'B'; - pin_info.pin_select.pin = 7; - pin_info.channel = 2; - break; - case hal::stm32f1::timer_pins::pb8: - pin_info.pin_select.port = 'B'; - pin_info.pin_select.pin = 8; - pin_info.channel = - p_peripheral == hal::stm32f1::peripheral::timer10 ? 1 : 3; - break; - case hal::stm32f1::timer_pins::pb9: - pin_info.pin_select.port = 'B'; - pin_info.pin_select.pin = 9; - pin_info.channel = - p_peripheral == hal::stm32f1::peripheral::timer11 ? 1 : 4; - break; - case hal::stm32f1::timer_pins::pa8: - pin_info.pin_select.port = 'A'; - pin_info.pin_select.pin = 8; - pin_info.channel = 1; - break; - case hal::stm32f1::timer_pins::pa9: - pin_info.pin_select.port = 'A'; - pin_info.pin_select.pin = 9; - pin_info.channel = 2; - break; - case hal::stm32f1::timer_pins::pa10: - pin_info.pin_select.port = 'A'; - pin_info.pin_select.pin = 10; - pin_info.channel = 3; - break; - case hal::stm32f1::timer_pins::pa11: - pin_info.pin_select.port = 'A'; - pin_info.pin_select.pin = 11; - pin_info.channel = 4; - break; - case hal::stm32f1::timer_pins::pc6: - pin_info.pin_select.port = 'C'; - pin_info.pin_select.pin = 6; - pin_info.channel = 1; - break; - case hal::stm32f1::timer_pins::pc7: - pin_info.pin_select.port = 'C'; - pin_info.pin_select.pin = 7; - pin_info.channel = 2; - break; - case hal::stm32f1::timer_pins::pc8: - pin_info.pin_select.port = 'C'; - pin_info.pin_select.pin = 8; - pin_info.channel = 3; - break; - case hal::stm32f1::timer_pins::pc9: - pin_info.pin_select.port = 'C'; - pin_info.pin_select.pin = 9; - pin_info.channel = 4; - break; - case hal::stm32f1::timer_pins::pb14: - pin_info.pin_select.port = 'B'; - pin_info.pin_select.pin = 14; - pin_info.channel = 1; - break; - case hal::stm32f1::timer_pins::pb15: - pin_info.pin_select.port = 'B'; - pin_info.pin_select.pin = 15; - pin_info.channel = 2; - break; - default: - std::unreachable(); - } - return pin_info; -} -} // namespace - -namespace hal::stm32f1 { - -pwm_group_frequency::pwm_group_frequency(void* p_reg, - timer_manager_data* p_manager_data_ptr) - : m_pwm_frequency(unsafe{}, p_reg) - , m_manager_data_ptr(p_manager_data_ptr) -{ - m_manager_data_ptr->m_usage = timer_manager_data::usage::pwm_generator; - m_manager_data_ptr->m_resource_count++; -} - -pwm_group_frequency::pwm_group_frequency(pwm_group_frequency&& p_other) noexcept - : m_pwm_frequency(std::move(p_other.m_pwm_frequency)) -{ - m_manager_data_ptr = std::exchange(p_other.m_manager_data_ptr, nullptr); -} - -pwm_group_frequency& pwm_group_frequency::operator=( - pwm_group_frequency&& p_other) noexcept -{ - if (this == &p_other) { - return *this; - } - - m_pwm_frequency = std::move(p_other.m_pwm_frequency); - m_manager_data_ptr = std::exchange(p_other.m_manager_data_ptr, nullptr); - - return *this; -} - -pwm_group_frequency::~pwm_group_frequency() -{ - if (m_manager_data_ptr == nullptr) { - return; - } - - m_manager_data_ptr->m_resource_count--; - - if (m_manager_data_ptr->m_resource_count.load() == 0) { - m_manager_data_ptr->m_usage = timer_manager_data::usage::uninitialized; - reset_peripheral(m_manager_data_ptr->m_id); - } -} - -void pwm_group_frequency::driver_frequency(u32 p_frequency) -{ - return m_pwm_frequency.set_group_frequency({ - .pwm_frequency = p_frequency, - .timer_clock_frequency = - static_cast(stm32f1::frequency(m_manager_data_ptr->m_id)), - }); -} - -pwm16_channel::pwm16_channel(void* p_reg, - timer_manager_data* p_manager_data_ptr, - bool p_is_advanced, - timer_pins p_pin) - : m_pwm(unsafe{}) - , m_pin(p_pin) - , m_manager_data_ptr(p_manager_data_ptr) -{ - pin_information pin_info = - determine_pin_info(m_pin, m_manager_data_ptr->m_id); - configure_pin(pin_info.pin_select, push_pull_alternative_output); - - // a generic pwm class requires a pin and a channel in order to use the right - // registers, therefore we pass in the channel as an argument in the generic - // pwm class's constructor - m_pwm.initialize(unsafe{}, - p_reg, - { - .channel = pin_info.channel, - .is_advanced = p_is_advanced, - }); - - m_manager_data_ptr->m_usage = timer_manager_data::usage::pwm_generator; - m_manager_data_ptr->m_resource_count++; -} -pwm16_channel::pwm16_channel(pwm16_channel&& p_other) noexcept - : m_pwm(std::move(p_other.m_pwm)) -{ - m_pin = p_other.m_pin; - m_manager_data_ptr = std::exchange(p_other.m_manager_data_ptr, nullptr); -} - -pwm16_channel& pwm16_channel::operator=(pwm16_channel&& p_other) noexcept -{ - if (this == &p_other) { - return *this; - } - m_pwm = std::move(p_other.m_pwm); - m_pin = p_other.m_pin; - m_manager_data_ptr = std::exchange(p_other.m_manager_data_ptr, nullptr); - return *this; -} -pwm16_channel::~pwm16_channel() -{ - if (m_manager_data_ptr == nullptr) { - return; - } - - pin_information pin_info = - determine_pin_info(m_pin, m_manager_data_ptr->m_id); - reset_pin(pin_info.pin_select); - - m_manager_data_ptr->m_resource_count--; - - if (m_manager_data_ptr->m_resource_count.load() == 0) { - m_manager_data_ptr->m_usage = timer_manager_data::usage::uninitialized; - reset_peripheral(m_manager_data_ptr->m_id); - } -} - -u32 pwm16_channel::driver_frequency() -{ - return m_pwm.frequency( - static_cast(stm32f1::frequency(m_manager_data_ptr->m_id))); -} - -void pwm16_channel::driver_duty_cycle(u16 p_duty_cycle) -{ - m_pwm.duty_cycle(p_duty_cycle); -} - -pwm::pwm(void* p_reg, - timer_manager_data* p_manager_data_ptr, - bool p_is_advanced, - stm32f1::timer_pins p_pin) - : m_pwm(unsafe{}) - , m_pwm_frequency(unsafe{}, p_reg) - , m_pin(p_pin) - , m_manager_data_ptr(p_manager_data_ptr) -{ - pin_information pin_info = - determine_pin_info(m_pin, m_manager_data_ptr->m_id); - configure_pin(pin_info.pin_select, push_pull_alternative_output); - - // a generic pwm class requires a pin and a channel in order to use the right - // registers, therefore we pass in the channel as an argument in the generic - // pwm class's constructor - m_pwm.initialize(unsafe{}, - p_reg, - { - .channel = pin_info.channel, - .is_advanced = p_is_advanced, - }); - - m_manager_data_ptr->m_usage = timer_manager_data::usage::old_pwm; - m_manager_data_ptr->m_resource_count++; -} - -pwm::pwm(pwm&& p_other) noexcept - : m_pwm(std::move(p_other.m_pwm)) - , m_pwm_frequency(std::move(p_other.m_pwm_frequency)) - , m_pin(p_other.m_pin) - , m_manager_data_ptr(p_other.m_manager_data_ptr) -{ - m_manager_data_ptr = std::exchange(p_other.m_manager_data_ptr, nullptr); -} - -pwm& pwm::operator=(pwm&& p_other) noexcept -{ - if (this == &p_other) { - return *this; - } - - m_pwm = std::move(p_other.m_pwm); - m_pwm_frequency = std::move(p_other.m_pwm_frequency); - m_pin = p_other.m_pin; - m_manager_data_ptr = std::exchange(p_other.m_manager_data_ptr, nullptr); - - return *this; -} - -pwm::~pwm() -{ - if (m_manager_data_ptr == nullptr) { - return; - } - pin_information pin_info = - determine_pin_info(m_pin, m_manager_data_ptr->m_id); - reset_pin(pin_info.pin_select); - - m_manager_data_ptr->m_resource_count--; - - if (m_manager_data_ptr->m_resource_count.load() == 0) { - m_manager_data_ptr->m_usage = timer_manager_data::usage::uninitialized; - reset_peripheral(m_manager_data_ptr->m_id); - } -} - -void pwm::driver_frequency(hertz p_frequency) -{ - m_pwm_frequency.set_group_frequency({ - .pwm_frequency = static_cast(p_frequency), - .timer_clock_frequency = - static_cast(stm32f1::frequency(m_manager_data_ptr->m_id)), - }); -} - -void pwm::driver_duty_cycle(float p_duty_cycle) -{ - m_pwm.duty_cycle(p_duty_cycle); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/quadrature_encoder.cpp b/src/stm32f1/quadrature_encoder.cpp deleted file mode 100644 index d87d185..0000000 --- a/src/stm32f1/quadrature_encoder.cpp +++ /dev/null @@ -1,180 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include -#include -#include - -#include "power.hpp" -#include "quadrature_encoder.hpp" -#include "stm32f1/pin.hpp" - -namespace hal::stm32f1 { - -int get_channel_from_pin(hal::stm32f1::timer_pins p_pin, - hal::stm32f1::peripheral p_select) -{ - // a generic pwm class requires a pin and a channel in order to use the right - // registers, therefore we pass in the channel as an argument in the generic - // pwm class's constructor - u8 channel = 0; - switch (p_pin) { - case timer_pins::pa0: - configure_pin({ .port = 'A', .pin = 0 }, input_float); - channel = 1; - break; - case timer_pins::pa1: - configure_pin({ .port = 'A', .pin = 1 }, input_float); - channel = 2; - break; - case timer_pins::pa2: - configure_pin({ .port = 'A', .pin = 2 }, input_float); - channel = p_select == peripheral::timer9 ? 1 : 3; - break; - case timer_pins::pa3: - configure_pin({ .port = 'A', .pin = 3 }, input_float); - channel = p_select == peripheral::timer9 ? 2 : 4; - break; - case timer_pins::pa6: - configure_pin({ .port = 'A', .pin = 6 }, input_float); - channel = 1; - break; - case timer_pins::pa7: - configure_pin({ .port = 'A', .pin = 7 }, input_float); - channel = p_select == peripheral::timer14 ? 1 : 2; - break; - case timer_pins::pb0: - configure_pin({ .port = 'B', .pin = 0 }, input_float); - channel = 3; - break; - case timer_pins::pb1: - configure_pin({ .port = 'B', .pin = 1 }, input_float); - channel = 4; - break; - case timer_pins::pb6: - configure_pin({ .port = 'B', .pin = 6 }, input_float); - channel = 1; - break; - case timer_pins::pb7: - configure_pin({ .port = 'B', .pin = 7 }, input_float); - channel = 2; - break; - case timer_pins::pb8: - configure_pin({ .port = 'B', .pin = 8 }, input_float); - channel = p_select == peripheral::timer10 ? 1 : 3; - break; - case timer_pins::pb9: - configure_pin({ .port = 'B', .pin = 9 }, input_float); - channel = p_select == peripheral::timer11 ? 1 : 4; - break; - case timer_pins::pa8: - configure_pin({ .port = 'A', .pin = 8 }, input_float); - channel = 1; - break; - case timer_pins::pa9: - configure_pin({ .port = 'A', .pin = 9 }, input_float); - channel = 2; - break; - case timer_pins::pa10: - configure_pin({ .port = 'A', .pin = 10 }, input_float); - channel = 3; - break; - case timer_pins::pa11: - configure_pin({ .port = 'A', .pin = 11 }, input_float); - channel = 4; - break; - case timer_pins::pc6: - configure_pin({ .port = 'C', .pin = 6 }, input_float); - channel = 1; - break; - case timer_pins::pc7: - configure_pin({ .port = 'C', .pin = 7 }, input_float); - channel = 2; - break; - case timer_pins::pc8: - configure_pin({ .port = 'C', .pin = 8 }, input_float); - channel = 3; - break; - case timer_pins::pc9: - configure_pin({ .port = 'C', .pin = 9 }, input_float); - channel = 4; - break; - case timer_pins::pb14: - configure_pin({ .port = 'B', .pin = 14 }, input_float); - channel = 1; - break; - case timer_pins::pb15: - configure_pin({ .port = 'B', .pin = 15 }, input_float); - channel = 2; - break; - default: - std::unreachable(); - } - return channel; -} -quadrature_encoder::quadrature_encoder(hal::stm32f1::timer_pins p_pin1, - hal::stm32f1::timer_pins p_pin2, - hal::stm32f1::peripheral p_select, - void* p_reg, - timer_manager_data* p_manager_data_ptr, - u32 p_pulses_per_rotation) - : m_encoder(hal::unsafe{}) - , m_manager_data_ptr(p_manager_data_ptr) -{ - u8 const channel_a = get_channel_from_pin(p_pin1, p_select); - u8 const channel_b = get_channel_from_pin(p_pin2, p_select); - if (channel_a >= 3 || channel_b >= 3) { - // only channels 1 and 2 are allowed for quadrature encoder mode. - hal::safe_throw(hal::operation_not_permitted(this)); - } - p_manager_data_ptr->m_usage = timer_manager_data::usage::quadrature_encoder; - m_encoder.initialize(hal::unsafe{}, - { .channel_a = channel_a, .channel_b = channel_b }, - p_reg, - p_pulses_per_rotation); -} - -quadrature_encoder::quadrature_encoder(quadrature_encoder&& p_other) noexcept - : m_encoder(std::move(p_other.m_encoder)) -{ - m_manager_data_ptr = std::exchange(p_other.m_manager_data_ptr, nullptr); -} - -quadrature_encoder& quadrature_encoder::operator=( - quadrature_encoder&& p_other) noexcept -{ - if (this == &p_other) { - return *this; - } - m_encoder = std::move(p_other.m_encoder); - m_manager_data_ptr = std::exchange(p_other.m_manager_data_ptr, nullptr); - return *this; -} -quadrature_encoder::read_t quadrature_encoder::driver_read() -{ - return m_encoder.read(); -} - -quadrature_encoder::~quadrature_encoder() -{ - if (m_manager_data_ptr) { - m_manager_data_ptr->m_usage = timer_manager_data::usage::uninitialized; - reset_peripheral(m_manager_data_ptr->m_id); - } -} - -} // namespace hal::stm32f1 diff --git a/src/stm32f1/quadrature_encoder.hpp b/src/stm32f1/quadrature_encoder.hpp deleted file mode 100644 index 8de7cfe..0000000 --- a/src/stm32f1/quadrature_encoder.hpp +++ /dev/null @@ -1,36 +0,0 @@ -#pragma once - -#include -#include -#include - -namespace hal::stm32f1 { -/** - * @brief This class implements the `hal::rotation_sensor` interface - * - * It gets an input from a quadrature encoder motor and measures the amount turn - * using 2 channels as input. - * - * Each Quadrature Encoder must use channel 1 and 2 from the same timer. - */ -class quadrature_encoder : public hal::rotation_sensor -{ -public: - quadrature_encoder(hal::stm32f1::timer_pins p_pin1, - hal::stm32f1::timer_pins p_pin2, - hal::stm32f1::peripheral p_select, - void* p_reg, - timer_manager_data* p_manager_data_ptr, - u32 p_pulses_per_rotation); - quadrature_encoder(quadrature_encoder const& p_other) = delete; - quadrature_encoder& operator=(quadrature_encoder const& p_other) = delete; - quadrature_encoder(quadrature_encoder&& p_other) noexcept; - quadrature_encoder& operator=(quadrature_encoder&& p_other) noexcept; - ~quadrature_encoder() override; - -private: - read_t driver_read() override; - hal::stm32_generic::quadrature_encoder m_encoder; - timer_manager_data* m_manager_data_ptr; -}; -} // namespace hal::stm32f1 diff --git a/src/stm32f1/rcc_reg.hpp b/src/stm32f1/rcc_reg.hpp deleted file mode 100644 index 646ce7a..0000000 --- a/src/stm32f1/rcc_reg.hpp +++ /dev/null @@ -1,126 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::stm32f1 { -struct reset_and_clock_control_t -{ - u32 volatile cr; - u32 volatile cfgr; - u32 volatile cir; - u32 volatile apb2rstr; - u32 volatile apb1rstr; - u32 volatile ahbenr; - u32 volatile apb2enr; - u32 volatile apb1enr; - u32 volatile bdcr; - u32 volatile csr; - u32 volatile ahbrstr; - u32 volatile cfgr2; -}; - -constexpr uptr rcc_address = 0x40000000 + 0x20000 + 0x1000; - -/** - * @return reset_and_clock_control_t& - return reset_and_clock_control_t - * register. - */ -// NOLINTNEXTLINE(performance-no-int-to-ptr) -inline auto* rcc = reinterpret_cast(rcc_address); - -/// Bit masks for the CFGR register -struct clock_configuration -{ - /// Controls which clock signal is sent to the MCO pin - static constexpr auto mco = bit_mask::from<24, 26>(); - - /// Sets the USB clock divider - static constexpr auto usb_prescalar = bit_mask::from<22>(); - - /// Sets the PLL multiplier - static constexpr auto pll_mul = bit_mask::from<18, 21>(); - - /// If set to 1, will divide the HSE signal by 2 before sending to PLL - static constexpr auto hse_pre_divider = bit_mask::from<17>(); - - /// Sets which source the PLL will take as input - static constexpr auto pll_source = bit_mask::from<16>(); - - /// Sets the clock divider for the ADC peripherals - static constexpr auto adc_divider = bit_mask::from<14, 15>(); - - /// Sets the divider for peripherals on the APB2 bus - static constexpr auto apb_2_divider = bit_mask::from<11, 13>(); - - /// Sets the divider for peripherals on the APB1 bus - static constexpr auto apb_1_divider = bit_mask::from<8, 10>(); - - /// Sets the divider for peripherals on the AHB bus - static constexpr auto ahb_divider = bit_mask::from<4, 7>(); - - /// Used to check if the system clock has taken the new system clock - /// settings. - static constexpr auto system_clock_status = bit_mask::from<2, 3>(); - - /// Set which clock will be used for the system clock. - static constexpr auto system_clock_select = bit_mask::from<0, 1>(); - - static auto reg() - { - return hal::bit_modify(rcc->cfgr); - } -}; - -/// Bit masks for the CR register -struct clock_control -{ - /// Indicates if the PLL is enabled and ready - static constexpr auto pll_ready = bit_mask::from<25>(); - /// Used to enable the PLL - static constexpr auto pll_enable = bit_mask::from<24>(); - /// Indicates if the external oscillator is ready for use - static constexpr auto external_osc_ready = bit_mask::from<17>(); - /// Used to enable the external oscillator - static constexpr auto external_osc_enable = bit_mask::from<16>(); - - static auto reg() - { - return hal::bit_modify(rcc->cr); - } -}; - -/// Bitmasks for the BDCR register -struct rtc_register -{ - /// Will reset all clock states for the RTC - static constexpr auto backup_domain_reset = bit_mask::from<16>(); - /// Enables the RTC clock - static constexpr auto rtc_enable = bit_mask::from<15>(); - /// Selects the clock source for the RTC - static constexpr auto rtc_source_select = bit_mask::from<8, 9>(); - /// Indicates if the LSE is ready for use - static constexpr auto low_speed_osc_ready = bit_mask::from<1>(); - /// Used to enable the LSE - static constexpr auto low_speed_osc_enable = bit_mask::from<0>(); - - static auto reg() - { - return hal::bit_modify(rcc->bdcr); - } -}; -} // namespace hal::stm32f1 diff --git a/src/stm32f1/spi.cpp b/src/stm32f1/spi.cpp deleted file mode 100644 index 68393d7..0000000 --- a/src/stm32f1/spi.cpp +++ /dev/null @@ -1,125 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include -#include -#include - -#include "pin.hpp" -#include "power.hpp" - -namespace hal::stm32f1 { -namespace { -inline void* peripheral_to_address(peripheral p_id) -{ - constexpr std::uintptr_t spi_reg1 = 0x4001'3000; - constexpr std::uintptr_t spi_reg2 = 0x4000'3800; - constexpr std::uintptr_t spi_reg3 = 0x4000'3C00; - - switch (p_id) { - case peripheral::spi1: - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(spi_reg1); - case peripheral::spi2: - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(spi_reg2); - case peripheral::spi3: - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(spi_reg3); - default: - hal::safe_throw(hal::operation_not_supported(nullptr)); - } -} - -inline peripheral bus_number_to_peripheral(std::uint8_t p_bus_number) -{ - switch (p_bus_number) { - case 1: - return peripheral::spi1; - case 2: - return peripheral::spi2; - case 3: - return peripheral::spi3; - default: - hal::safe_throw(hal::operation_not_supported(nullptr)); - } -} -} // namespace - -spi::spi(std::uint8_t p_bus_number, spi::settings const& p_settings) - : m_peripheral_id(bus_number_to_peripheral(p_bus_number)) - , m_spi_driver(hal::unsafe{}, peripheral_to_address(m_peripheral_id)) -{ - // Datasheet: Chapter 4: Pin definition Table 9 - switch (m_peripheral_id) { - case peripheral::spi1: { - hal::bit_modify(alternative_function_io->mapr) - .clear(); - // clock - configure_pin({ .port = 'A', .pin = 5 }, push_pull_alternative_output); - // cipo - configure_pin({ .port = 'A', .pin = 6 }, input_float); - // copi - configure_pin({ .port = 'A', .pin = 7 }, push_pull_alternative_output); - break; - } - case peripheral::spi2: { - // clock - configure_pin({ .port = 'B', .pin = 13 }, push_pull_alternative_output); - // cipo - configure_pin({ .port = 'B', .pin = 14 }, input_float); - // copi - configure_pin({ .port = 'B', .pin = 15 }, push_pull_alternative_output); - break; - } - case peripheral::spi3: { - hal::bit_modify(alternative_function_io->mapr2) - .set(); - // clock - configure_pin({ .port = 'C', .pin = 10 }, push_pull_alternative_output); - // cipo - configure_pin({ .port = 'C', .pin = 11 }, input_float); - // copi - configure_pin({ .port = 'C', .pin = 12 }, push_pull_alternative_output); - break; - } - default: - // "Supported spi busses are 1-5!"; - hal::safe_throw(hal::operation_not_supported(this)); - } - - power_on(m_peripheral_id); - spi::driver_configure(p_settings); -} - -spi::~spi() -{ - power_off(m_peripheral_id); -} - -void spi::driver_configure(settings const& p_settings) -{ - m_spi_driver.configure(p_settings, frequency(m_peripheral_id)); -} - -void spi::driver_transfer(std::span p_data_out, - std::span p_data_in, - hal::byte p_filler) -{ - m_spi_driver.transfer(p_data_out, p_data_in, p_filler); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/timer.cpp b/src/stm32f1/timer.cpp deleted file mode 100644 index 476aca0..0000000 --- a/src/stm32f1/timer.cpp +++ /dev/null @@ -1,439 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "../stm32_generic/timer.hpp" -#include "power.hpp" -#include "quadrature_encoder.hpp" - -namespace hal::stm32f1 { - -// Advanced timer -inline void* timer1 = reinterpret_cast(0x4001'2C00); -// General purpose timers 2 - 5 -inline void* timer2 = reinterpret_cast(0x4000'0000); -inline void* timer3 = reinterpret_cast(0x4000'0400); -inline void* timer4 = reinterpret_cast(0x4000'0800); -inline void* timer5 = reinterpret_cast(0x4000'0C00); -// Advanced timer -inline void* timer8 = reinterpret_cast(0x4001'3400); -// General purpose timers 9 - 14 -inline void* timer9 = reinterpret_cast(0x4001'4C00); -inline void* timer10 = reinterpret_cast(0x4001'5000); -inline void* timer11 = reinterpret_cast(0x4001'5400); -inline void* timer12 = reinterpret_cast(0x4000'1800); -inline void* timer13 = reinterpret_cast(0x4000'1C00); -inline void* timer14 = reinterpret_cast(0x4000'2000); - -namespace { -void* peripheral_to_advanced_register(peripheral p_id) -{ - void* reg; - if (p_id == peripheral::timer1) { - reg = timer1; - } else { - reg = timer8; - } - return reg; -} - -void* peripheral_to_general_register(peripheral p_id) -{ - void* reg; - if (p_id == peripheral::timer2) { - reg = timer2; - } else if (p_id == peripheral::timer3) { - reg = timer3; - } else if (p_id == peripheral::timer4) { - reg = timer4; - } else if (p_id == peripheral::timer5) { - reg = timer5; - } else if (p_id == peripheral::timer9) { - reg = timer9; - } else if (p_id == peripheral::timer10) { - reg = timer10; - } else if (p_id == peripheral::timer11) { - reg = timer11; - } else if (p_id == peripheral::timer12) { - reg = timer12; - } else if (p_id == peripheral::timer13) { - reg = timer13; - } else { - reg = timer14; - } - return reg; -} -} // namespace - -timer::timer(void* p_reg, timer_manager_data* p_manager_data_ptr) - : m_timer(unsafe{}) - , m_manager_data_ptr(p_manager_data_ptr) -{ - // Captures the needed stm32f1 series interrupt data to be passed - auto peripheral_interrupt_params = setup_interrupt(); - - // Passes the stm32f1 series data to the generic stm32 timer object - m_timer.initialize(unsafe{}, - p_reg, - &stm32f1::initialize_interrupts, - peripheral_interrupt_params.irq, - peripheral_interrupt_params.handler); - - m_manager_data_ptr->m_usage = timer_manager_data::usage::callback_timer; -} - -timer::~timer() -{ - m_manager_data_ptr->m_usage = timer_manager_data::usage::uninitialized; - reset_peripheral(m_manager_data_ptr->m_id); -} - -bool timer::driver_is_running() -{ - return m_timer.is_running(); -} - -void timer::driver_cancel() -{ - m_timer.cancel(); -} - -void timer::driver_schedule(hal::callback p_callback, - hal::time_duration p_delay) -{ - m_callback = p_callback; - auto const timer_frequency = frequency(m_manager_data_ptr->m_id); - m_timer.schedule(p_delay, static_cast(timer_frequency)); -} - -timer::interrupt_params timer::setup_interrupt() -{ - // Create a lambda to call the interrupt() method - auto isr = [this]() { interrupt(); }; - - // A pointer to save the static_callable isr address to - interrupt_params peripheral_interrupt_params; - - // Determines IRQ and handler to use - switch (m_manager_data_ptr->m_id) { - case peripheral::timer1: - peripheral_interrupt_params.irq = - static_cast(irq::tim1_up); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer2: - peripheral_interrupt_params.irq = static_cast(irq::tim2); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer3: - peripheral_interrupt_params.irq = static_cast(irq::tim3); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer4: - peripheral_interrupt_params.irq = static_cast(irq::tim4); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer5: - peripheral_interrupt_params.irq = static_cast(irq::tim5); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer6: - peripheral_interrupt_params.irq = static_cast(irq::tim6); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer7: - peripheral_interrupt_params.irq = static_cast(irq::tim7); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer8: - peripheral_interrupt_params.irq = - static_cast(irq::tim8_up); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer9: - peripheral_interrupt_params.irq = - static_cast(irq::tim1_brk_tim9); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer10: // uses timer 1's interrupt vector - peripheral_interrupt_params.irq = - static_cast(irq::tim1_up_tim10); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer11: - peripheral_interrupt_params.irq = - static_cast(irq::tim1_trg_com_tim11); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer12: - peripheral_interrupt_params.irq = - static_cast(irq::tim8_brk_tim12); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer13: // uses timer 8's interrupt vector - peripheral_interrupt_params.irq = - static_cast(irq::tim8_up_tim13); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - case peripheral::timer14: - [[fallthrough]]; - default: - peripheral_interrupt_params.irq = - static_cast(irq::tim8_trg_com_tim14); - peripheral_interrupt_params.handler = - static_callable(isr).get_handler(); - break; - } - return peripheral_interrupt_params; -} - -void timer::handle_interrupt() -{ - void* reg = nullptr; - if (m_manager_data_ptr->m_id == peripheral::timer1 || - m_manager_data_ptr->m_id == peripheral::timer8) { - reg = peripheral_to_advanced_register(m_manager_data_ptr->m_id); - } else { - reg = peripheral_to_general_register(m_manager_data_ptr->m_id); - } - - static auto timer_reg = stm32_generic::get_timer_reg(reg); - - static constexpr auto update_interrupt_flag = hal::bit_mask::from(0); - bit_modify(timer_reg->status_register).clear(update_interrupt_flag); -} - -void timer::interrupt() -{ - if (m_callback) { - (*m_callback)(); - timer::handle_interrupt(); - } -} - -advanced_timer_manager::advanced_timer_manager(peripheral p_id) - : m_manager_data(p_id) -{ - power_on(m_manager_data.m_id); -} - -general_purpose_timer_manager::general_purpose_timer_manager(peripheral p_id) - : m_manager_data(p_id) -{ - power_on(m_manager_data.m_id); -} - -advanced_timer_manager::~advanced_timer_manager() -{ - power_off(m_manager_data.m_id); -} - -general_purpose_timer_manager::~general_purpose_timer_manager() -{ - power_off(m_manager_data.m_id); -} - -hal::stm32f1::timer advanced_timer_manager::acquire_timer() -{ - if (m_manager_data.current_usage() != - timer_manager_data::usage::uninitialized) { - safe_throw(hal::device_or_resource_busy(this)); - } - - return { peripheral_to_advanced_register(m_manager_data.m_id), - &m_manager_data }; -} - -hal::stm32f1::timer general_purpose_timer_manager::acquire_timer() -{ - if (m_manager_data.current_usage() != - timer_manager_data::usage::uninitialized) { - safe_throw(hal::device_or_resource_busy(this)); - } - - return { peripheral_to_general_register(m_manager_data.m_id), - &m_manager_data }; -} - -hal::stm32f1::pwm_group_frequency -advanced_timer_manager::acquire_pwm_group_frequency() -{ - if (m_manager_data.current_usage() != - timer_manager_data::usage::uninitialized && - m_manager_data.current_usage() != - timer_manager_data::usage::pwm_generator) { - safe_throw(hal::device_or_resource_busy(this)); - } - - return { peripheral_to_advanced_register(m_manager_data.m_id), - &m_manager_data }; -} - -hal::stm32f1::pwm_group_frequency -general_purpose_timer_manager::acquire_pwm_group_frequency() -{ - if (m_manager_data.current_usage() != - timer_manager_data::usage::uninitialized && - m_manager_data.current_usage() != - timer_manager_data::usage::pwm_generator) { - safe_throw(hal::device_or_resource_busy(this)); - } - - return { peripheral_to_general_register(m_manager_data.m_id), - &m_manager_data }; -} - -hal::stm32f1::pwm16_channel advanced_timer_manager::acquire_pwm16_channel( - timer_pins p_pin) -{ - if (m_manager_data.current_usage() != - timer_manager_data::usage::uninitialized && - m_manager_data.current_usage() != - timer_manager_data::usage::pwm_generator) { - safe_throw(hal::device_or_resource_busy(this)); - } - - return { peripheral_to_advanced_register(m_manager_data.m_id), - &m_manager_data, - true, - p_pin }; -} - -hal::stm32f1::pwm16_channel -general_purpose_timer_manager::acquire_pwm16_channel(timer_pins p_pin) -{ - if (m_manager_data.current_usage() != - timer_manager_data::usage::uninitialized && - m_manager_data.current_usage() != - timer_manager_data::usage::pwm_generator) { - safe_throw(hal::device_or_resource_busy(this)); - } - - return { peripheral_to_general_register(m_manager_data.m_id), - &m_manager_data, - false, - p_pin }; -} - -hal::stm32f1::pwm advanced_timer_manager::acquire_pwm(timer_pins p_pin) -{ - if (m_manager_data.current_usage() != - timer_manager_data::usage::uninitialized && - m_manager_data.current_usage() != timer_manager_data::usage::old_pwm) { - safe_throw(hal::device_or_resource_busy(this)); - } - - return { peripheral_to_advanced_register(m_manager_data.m_id), - &m_manager_data, - true, - p_pin }; -} - -hal::stm32f1::pwm general_purpose_timer_manager::acquire_pwm(timer_pins p_pin) -{ - if (m_manager_data.current_usage() != - timer_manager_data::usage::uninitialized && - m_manager_data.current_usage() != timer_manager_data::usage::old_pwm) { - safe_throw(hal::device_or_resource_busy(this)); - } - - return { peripheral_to_general_register(m_manager_data.m_id), - &m_manager_data, - false, - p_pin }; -} - -hal::v5::strong_ptr -general_purpose_timer_manager::acquire_quadrature_encoder( - std::pmr::polymorphic_allocator<> p_allocator, - timer_pins p_pin1, - timer_pins p_pin2, - u32 p_pulses_per_rotation) -{ - if (m_manager_data.current_usage() != - timer_manager_data::usage::uninitialized) { - safe_throw(hal::device_or_resource_busy(this)); - } - return hal::v5::make_strong_ptr( - p_allocator, - p_pin1, - p_pin2, - m_manager_data.m_id, - peripheral_to_general_register(m_manager_data.m_id), - &m_manager_data, - p_pulses_per_rotation); -} - -hal::v5::strong_ptr -advanced_timer_manager::acquire_quadrature_encoder( - std::pmr::polymorphic_allocator<> p_allocator, - timer_pins p_pin1, - timer_pins p_pin2, - u32 p_pulses_per_rotation) -{ - if (m_manager_data.current_usage() != - timer_manager_data::usage::uninitialized) { - safe_throw(hal::device_or_resource_busy(this)); - } - return hal::v5::make_strong_ptr( - p_allocator, - p_pin1, - p_pin2, - m_manager_data.m_id, - peripheral_to_general_register(m_manager_data.m_id), - &m_manager_data, - p_pulses_per_rotation); -} - -// Tell the compiler which instances to generate -template class advanced_timer; -template class advanced_timer; -template class general_purpose_timer; -template class general_purpose_timer; -template class general_purpose_timer; -template class general_purpose_timer; -template class general_purpose_timer; -template class general_purpose_timer; -template class general_purpose_timer; -template class general_purpose_timer; -template class general_purpose_timer; -template class general_purpose_timer; -} // namespace hal::stm32f1 diff --git a/src/stm32f1/uart.cpp b/src/stm32f1/uart.cpp deleted file mode 100644 index 40bc20c..0000000 --- a/src/stm32f1/uart.cpp +++ /dev/null @@ -1,231 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include -#include - -#include "dma.hpp" -#include "pin.hpp" -#include "power.hpp" -#include "usart_reg.hpp" - -namespace hal::stm32f1 { -namespace { -void configure_baud_rate(usart_t& p_usart, - peripheral p_peripheral, - serial::settings const& p_settings) -{ - auto const clock_frequency = frequency(p_peripheral); - float usart_divider = clock_frequency / (16.0f * p_settings.baud_rate); - - // Truncate off the decimal values - auto mantissa = static_cast(usart_divider); - // Subtract the whole number to leave just the decimal - auto fraction = usart_divider - static_cast(mantissa); - auto fractional_int = static_cast(std::roundf(fraction * 16)); - - if (fractional_int >= 16) { - mantissa = static_cast(mantissa + 1U); - fractional_int = 0; - } - - p_usart.baud_rate = hal::bit_value() - .insert(mantissa) - .insert(fractional_int) - .to(); -} - -void configure_format(usart_t& p_usart, serial::settings const& p_settings) -{ - constexpr auto parity_selection = bit_mask::from<9>(); - constexpr auto parity_control = bit_mask::from<10>(); - constexpr auto word_length = bit_mask::from<12>(); - constexpr auto stop = bit_mask::from<12, 13>(); - - bool parity_enable = (p_settings.parity != serial::settings::parity::none); - bool parity = (p_settings.parity == serial::settings::parity::odd); - bool double_stop = (p_settings.stop == serial::settings::stop_bits::two); - std::uint16_t stop_value = (double_stop) ? 0b10U : 0b00U; - - // Parity codes are: 0 for Even and 1 for Odd, thus the expression above - // sets the bool to TRUE when odd and zero when something else. This value - // is ignored if the parity is NONE since parity_enable will be zero. - - bit_modify(p_usart.control1) - .insert(parity_enable) - .insert(parity) - .insert(0U); - - bit_modify(p_usart.control2).insert(stop_value); -} -} // namespace - -uart::uart(hal::runtime, - std::uint8_t p_port, - std::span p_buffer, - serial::settings const& p_settings) - : uart(p_port, p_buffer, p_settings) -{ -} - -uart::uart(std::uint8_t p_port, - std::span p_buffer, - serial::settings const& p_settings) - : m_uart(nullptr) - , m_receive_buffer(p_buffer) - , m_read_index(0) - , m_dma(0) - , m_id{} -{ - if (p_buffer.size() > max_dma_length) { - hal::safe_throw(hal::operation_not_supported(this)); - } - - switch (p_port) { - case 1: - m_port_tx = 'A'; - m_pin_tx = 9; - m_port_rx = 'A'; - m_pin_rx = 10; - m_id = peripheral::usart1; - m_dma = 5; - break; - case 2: - m_port_tx = 'A'; - m_pin_tx = 2; - m_port_rx = 'A'; - m_pin_rx = 3; - m_dma = 6; - m_id = peripheral::usart2; - break; - case 3: - m_port_tx = 'B'; - m_pin_tx = 10; - m_port_rx = 'B'; - m_pin_rx = 11; - m_dma = 3; - m_id = peripheral::usart3; - break; - default: - hal::safe_throw(hal::operation_not_supported(this)); - } - - m_uart = reinterpret_cast(peripheral_to_register(m_id)); // NOLINT - - // Power on the usart/uart id - power_on(m_id); - - // Power on dma1 which has the usart channels - // TODO(): DMA1 is shared across multiple peripherals - if (not is_on(peripheral::dma1)) { - power_on(peripheral::dma1); - } - - auto& uart_reg = *to_usart(m_uart); - - // Setup RX DMA channel - auto const data_address = reinterpret_cast(&uart_reg.data); - auto const queue_address = reinterpret_cast(p_buffer.data()); - auto const data_address_int = static_cast(data_address); - auto const queue_address_int = static_cast(queue_address); - - dma::dma1->channel[m_dma - 1].transfer_amount = p_buffer.size(); - dma::dma1->channel[m_dma - 1].peripheral_address = data_address_int; - dma::dma1->channel[m_dma - 1].memory_address = queue_address_int; - dma::dma1->channel[m_dma - 1].configuration = uart_dma_settings1; - - // Setup UART Control Settings 1 - uart_reg.control1 = control_reg::control_settings1; - - // NOTE: We leave control settings 2 alone as it is for features beyond - // basic UART such as USART clock, USART port network (LIN), and other - // things. - - // Setup UART Control Settings 3 - uart_reg.control3 = control_reg::control_settings3; - - uart::driver_configure(p_settings); - - configure_pin({ .port = m_port_tx, .pin = m_pin_tx }, - push_pull_alternative_output); - configure_pin({ .port = m_port_rx, .pin = m_pin_rx }, input_pull_up); -} - -uart::~uart() -{ - reset_pin({ .port = m_port_tx, .pin = m_pin_tx }); - reset_pin({ .port = m_port_rx, .pin = m_pin_rx }); -} - -u32 uart::dma_cursor_position() -{ - u32 receive_amount = dma::dma1->channel[m_dma - 1].transfer_amount; - u32 write_position = m_receive_buffer.size() - receive_amount; - return write_position % m_receive_buffer.size(); -} - -void uart::driver_configure(serial::settings const& p_settings) -{ - auto& uart_reg = *to_usart(m_uart); - configure_baud_rate(uart_reg, m_id, p_settings); - configure_format(uart_reg, p_settings); -} - -serial::write_t uart::driver_write(std::span p_data) -{ - auto& uart_reg = *to_usart(m_uart); - - for (auto const& byte : p_data) { - while (not bit_extract(uart_reg.status)) { - continue; - } - // Load the next byte into the data register - uart_reg.data = byte; - } - - return { - .data = p_data, - }; -} - -serial::read_t uart::driver_read(std::span p_data) -{ - size_t count = 0; - - for (auto& byte : p_data) { - if (m_read_index == dma_cursor_position()) { - break; - } - byte = m_receive_buffer[m_read_index++]; - m_read_index = m_read_index % m_receive_buffer.size(); - count++; - } - - return { - .data = p_data.first(count), - .available = 1, - .capacity = m_receive_buffer.size(), - }; -} - -void uart::driver_flush() -{ - m_read_index = dma_cursor_position(); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/usart.cpp b/src/stm32f1/usart.cpp deleted file mode 100644 index d944100..0000000 --- a/src/stm32f1/usart.cpp +++ /dev/null @@ -1,206 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -#include -#include -#include -#include -#include -#include - -#include "pin.hpp" -#include "power.hpp" -#include "usart_reg.hpp" - -namespace hal::stm32f1 { -namespace { -inline void configure_baud_rate(usart_t& p_usart, - u32 p_frequency, - serial::settings const& p_settings) -{ - float const usart_divider = - static_cast(p_frequency) / (16.0f * p_settings.baud_rate); - - // Truncate off the decimal values - auto mantissa = static_cast(usart_divider); - // Subtract the whole number to leave just the decimal - auto fraction = usart_divider - static_cast(mantissa); - auto fractional_int = static_cast(std::roundf(fraction * 16)); - - if (fractional_int >= 16) { - mantissa = static_cast(mantissa + 1U); - fractional_int = 0; - } - - p_usart.baud_rate = hal::bit_value() - .insert(mantissa) - .insert(fractional_int) - .to(); -} - -inline void configure_format(usart_t& p_usart, - serial::settings const& p_settings) -{ - constexpr auto parity_selection = bit_mask::from<9>(); - constexpr auto parity_control = bit_mask::from<10>(); - constexpr auto word_length = bit_mask::from<12>(); - constexpr auto stop = bit_mask::from<12, 13>(); - - bool parity_enable = (p_settings.parity != serial::settings::parity::none); - bool parity = (p_settings.parity == serial::settings::parity::odd); - bool double_stop = (p_settings.stop == serial::settings::stop_bits::two); - std::uint16_t stop_value = (double_stop) ? 0b10U : 0b00U; - - // Parity codes are: 0 for Even and 1 for Odd, thus the expression above - // sets the bool to TRUE when odd and zero when something else. This value - // is ignored if the parity is NONE since parity_enable will be zero. - - bit_modify(p_usart.control1) - .insert(parity_enable) - .insert(parity) - .insert(0U); - - bit_modify(p_usart.control2).insert(stop_value); -} -} // namespace - -usart_manager::usart_manager(peripheral p_select) - : m_reg(peripheral_to_register(p_select)) - , m_id(p_select) -{ - power_on(m_id); -} - -usart_manager::~usart_manager() -{ - power_off(m_id); -} - -usart_manager::serial usart_manager::acquire_serial( - std::span p_buffer, - hal::serial::settings const& p_settings) -{ - return { *this, p_buffer, p_settings }; -} - -usart_manager::serial::serial(usart_manager& p_usart_manager, - std::span p_buffer, - hal::serial::settings const& p_settings) - : m_usart_manager(&p_usart_manager) - , m_buffer(p_buffer) - , m_dma_channel(0) -{ - - if (p_buffer.size() > max_dma_length) { - hal::safe_throw(hal::operation_not_supported(this)); - } - - switch (m_usart_manager->m_id) { - case peripheral::usart1: - m_tx = { .port = 'A', .pin = 9 }; - m_rx = { .port = 'A', .pin = 10 }; - m_dma_channel = 5; - break; - case peripheral::usart2: - m_tx = { .port = 'A', .pin = 2 }; - m_rx = { .port = 'A', .pin = 3 }; - m_dma_channel = 6; - break; - case peripheral::usart3: - m_tx = { .port = 'B', .pin = 10 }; - m_rx = { .port = 'B', .pin = 11 }; - m_dma_channel = 3; - break; - default: - hal::safe_throw(hal::operation_not_supported(this)); - } - - // Power on dma1 which has the usart channels - // TODO(): DMA1 is shared across multiple peripherals - if (not is_on(peripheral::dma1)) { - power_on(peripheral::dma1); - } - - auto& uart_reg = *to_usart(m_usart_manager->m_reg); - - // Setup RX DMA channel - auto const data_address = reinterpret_cast(&uart_reg.data); - auto const queue_address = reinterpret_cast(p_buffer.data()); - auto const data_address_int = static_cast(data_address); - auto const queue_address_int = static_cast(queue_address); - - dma::dma1->channel[m_dma_channel - 1].transfer_amount = p_buffer.size(); - dma::dma1->channel[m_dma_channel - 1].peripheral_address = data_address_int; - dma::dma1->channel[m_dma_channel - 1].memory_address = queue_address_int; - dma::dma1->channel[m_dma_channel - 1].configuration = uart_dma_settings1; - - // Setup UART Control Settings 1 - uart_reg.control1 = control_reg::control_settings1; - - // NOTE: We leave control settings 2 alone as it is for features beyond - // basic UART such as USART clock, USART port network (LIN), and other - // things. - - // Setup UART Control Settings 3 - uart_reg.control3 = control_reg::control_settings3; - - serial::driver_configure(p_settings); - - configure_pin(m_tx, push_pull_alternative_output); - configure_pin(m_rx, input_pull_up); -} - -void usart_manager::serial::driver_configure( - hal::serial::settings const& p_settings) -{ - auto& uart_reg = *to_usart(m_usart_manager->m_reg); - auto const uart_freq = static_cast(frequency(m_usart_manager->m_id)); - configure_baud_rate(uart_reg, uart_freq, p_settings); - configure_format(uart_reg, p_settings); -} - -void usart_manager::serial::driver_write(std::span p_data) -{ - auto& uart_reg = *to_usart(m_usart_manager->m_reg); - - for (auto const& byte : p_data) { - while (not bit_extract(uart_reg.status)) { - continue; - } - // Load the next byte into the data register - uart_reg.data = byte; - } -} - -std::span usart_manager::serial::driver_receive_buffer() -{ - return m_buffer; -} - -std::size_t usart_manager::serial::driver_cursor() -{ - return m_buffer.size() - - dma::dma1->channel[m_dma_channel - 1].transfer_amount; -} - -usart_manager::serial::~serial() -{ - reset_pin(m_tx); - reset_pin(m_rx); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/usart_reg.hpp b/src/stm32f1/usart_reg.hpp deleted file mode 100644 index 0f1782e..0000000 --- a/src/stm32f1/usart_reg.hpp +++ /dev/null @@ -1,132 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include -#include - -#include "dma.hpp" - -namespace hal::stm32f1 { - -/// Namespace for the status registers (SR) bit masks -struct status_reg // NOLINT -{ - /// Indicates if the transmit data register is empty and can be loaded with - /// another byte. - static constexpr auto transit_empty = hal::bit_mask::from<7>(); -}; - -/// Namespace for the control registers (CR1, CR3) bit masks and predefined -/// settings constants. -struct control_reg // NOLINT -{ - /// When this bit is cleared the USART prescalers and outputs are stopped - /// and the end of the current byte transfer in order to reduce power - /// consumption. (CR1) - static constexpr auto usart_enable = hal::bit_mask::from<13>(); - - /// Enables DMA receiver (CR3) - static constexpr auto dma_receiver_enable = hal::bit_mask::from<6>(); - - /// This bit enables the transmitter. (CR1) - static constexpr auto transmitter_enable = hal::bit_mask::from<3>(); - - /// This bit enables the receiver. (CR1) - static constexpr auto receive_enable = hal::bit_mask::from<2>(); - - /// Enable USART + Enable Receive + Enable Transmitter - static constexpr auto control_settings1 = - hal::bit_value(0UL) - .set() - .set() - .set() - .to(); - - /// Make sure that DMA is enabled for receive only - static constexpr auto control_settings3 = - hal::bit_value(0UL) - .set() - .to(); -}; - -/// Namespace for the baud rate (BRR) registers bit masks -struct baud_rate_reg // NOLINT -{ - /// Mantissa of USART DIV - static constexpr auto mantissa = hal::bit_mask::from<4, 15>(); - - /// Fraction of USART DIV - static constexpr auto fraction = hal::bit_mask::from<0, 3>(); -}; - -struct usart_t -{ - u32 volatile status; - u32 volatile data; - u32 volatile baud_rate; - u32 volatile control1; - u32 volatile control2; - u32 volatile control3; - u32 volatile guard_time_and_prescale; -}; - -inline hal::uptr peripheral_to_register(peripheral p_select) -{ - // See Chapter 3.3 "Memory" page 50 in RM0008 for these magic numbers - switch (p_select) { - case peripheral::usart1: - return 0x4001'3800; - case peripheral::usart2: - return 0x4000'4400; - case peripheral::usart3: - return 0x4000'4800; - case peripheral::uart4: - return 0x4000'4C00; - case peripheral::uart5: - return 0x4000'5000; - default: - hal::safe_throw(hal::argument_out_of_domain(nullptr)); - } -} - -static constexpr auto uart_dma_settings1 = - hal::bit_value() - .clear() - .clear() - .clear() - .clear() // Read from peripheral - .set() - .clear() - .set() - .clear() - .set() - .insert() // size = 8 bits - .insert() // size = 8 bits - .insert() // Low Medium [High] Very_High - .to(); - -inline usart_t* to_usart(void* p_uart) -{ - return reinterpret_cast(p_uart); -} -inline usart_t* to_usart(uptr p_uart) -{ - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(p_uart); -} -} // namespace hal::stm32f1 diff --git a/src/stm32f1/usb.cpp b/src/stm32f1/usb.cpp deleted file mode 100644 index 906164a..0000000 --- a/src/stm32f1/usb.cpp +++ /dev/null @@ -1,1064 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "power.hpp" -#include "stm32f1/pin.hpp" - -namespace hal::stm32f1 { -namespace { - -struct usb_endpoint_register_t -{ - struct [[gnu::packed]] bits - { - unsigned ea : 4; - unsigned stat_tx : 2; - unsigned dogtx : 1; - unsigned tx_complete : 1; - unsigned ep_kind : 1; - unsigned ep_type : 2; - unsigned setup : 1; - unsigned stat_rx : 2; - unsigned dtog_rx : 1; - unsigned rx_complete : 1; - }; - // Write operations should not use read-modify-write but write directly. - // Writing zeros to this register does not change - union - { - hal::u32 volatile EPR; - bits volatile bit; - }; -}; - -struct usb_reg_t -{ - /// Endpoint Registers - std::array EP; - /// Reserved Registers - std::array reserved; - /// Control Register - hal::u32 volatile CNTR; - /// Interrupt Status Register - hal::u32 volatile ISTR; - /// Frame Number Register - hal::u32 volatile FNR; - /// Device Address Register - hal::u32 volatile DADDR; - /// Buffer Table Address Register - hal::u32 volatile BTABLE; -}; - -// Ensure that CNTR is put in the correct location -static_assert(offsetof(usb_reg_t, CNTR) == 0x40); -static_assert(offsetof(usb_reg_t, BTABLE) == 0x50); - -inline auto* usb_reg = reinterpret_cast(0x4000'5C00); - -enum class endpoint_type : u8 -{ - bulk = 0b00, - control = 0b01, - iso = 0b10, - interrupt = 0b11, -}; - -struct control // NOLINT -{ - // FRES: Force USB Reset - static constexpr auto force_reset = bit_mask::from<0>(); - // PDWN: Power Down - static constexpr auto power_down = bit_mask::from<1>(); - // LPMODE: Low-power Mode - [[maybe_unused]] static constexpr auto low_power_mode = bit_mask::from<2>(); - // FSUSP: Force Suspend - [[maybe_unused]] static constexpr auto force_suspend = bit_mask::from<3>(); - // RESUME: Resume Request - [[maybe_unused]] static constexpr auto resume_request = bit_mask::from<4>(); - // ESOFM: Expected Start Of Frame Interrupt Mask - [[maybe_unused]] static constexpr auto expected_start_of_frame_interrupt = - bit_mask::from<8>(); - // SOFM: Start Of Frame Interrupt Mask - [[maybe_unused]] static constexpr auto start_of_frame_interrupt = - bit_mask::from<9>(); - // RESETM: USB Reset Interrupt Mask - static constexpr auto reset_interrupt = bit_mask::from<10>(); - // SUSPM: Suspend Mode Interrupt Mask - static constexpr auto suspend_mode_interrupt = bit_mask::from<11>(); - // WKUPM: Wakeup Interrupt Mask - static constexpr auto wakeup_interrupt = bit_mask::from<12>(); - // ERRM: Error Interrupt Mask - [[maybe_unused]] static constexpr auto error_interrupt = bit_mask::from<13>(); - // PMAOVRM: Packet Memory Area Over / Underrun Interrupt Mask - static constexpr auto packet_memory_interrupt = bit_mask::from<14>(); - // CTRM: Correct Transfer for Isochronous Endpoint Interrupt Mask - static constexpr auto correct_transfer_interrupt = bit_mask::from<15>(); -}; - -struct interrupt_status // NOLINT -{ - static constexpr auto endpoint_id = bit_mask::from<0, 3>(); - static constexpr auto direction = bit_mask::from<4>(); - // ESOF: Expected Start Of Frame - [[maybe_unused]] static constexpr auto expected_start_of_frame = - bit_mask::from<8>(); - // SOF: Start Of Frame - [[maybe_unused]] static constexpr auto start_of_frame = bit_mask::from<9>(); - // RESET: USB Reset Request - static constexpr auto reset_request = bit_mask::from<10>(); - // SUSP: Suspend Mode Request - static constexpr auto suspend_mode_request = bit_mask::from<11>(); - // WKUP: Wake Up - static constexpr auto wake_up = bit_mask::from<12>(); - // ERR: Error - static constexpr auto error = bit_mask::from<13>(); - // PMAOVR: Packet Memory Area Over / Underrun - static constexpr auto packet_memory_over_underrun = bit_mask::from<14>(); - // CTR: Correct Transfer - static constexpr auto correct_transfer = bit_mask::from<15>(); -}; - -struct frame_number // NOLINT -{ - // FN: Frame Number - [[maybe_unused]] static constexpr auto count = bit_mask::from<0, 10>(); - // LSOF: Lost SOF - [[maybe_unused]] static constexpr auto lost_sof = bit_mask::from<11>(); - // LCK: Lock - [[maybe_unused]] static constexpr auto lock = bit_mask::from<12>(); - // RXDM: Receive Data - Line Status - [[maybe_unused]] static constexpr auto receive_data_status = - bit_mask::from<13>(); - // RXDP: Transmit Data - Line Status - [[maybe_unused]] static constexpr auto transmit_data_status = - bit_mask::from<14>(); -}; - -struct device_address // NOLINT -{ - // ADD: Device Address - static constexpr auto address = bit_mask::from<0, 6>(); - // EF: Enable Function - static constexpr auto enable_function = bit_mask::from<7>(); -}; - -struct endpoint // NOLINT -{ - // EA: Endpoint Address - static constexpr auto address = bit_mask::from<0, 3>(); - // STAT_TX: Status Bits, for transmission transfers - static constexpr auto status_tx = bit_mask::from<4, 5>(); - // DTOG_TX: Data Toggle, for transmission transfers - [[maybe_unused]] static constexpr auto data_toggle_tx = bit_mask::from<6>(); - // CTR_TX: Correct Transfer for Transmission - static constexpr auto correct_transfer_tx = bit_mask::from<7>(); - // EP_KIND: Endpoint Kind - static constexpr auto kind = bit_mask::from<8>(); - // EP_TYPE: Endpoint Type - static constexpr auto type = bit_mask::from<9, 10>(); - // SETUP: Setup Transaction Completed - [[maybe_unused]] static constexpr auto setup_complete = bit_mask::from<11>(); - // STAT_RX: Status Bits, for reception transfers - static constexpr auto status_rx = bit_mask::from<12, 13>(); - // DTOG_RX: Data Toggle, for reception transfers - [[maybe_unused]] static constexpr auto data_toggle_rx = bit_mask::from<14>(); - // CTR_RX: Correct Transfer for Reception - static constexpr auto correct_transfer_rx = bit_mask::from<15>(); -}; - -struct block_table -{ - [[maybe_unused]] static constexpr std::array block_size_table{ - 2, - 32, - }; - // BL: Block size = 0 means 2 bytes, = 1 means 32 bytes - static constexpr auto block_size = bit_mask::from<15>(); - static constexpr auto number_of_blocks = bit_mask::from<14, 10>(); - static constexpr auto count = bit_mask::from<9, 0>(); -}; - -// Skipped: Buffer Descriptor Table (BDT) structure as it might vary depending -// on the specific STM32F103 variant - -usb_reg_t& reg() -{ - return *usb_reg; -} - -// Memory internal to USB used for sending and receiving packets to and from the -// HOST -constexpr std::size_t packet_buffer_sram_size = 512; -// Max number of endpoints -constexpr std::size_t max_endpoints = 8; -// Set the start of the buffer descriptor to the start of the packet buffer; -constexpr std::size_t buffer_descriptor_table_start = 0; -// Page 650 has an equation for the Reception byte count n for endpoint N. -// The equation is `[USB_BTABLE] + n*16 + 12` which also represents the furthest -// the BTABLE could ever be from the start of the packet buffer. Lets make that -// a reserved area of the packet buffer. The rest of the memory can be used for -// endpoint send and receive. -constexpr std::size_t buffer_descriptor_table_end = (max_endpoints * 16) + 12; - -constexpr std::size_t initial_packet_buffer_memory = - packet_buffer_sram_size - buffer_descriptor_table_end; - -/// TODO(#157): make this no longer fixed, maybe... -constexpr hal::u16 fixed_endpoint_size = 16; -constexpr auto endpoint_memory_size = fixed_endpoint_size; -constexpr auto block_number = fixed_endpoint_size / 2U; -constexpr auto rx_endpoint_count_mask = - hal::bit_value(0U) - .clear() // each number of blocks = 2x - .insert(block_number) - .to(); - -std::span usb_packet_buffer_sram() -{ - return { reinterpret_cast(0x4000'6000), packet_buffer_sram_size }; -} - -std::span usb_packet_buffer_sram_u32() -{ - // NOTE: dividing by the sizeof(hal::u16) is not a mistake. The memory is u16 - // addressable by the USB peripheral but u32 accessible/aligned for the - // processor. This means that each u16 has padding of an additional u16 that - // goes nowhere. The number of u16 blocks in this memory region is equal to - // the u32 blocks and thats why we do the division here. - return { reinterpret_cast(0x4000'6000), - packet_buffer_sram_size / sizeof(hal::u16) }; -} - -constexpr hal::u16 tx_endpoint_memory_address(std::size_t p_endpoint) -{ - auto const offset = (p_endpoint * 2) * endpoint_memory_size; - return buffer_descriptor_table_end + offset; -} - -constexpr hal::u16 rx_endpoint_memory_address(std::size_t p_endpoint) -{ - auto const offset = ((p_endpoint * 2) + 1) * endpoint_memory_size; - return buffer_descriptor_table_end + offset; -} - -struct buffer_descriptor_block -{ - u32 tx_address; - u32 tx_count; - u32 rx_address; - u32 rx_count; - - void setup_ctrl_descriptor() - { - tx_address = tx_endpoint_memory_address(0); - tx_count = 0; - - rx_address = rx_endpoint_memory_address(0); - rx_count = rx_endpoint_count_mask; - } - - void setup_in_endpoint_for(u8 p_endpoint) - { - tx_address = tx_endpoint_memory_address(p_endpoint); - tx_count = 0; - } - - void setup_out_endpoint_for(u8 p_endpoint) - { - rx_address = rx_endpoint_memory_address(p_endpoint); - rx_count = rx_endpoint_count_mask; - } - - std::size_t bytes_received() - { - auto const bytes_received = hal::bit_extract(rx_count); - return bytes_received; - } - - hal::u16 rx_address_offset() - { - return rx_address; - } - - std::span rx_span() - { - auto const offset = rx_address_offset() / sizeof(u16); - auto const size = bytes_received() / 2; - return usb_packet_buffer_sram_u32().subspan(offset, size); - } - - hal::u16 tx_address_offset() - { - return tx_address; - } - - std::span tx_span() - { - auto const offset = tx_address_offset() / sizeof(u16); - auto const size = fixed_endpoint_size / 2; - return usb_packet_buffer_sram_u32().subspan(offset, size); - } - - void set_count_tx(hal::u16 p_transfer_size) - { - tx_count = p_transfer_size; - } -}; - -buffer_descriptor_block& endpoint_descriptor_block(std::size_t p_endpoint) -{ - auto* buffer = usb_packet_buffer_sram().data(); - buffer += p_endpoint * sizeof(buffer_descriptor_block); - return *std::bit_cast(buffer); -} - -constexpr auto endpoint_invariant_mask = hal::bit_value(0U) - .insert(0xFUL) - .set() - .set() - .insert(0xFUL) - .set() - .to(); - -/// Same stat value for rx and tex -enum class stat : u8 -{ - // all reception requests addressed to this endpoint are ignored. - disabled = 0b00, - stall = 0b01, - nak = 0b10, - valid = 0b11, -}; - -/// Same stat value for rx and tex -enum class dtog : u8 -{ - // all reception requests addressed to this endpoint are ignored. - tog0 = 0b0, - tog1 = 0b1, -}; - -template -void set_endpoint_register_toggle(std::size_t p_endpoint, - enumeration auto p_enum_value) -{ - if (p_endpoint > reg().EP.size()) { - return; - } - - auto& endpoint_register = reg().EP[p_endpoint].EPR; - auto const reg_value = endpoint_register; - auto const masked_endpoint_reg = reg_value & endpoint_invariant_mask; - auto const desired_stat = hal::value(p_enum_value); - auto const current_stat = hal::bit_extract(reg_value); - auto const toggle_mask = current_stat ^ desired_stat; - auto const final_reg_value = hal::bit_value(masked_endpoint_reg) - .template insert(toggle_mask) - .template to(); - endpoint_register = final_reg_value; -} - -void set_rx_stat(std::size_t p_endpoint, stat p_stat) -{ - set_endpoint_register_toggle(p_endpoint, p_stat); -} - -void set_tx_stat(std::size_t p_endpoint, stat p_stat) -{ - set_endpoint_register_toggle(p_endpoint, p_stat); -} - -void set_endpoint_address_and_type(std::size_t p_endpoint, endpoint_type p_type) -{ - auto& endpoint_register = reg().EP[p_endpoint].EPR; - auto const reg_value = endpoint_register; - auto const masked_endpoint_reg = reg_value & endpoint_invariant_mask; - auto const final_reg_value = hal::bit_value(masked_endpoint_reg) - .insert(p_endpoint) - .insert(0U) - .insert(hal::value(p_type)) - .to(); - endpoint_register = final_reg_value; -} - -template -void clear_correct_transfer_for(u8 endpoint_id) -{ - auto& endpoint_reg = reg().EP[endpoint_id].EPR; - auto const endpoint_value = endpoint_reg; - auto masked_value = endpoint_value & endpoint_invariant_mask; - auto const masked_value_with_transfer_cleared = - hal::bit_value(masked_value).template clear().template to(); - endpoint_reg = masked_value_with_transfer_cleared; -} -} // namespace - -int error_detected_count = 0; - -void handle_bus_reset() -{ - // assignment to this register acts as an AND gate - reg().ISTR = 0; - reg().DADDR = 0u; // disable USB Function - - // Clear any previous information within the packet buffer - std::ranges::fill(usb_packet_buffer_sram(), 0); - - // Set the start of the buffer descriptor table to the start of the packet - // buffer. - reg().BTABLE = buffer_descriptor_table_start; - - endpoint_descriptor_block(0).setup_ctrl_descriptor(); - set_endpoint_address_and_type(0, endpoint_type::control); - set_rx_stat(0, stat::nak); - set_tx_stat(0, stat::nak); - - // Reset endpoints to disabled - for (std::size_t i = 1; i < reg().EP.size(); i++) { - reg().EP[i].EPR = i; - set_rx_stat(i, stat::disabled); - set_tx_stat(i, stat::disabled); - } - - hal::bit_modify(reg().CNTR) - .set(control::reset_interrupt) - .set(control::correct_transfer_interrupt) - .set(control::wakeup_interrupt) - .set(control::suspend_mode_interrupt) - .set(control::packet_memory_interrupt); - - hal::bit_modify(reg().DADDR).set(device_address::enable_function); -} - -// NOLINTNEXTLINE(bugprone-exception-escape) -void usb::interrupt_handler() noexcept -{ - auto& interrupt_reg = reg().ISTR; - - auto const interrupt_reg_value = interrupt_reg; - auto const endpoint_id = - hal::bit_extract(interrupt_reg_value); - auto const direction = - hal::bit_extract(interrupt_reg_value); - bool const transfer_completed = - hal::bit_extract(interrupt_reg_value); - - if (transfer_completed) { - if (direction == 0 /* meaning tx */) { - clear_correct_transfer_for(endpoint_id); - } else { - // Call callback using variant visitor - std::visit( - [](auto&& p_callback) { - using T = std::decay_t; - auto constexpr is_control_tag = - std::is_same_v>; - if constexpr (is_control_tag) { - p_callback(ctrl_receive_tag{}); - } else if constexpr (std::is_same_v< - T, - hal::callback>) { - p_callback(out_receive_tag{}); - } else { - static_assert(hal::error::invalid_option, - "USB RX Out callback visitor is non-exhaustive!"); - } - }, - m_out_callbacks[endpoint_id]); - - clear_correct_transfer_for(endpoint_id); - } - } - - bool const reset_request = - hal::bit_extract(interrupt_reg_value); - - if (reset_request) { - handle_bus_reset(); - } - - bool const error_detected = - hal::bit_extract(interrupt_reg_value); - - if (error_detected) { - // assignment to this register acts as an AND gate - interrupt_reg = ~(1U << interrupt_status::error.position); - error_detected_count++; - } - - bool const suspend_detected = - hal::bit_extract( - interrupt_reg_value); - - if (suspend_detected) { - // assignment to this register acts as an AND gate - interrupt_reg = ~(1U << interrupt_status::suspend_mode_request.position); - } - - bool const wake_detected = - hal::bit_extract(interrupt_reg_value); - - if (wake_detected) { - // assignment to this register acts as an AND gate - interrupt_reg = ~(1U << interrupt_status::wake_up.position); - } - - bool const overrun_detected = - hal::bit_extract( - interrupt_reg_value); - - if (overrun_detected) { - // assignment to this register acts as an AND gate - interrupt_reg = - ~(1U << interrupt_status::packet_memory_over_underrun.position); - } -} - -usb::usb(hal::v5::strong_ptr_only_token, - hal::v5::strong_ptr const& p_clock, - hal::time_duration p_write_timeout) - : m_clock(p_clock) - , m_write_timeout(p_write_timeout) - , m_available_endpoint_memory(initial_packet_buffer_memory) -{ - // USB already active by some other means - if (is_on(peripheral::usb) || is_on(peripheral::can1)) { - hal::safe_throw(hal::device_or_resource_busy(this)); - } - - auto const usb_frequency = frequency(peripheral::usb); - - if (not hal::equals(usb_frequency, 48.0_MHz)) { - hal::safe_throw(hal::operation_not_supported(nullptr)); - } - - // Clear any previous information within the packet buffer - std::ranges::fill(usb_packet_buffer_sram(), 0); - - auto handle = - static_callable([this] { interrupt_handler(); }); - // Only enable low priority because high priority is for iso endpoints which - // we do not support yet. - hal::stm32f1::initialize_interrupts(); - cortex_m::enable_interrupt(irq::usb_lp_can1_rx0, handle.get_handler()); - cortex_m::enable_interrupt(irq::usb_hp_can1_tx, handle.get_handler()); - - // Must be done prior to lifting power down bit - configure_pin({ .port = 'A', .pin = 11 }, push_pull_alternative_output); - configure_pin({ .port = 'A', .pin = 12 }, push_pull_alternative_output); - - power_on(peripheral::usb); - - using namespace std::chrono_literals; - - hal::delay(*p_clock, 1ms); - // Perform reset - hal::bit_modify(reg().CNTR) - .set(control::power_down) - .set(control::force_reset); - hal::delay(*p_clock, 1ms); - - // The USB peripheral sets this bit on system reset, we need to clear it to - // allow the device to power on. We must wait approximately 1us before we can - // proceed for the stm32f103. - hal::bit_modify(reg().CNTR).clear(control::power_down); - hal::delay(*p_clock, 1ms); - - // Clears everything including the force reset, enabling the USB device. - reg().CNTR = 0; - - handle_bus_reset(); -} - -usize usb::read_endpoint(u8 p_endpoint, - std::span p_buffer, - u16& p_bytes_read) -{ - auto const& ep = usb_reg->EP.at(p_endpoint); - auto const endpoint_stat = - static_cast(hal::bit_extract(ep.EPR)); - - // If the endpoint status is NAK, it means that we currently have a packet in - // the USB SRAM, and we haven't consumed all of the memory yet. We - // automatically move to VALID when all of the data has been consumed. - if (endpoint_stat != stat::nak) { - // return zero length buffer if the endpoint status is VALID meaning the - // endpoint is ready to receive data but hasn't received any data yet. - return 0; - } - - auto& descriptor = endpoint_descriptor_block(p_endpoint); - auto const bytes_remaining = descriptor.bytes_received() - p_bytes_read; - auto const bytes_to_copy = std::min(bytes_remaining, p_buffer.size()); - - // Offset the rx span by the number of bytes read divided by 2U (word size) - auto const rx_span = descriptor.rx_span(); - - for (size_t idx = 0; idx < bytes_to_copy; idx++) { - auto const offset_index = p_bytes_read + idx; - // Grab next word, divided by 2 to get the u16 word - auto const value = rx_span[offset_index / 2U]; - // Determine the shift based on if the index is odd or not - auto const shift = (offset_index & 1U) ? 8U : 0U; - auto const byte = (value >> shift) & 0xFF; - p_buffer[idx] = byte; - } - - p_bytes_read += bytes_to_copy; - - if (p_bytes_read == descriptor.bytes_received()) { - p_bytes_read = 0; - set_rx_stat(p_endpoint, stat::valid); - } - - return bytes_to_copy; -} - -void usb::wait_for_endpoint_transfer_completion(u8 p_endpoint) -{ - constexpr auto nak_u32_value = static_cast(stat::nak); - auto& endpoint_reg = reg().EP[p_endpoint].EPR; - auto endpoint_tx_status = hal::bit_extract(endpoint_reg); - auto const deadline = hal::future_deadline(*m_clock, m_write_timeout); - while (endpoint_tx_status != nak_u32_value) { - endpoint_tx_status = hal::bit_extract(endpoint_reg); - if (m_clock->uptime() >= deadline) { - hal::safe_throw(hal::timed_out(this)); - } - } -} - -void usb::fill_endpoint(hal::u8 p_endpoint, - std::span p_data, - hal::u16 p_max_length) -{ - auto& descriptor = endpoint_descriptor_block(p_endpoint); - auto const tx_span = descriptor.tx_span(); - - do { - while (descriptor.tx_count < p_max_length) { - if (p_data.empty()) { - return; - } - if (descriptor.tx_count & 0b1) { - hal::bit_modify(tx_span[descriptor.tx_count / 2U]) - .insert>(p_data[0]); - } else { - hal::bit_modify(tx_span[descriptor.tx_count / 2U]) - .insert>(p_data[0]); - } - p_data = p_data.subspan(1); - descriptor.tx_count++; - } - - // More data remaining, thus we need to ship this data off to the USB bus. - if (not p_data.empty()) { - set_tx_stat(p_endpoint, stat::valid); - wait_for_endpoint_transfer_completion(p_endpoint); - descriptor.tx_count = 0; - continue; - } - } while (not p_data.empty()); -} - -void usb::set_callback(hal::u8 p_endpoint, callback_variant_t const& p_callback) -{ - m_out_callbacks[p_endpoint] = p_callback; -} - -void usb::write_to_endpoint(u8 p_endpoint, std::span p_data) -{ - // We use a copy and not the reference to not modify the span. - fill_endpoint(p_endpoint, p_data, fixed_endpoint_size); -} - -void usb::flush_endpoint(u8 p_endpoint) -{ - // send whatever is in the USB buffer - set_tx_stat(p_endpoint, stat::valid); - wait_for_endpoint_transfer_completion(p_endpoint); - endpoint_descriptor_block(p_endpoint).tx_count = 0; -} - -usb::~usb() -{ - configure_pin({ .port = 'A', .pin = 11 }, input_pull_up); - configure_pin({ .port = 'A', .pin = 12 }, input_pull_up); - power_off(peripheral::usb); - cortex_m::disable_interrupt(irq::usb_lp_can1_rx0); - cortex_m::disable_interrupt(irq::usb_hp_can1_tx); -} - -/** - * @brief USB Control Endpoint Interface - * - * This class represents the control endpoint of a USB device. The control - * endpoint is crucial for USB communication as it handles device enumeration, - * configuration, and general control operations. - * - * Use cases: - * - Initiating USB connections - * - Handling USB enumeration process - * - Setting device addresses - * - Responding to standard USB requests - * - Sending and receiving control data - * - */ -class control_endpoint : public hal::v5::usb::control_endpoint -{ -public: - control_endpoint(hal::v5::strong_ptr const& p_usb) - : m_usb(p_usb) - { - set_rx_stat(0, stat::valid); - endpoint_descriptor_block(0).tx_count = 0; - } - - ~control_endpoint() override = default; - -private: - void flush() - { - m_usb->flush_endpoint(0); - set_tx_stat(0, stat::stall); - set_rx_stat(0, stat::valid); - } - - [[nodiscard]] hal::v5::usb::endpoint_info driver_info() const override - { - return { .size = fixed_endpoint_size, .number = 0, .stalled = false }; - } - - void driver_stall(bool p_should_stall) override - { - if (p_should_stall) { - set_rx_stat(0, stat::stall); - set_tx_stat(0, stat::stall); - } else { - set_rx_stat(0, stat::valid); - set_tx_stat(0, stat::nak); - } - } - - void driver_connect(bool p_should_connect) override - { - hal::bit_modify(reg().DADDR) - .insert(p_should_connect); - } - - void driver_set_address(u8 p_address) override - { - hal::bit_modify(reg().DADDR) - .set(device_address::enable_function) - .insert(p_address); - } - - void driver_write(hal::v5::scatter_span p_data_list) override - { - constexpr auto ctrl_endpoint = 0; - set_rx_stat(ctrl_endpoint, stat::stall); - set_tx_stat(ctrl_endpoint, stat::nak); - if (p_data_list.empty()) { - flush(); - } - for (auto const& data : p_data_list) { - m_usb->write_to_endpoint(ctrl_endpoint, data); - } - } - - usize driver_read(hal::v5::scatter_span p_data_list) override - { - usize total_memory = 0; - for (auto const& data : p_data_list) { - auto const data_copied = m_usb->read_endpoint(0, data, m_bytes_read); - - if (data_copied == 0) { - break; - } - - total_memory += data_copied; - } - return total_memory; - } - - void driver_on_receive( - callback const& p_callback) override - { - m_usb->m_out_callbacks[0] = p_callback; - } - - void driver_reset() override - { - reset(); - } - - hal::v5::strong_ptr m_usb; - u16 m_bytes_read = 0; -}; - -hal::v5::strong_ptr -acquire_usb_control_endpoint(std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_usb) -{ - return hal::v5::make_strong_ptr(p_allocator, p_usb); -} - -template -struct interface_select -{ - using type_in = std::conditional_t; - using type_out = std::conditional_t; - using type = std::conditional_t; -}; - -template -constexpr auto to_endpoint_type() -> endpoint_type -{ - constexpr auto is_interrupt = - std::is_same_v || - std::is_same_v; - constexpr auto is_bulk = - std::is_same_v || - std::is_same_v; - - static_assert( - is_bulk || is_interrupt, - "Only bulk and interrupt OUT endpoints are supported by this library"); - - if (is_interrupt) { - return endpoint_type::interrupt; - } - return endpoint_type::bulk; -}; - -/** - * @brief USB Interrupt IN Endpoint Interface - * - * This class represents an interrupt IN endpoint of a USB device. Interrupt - * IN endpoints are used for small, time-sensitive data transfers from the - * device to the host. - * - * Use cases: - * - Sending periodic status updates - * - Transmitting small amounts of data with guaranteed latency - * - Ideal for devices like keyboards, mice, or game controllers - */ - -template -class in_endpoint : public Interface -{ -public: - ~in_endpoint() override = default; - - in_endpoint(hal::v5::strong_ptr const& p_usb, u8 p_endpoint_number) - : m_usb(p_usb) - , m_endpoint_number(p_endpoint_number) - { - reset(); - } - -private: - void reset() - { - endpoint_descriptor_block(m_endpoint_number) - .setup_in_endpoint_for(m_endpoint_number); - set_endpoint_address_and_type(m_endpoint_number, - to_endpoint_type()); - set_rx_stat(m_endpoint_number, stat::nak); - } - - [[nodiscard]] bool stalled() const - { - return hal::bit_extract( - usb_reg->EP[m_endpoint_number].EPR) <= 0b01; - } - - void driver_write(hal::v5::scatter_span p_data_list) override - { - if (p_data_list.empty()) { - m_usb->flush_endpoint(m_endpoint_number); - } - for (auto const& data : p_data_list) { - m_usb->write_to_endpoint(m_endpoint_number, data); - } - } - - [[nodiscard]] hal::v5::usb::endpoint_info driver_info() const override - { - return { - .size = fixed_endpoint_size, - .number = static_cast(m_endpoint_number | (1U << 7U)), - .stalled = stalled(), - }; - } - - void driver_stall(bool p_should_stall) override - { - if (p_should_stall) { - set_tx_stat(m_endpoint_number, stat::stall); - } else { - set_tx_stat(m_endpoint_number, stat::nak); - } - } - - void driver_reset() override - { - reset(); - } - - hal::v5::strong_ptr m_usb; - u16 m_bytes_read = 0; - u8 m_endpoint_number; -}; - -template -class out_endpoint : public Interface -{ -public: - using rx_tag = typename Interface::on_receive_tag; - - ~out_endpoint() override = default; - - out_endpoint(hal::v5::strong_ptr const& p_usb, u8 p_endpoint_number) - : m_usb(p_usb) - , m_endpoint_number(p_endpoint_number) - { - reset(); - } - -private: - [[nodiscard]] bool stalled() const - { - return hal::bit_extract( - usb_reg->EP[m_endpoint_number].EPR) <= 0b01; - } - - void reset() - { - endpoint_descriptor_block(m_endpoint_number) - .setup_out_endpoint_for(m_endpoint_number); - set_endpoint_address_and_type(m_endpoint_number, - to_endpoint_type()); - set_rx_stat(m_endpoint_number, stat::valid); - } - - void driver_on_receive(hal::callback const& p_callback) override - { - m_usb->set_callback(m_endpoint_number, p_callback); - } - - [[nodiscard]] hal::v5::usb::endpoint_info driver_info() const override - { - return { - .size = fixed_endpoint_size, - .number = m_endpoint_number, - .stalled = stalled(), - }; - } - - void driver_stall(bool p_should_stall) override - { - if (p_should_stall) { - set_rx_stat(m_endpoint_number, stat::stall); - } else { - set_rx_stat(m_endpoint_number, stat::valid); - } - } - - usize driver_read(hal::v5::scatter_span p_data_list) override - { - usize total_memory = 0; - for (auto const& data : p_data_list) { - auto const data_copied = - m_usb->read_endpoint(m_endpoint_number, data, m_bytes_read); - - if (data_copied == 0) { - break; - } - - total_memory += data_copied; - } - return total_memory; - } - - void driver_reset() override - { - reset(); - } - - hal::v5::strong_ptr m_usb; - u16 m_bytes_read = 0; - u8 m_endpoint_number; -}; - -usb_interrupt_endpoint_pair acquire_usb_interrupt_endpoint( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_usb) -{ - auto const endpoint_assignment = p_usb->m_endpoints_allocated++; - - auto out = hal::v5::make_strong_ptr< - out_endpoint>( - p_allocator, p_usb, endpoint_assignment); - - auto in = - hal::v5::make_strong_ptr>( - p_allocator, p_usb, endpoint_assignment); - - return { .out = out, .in = in }; -} - -usb_bulk_endpoint_pair acquire_usb_bulk_endpoint( - std::pmr::polymorphic_allocator<> p_allocator, - hal::v5::strong_ptr const& p_usb) -{ - auto const endpoint_assignment = p_usb->m_endpoints_allocated++; - - auto out = - hal::v5::make_strong_ptr>( - p_allocator, p_usb, endpoint_assignment); - - auto in = - hal::v5::make_strong_ptr>( - p_allocator, p_usb, endpoint_assignment); - - return { .out = out, .in = in }; -} -} // namespace hal::stm32f1 diff --git a/src/stm32f40/output_pin.cpp b/src/stm32f40/output_pin.cpp deleted file mode 100644 index 033138f..0000000 --- a/src/stm32f40/output_pin.cpp +++ /dev/null @@ -1 +0,0 @@ -// This is placeholder diff --git a/src/stm32f411/clock.cpp b/src/stm32f411/clock.cpp deleted file mode 100644 index c1951ad..0000000 --- a/src/stm32f411/clock.cpp +++ /dev/null @@ -1,431 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "flash_reg.hpp" -#include "rcc_reg.hpp" - -namespace hal::stm32f411 { - -namespace { -hal::hertz rtc_clock_rate = 0.0_Hz; // defaults to "no clock" -hal::hertz pll_clock_rate = 0.0_Hz; // undefined until pll is enabled -hal::hertz usb_otg_clock_rate = 0.0_Hz; // undefined until enabled -hal::hertz ahb_clock_rate = internal_high_speed_oscillator; -hal::hertz apb1_clock_rate = internal_high_speed_oscillator; -hal::hertz apb2_clock_rate = internal_high_speed_oscillator; -hal::hertz timer_apb1_clock_rate = internal_high_speed_oscillator; -hal::hertz timer_apb2_clock_rate = internal_high_speed_oscillator; -} // namespace - -void pll_valid(clock_tree const& p_clock_tree) -{ - /// Check if the VCO input can be set from 1_MHz to 2_MHz - if (p_clock_tree.pll.source == pll_source::high_speed_external) { - if (p_clock_tree.high_speed_external < 2.0_MHz || - p_clock_tree.high_speed_external > 63 * 2.0_MHz) { - hal::safe_throw(hal::argument_out_of_domain(nullptr)); - } - } - - /// Check the Output Frequency is within bound - if (p_clock_tree.pll.output > (100.0_MHz) || - p_clock_tree.pll.output < (100.0_MHz / 8)) { - hal::safe_throw(hal::argument_out_of_domain(nullptr)); - } -} - -// TODO (#62): Add I2S to the clock configs -// TODO (#66): Add 48_MHz to the clock configs -hertz configure_pll(clock_tree const& p_clock_tree) -{ - auto vco_in = 2.0_MHz; - float target = 0.0f; - float output_division_factor = 0; - if (p_clock_tree.pll.enable) { - uint8_t input_division_factor = 2U; - pll_valid(p_clock_tree); - - if (p_clock_tree.pll.source == pll_source::high_speed_external) { - if (p_clock_tree.high_speed_external < 4.0_MHz) { - vco_in = p_clock_tree.high_speed_external / 2; - bit_modify(rcc->pllconfig) - .insert(rcc_pllcnfg::input_division_factor, input_division_factor); - } else { - float division_factor = p_clock_tree.high_speed_external / 2.0_MHz; - if ((division_factor - std::floor(division_factor)) > 0) { - input_division_factor = static_cast(division_factor) + 1; - } else { - input_division_factor = static_cast(division_factor); - } - vco_in = p_clock_tree.high_speed_external / division_factor; - } - } else { - input_division_factor = 8; - } - bit_modify(rcc->pllconfig) - .insert(rcc_pllcnfg::input_division_factor, input_division_factor); - - /// 2 * (output_division_factor + 1) is to get the PLLP division factor - /// Page 105 on the RM0383 User Manual - while (p_clock_tree.pll.output * (2.0f * (output_division_factor + 1.0f)) < - 100.0_MHz) { - output_division_factor += 1; - } - - bit_modify(rcc->pllconfig) - .insert(rcc_pllcnfg::main_division_factor, - static_cast(output_division_factor)); - - /// 2 * (output_division_factor + 1) is to get the PLLN multiplicaiton - /// factor Page 105 on the RM0383 User Manual - target = p_clock_tree.pll.output * - (2.0f * (output_division_factor + 1.0f)) / vco_in; - bit_modify(rcc->pllconfig) - .insert(rcc_pllcnfg::main_multiplication_factor, - static_cast(target)); - - bit_modify(rcc->pllconfig) - .insert(rcc_pllcnfg::pll_source, value(p_clock_tree.pll.source)); - - bit_modify(rcc->cr).insert(rcc_cr::main_pll_enable, - p_clock_tree.pll.enable); - - while (!bit_extract(rcc->cr)) { - continue; - } - } - return (vco_in * std::floor(target) / - (2 * (std::floor(output_division_factor + 1.0f)))); -} - -void configure_clocks(clock_tree const& p_clock_tree) -{ - hal::hertz system_clock = 0.0_Hz; - - // ========================================================================= - // Step 1. Select internal clock source for everything. - // Make sure PLLs are not clock sources for everything. - // ========================================================================= - // Step 1.0 Turn on High speed external: - bit_modify(rcc->cr).set(rcc_cr::high_speed_internal_enable); - - // Step 1.1 Set SystemClock to HSI - bit_modify(rcc->config) - .insert(rcc_config::system_clock_switch, - value(system_clock_select::high_speed_internal)); - - // Step 1.4 Reset RTC clock registers - bit_modify(rcc->backup_domain_control) - .set(rcc_backup_domain_control::backup_domain_software_reset); - - // Manually clear the RTC reset bit - bit_modify(rcc->backup_domain_control) - .clear(rcc_backup_domain_control::backup_domain_software_reset); - - // ========================================================================= - // Step 2. Disable PLL and external clock sources - // ========================================================================= - // 2.1 Move the system_clock to HSI - bit_modify(rcc->config).clear(rcc_config::system_clock_switch); - - while (bit_extract(rcc->config)) { - continue; - } - - // 2.2 Disable LSE - bit_modify(rcc->backup_domain_control) - .clear(rcc_backup_domain_control::low_speed_external_enable); - - while (bit_extract( - rcc->backup_domain_control)) { - continue; - } - - // 2.3 Disable HSE - bit_modify(rcc->cr).clear(rcc_cr::high_speed_external_enable); - - while (bit_extract(rcc->cr)) { - continue; - } - - // 2.4 Disable PLL - bit_modify(rcc->cr).clear(rcc_cr::main_pll_enable); - while (bit_extract(rcc->cr)) { - continue; - } - - // ========================================================================= - // Step 3. Enable External Oscillators - // ========================================================================= - // 3.1 Enable HSE - if (p_clock_tree.high_speed_external > 4.0_MHz) { - bit_modify(rcc->cr).set(rcc_cr::high_speed_external_enable); - while (!bit_extract(rcc->cr)) { - continue; - } - } - - // 3.2 Enable LSE - if (p_clock_tree.low_speed_external > 1.0_MHz) { - bit_modify(rcc->backup_domain_control) - .clear(rcc_backup_domain_control::low_speed_external_enable); - - while (bit_extract( - rcc->backup_domain_control)) { - continue; - } - } - - // ========================================================================= - // Step 4. Set up PLL - // ========================================================================= - pll_clock_rate = configure_pll(p_clock_tree); - - // ========================================================================= - // Step 5. Setup peripheral dividers - // ========================================================================= - bit_modify(rcc->config) - .insert(rcc_config::ahb_prescalar, value(p_clock_tree.ahb.divider)) - .insert(rcc_config::apb1_prescalar, value(p_clock_tree.ahb.apb1.divider)) - .insert(rcc_config::apb2_prescalar, value(p_clock_tree.ahb.apb2.divider)); - // ========================================================================= - // Step 6. Setup flash access - // ========================================================================= - bit_modify(flash_config->access_control_reg) - .set(flash_acess_control::instruction_cache_en) - .set(flash_acess_control::data_cache_en) - .set(flash_acess_control::prefetch_cache_en) - .insert(flash_acess_control::latency, 2U); - - // ========================================================================= - // Step 7. Set System Clock and RTC Clock - // ========================================================================= - - std::uint32_t target_clock_source = value(p_clock_tree.system_clock); - bit_modify(rcc->config) - .insert(rcc_config::system_clock_switch, target_clock_source); - - while (bit_extract(rcc->config) != - target_clock_source) { - continue; - } - switch (p_clock_tree.system_clock) { - case system_clock_select::high_speed_internal: - system_clock = internal_high_speed_oscillator; - break; - case system_clock_select::high_speed_external: - system_clock = p_clock_tree.high_speed_external; - break; - case system_clock_select::pll: - system_clock = pll_clock_rate; - break; - } - bit_modify(rcc->backup_domain_control) - .insert(rcc_backup_domain_control::rtc_clock_source, - value(p_clock_tree.rtc.source)) - .insert(rcc_backup_domain_control::rtc_enable, p_clock_tree.rtc.enable); - - bit_modify(rcc->ahb2enr) - .insert(rcc_ahb2::usb_otg_en, p_clock_tree.usb_otg_clock_enable); - // ========================================================================= - // Step 8. Define the clock rates for the system - // ========================================================================= - - switch (p_clock_tree.ahb.divider) { - case ahb_divider::divide_by_1: - ahb_clock_rate = system_clock / 1; - break; - case ahb_divider::divide_by_2: - ahb_clock_rate = system_clock / 2; - break; - case ahb_divider::divide_by_4: - ahb_clock_rate = system_clock / 4; - break; - case ahb_divider::divide_by_8: - ahb_clock_rate = system_clock / 8; - break; - case ahb_divider::divide_by_16: - ahb_clock_rate = system_clock / 16; - break; - case ahb_divider::divide_by_64: - ahb_clock_rate = system_clock / 64; - break; - case ahb_divider::divide_by_128: - ahb_clock_rate = system_clock / 128; - break; - case ahb_divider::divide_by_256: - ahb_clock_rate = system_clock / 256; - break; - case ahb_divider::divide_by_512: - ahb_clock_rate = system_clock / 512; - break; - } - - switch (p_clock_tree.ahb.apb1.divider) { - case apb_divider::divide_by_1: - apb1_clock_rate = ahb_clock_rate / 1; - break; - case apb_divider::divide_by_2: - apb1_clock_rate = ahb_clock_rate / 2; - break; - case apb_divider::divide_by_4: - apb1_clock_rate = ahb_clock_rate / 4; - break; - case apb_divider::divide_by_8: - apb1_clock_rate = ahb_clock_rate / 8; - break; - case apb_divider::divide_by_16: - apb1_clock_rate = ahb_clock_rate / 16; - break; - } - - switch (p_clock_tree.ahb.apb2.divider) { - case apb_divider::divide_by_1: - apb2_clock_rate = ahb_clock_rate / 1; - break; - case apb_divider::divide_by_2: - apb2_clock_rate = ahb_clock_rate / 2; - break; - case apb_divider::divide_by_4: - apb2_clock_rate = ahb_clock_rate / 4; - break; - case apb_divider::divide_by_8: - apb2_clock_rate = ahb_clock_rate / 8; - break; - case apb_divider::divide_by_16: - apb2_clock_rate = ahb_clock_rate / 16; - break; - } - - switch (p_clock_tree.rtc.source) { - case rtc_source::no_clock: - rtc_clock_rate = 0.0_Hz; - break; - case rtc_source::low_speed_internal: - rtc_clock_rate = internal_low_speed_oscillator; - break; - case rtc_source::low_speed_external: - rtc_clock_rate = p_clock_tree.low_speed_external; - break; - case rtc_source::high_speed_external_divided_by_128: - rtc_clock_rate = p_clock_tree.high_speed_external / 128; - break; - } - - // This is set to the default Dedicated Clocks Configuration setting. Unsure - // how to create an api for this register - - switch (p_clock_tree.ahb.apb1.divider) { - case apb_divider::divide_by_1: - timer_apb1_clock_rate = apb1_clock_rate; - break; - default: - timer_apb1_clock_rate = apb1_clock_rate * 2; - break; - } - - switch (p_clock_tree.ahb.apb2.divider) { - case apb_divider::divide_by_1: - timer_apb2_clock_rate = apb2_clock_rate; - break; - default: - timer_apb2_clock_rate = apb2_clock_rate * 2; - break; - } - return; -} - -hal::hertz frequency(peripheral p_id) -{ - switch (p_id) { - // TODO #62: Add I2S to the clock configs - case peripheral::i2s: - return pll_clock_rate; - - // Arm Cortex running clock rate. - // This code does not utilize the /8 clock for the system timer, thus the - // clock rate for that subsystem is equal to the CPU running clock. - case peripheral::system_timer: - [[fallthrough]]; - case peripheral::cpu: - return ahb_clock_rate; - - // APB1 Timers - case peripheral::timer2: - [[fallthrough]]; - case peripheral::timer3: - [[fallthrough]]; - case peripheral::timer4: - [[fallthrough]]; - case peripheral::timer5: - return timer_apb1_clock_rate; - - // APB2 Timers - case peripheral::timer1: - [[fallthrough]]; - case peripheral::timer9: - [[fallthrough]]; - case peripheral::timer10: - [[fallthrough]]; - case peripheral::timer11: - return timer_apb2_clock_rate; - - default: { - auto id_bus = value(p_id) / bus_id_offset; - switch (id_bus * bus_id_offset) { - case ahb1_bus: - return ahb_clock_rate; - case ahb2_bus: - return usb_otg_clock_rate; - case apb1_bus: - return apb1_clock_rate; - case apb2_bus: - return apb2_clock_rate; - default: - return 0.0_Hz; - } - } - } - - return 0.0_Hz; -} - -void maximum_speed_using_internal_oscillator() -{ - configure_clocks(clock_tree{ - .high_speed_external = 0.0_Hz, - .low_speed_external = 0.0_Hz, - .pll = { .enable = true, - .source = pll_source::high_speed_internal, - .output = 100.0_MHz }, - .system_clock = system_clock_select::pll, - .ahb = { .divider = ahb_divider::divide_by_1, - .apb1 = { .divider = apb_divider::divide_by_2 }, - .apb2 = { .divider = apb_divider::divide_by_1, - .adc = { .divider = adc_divider::divide_by_2 } } - - } }); -} - -}; // namespace hal::stm32f411 diff --git a/src/stm32f411/dma.cpp b/src/stm32f411/dma.cpp deleted file mode 100644 index 8d02dfd..0000000 --- a/src/stm32f411/dma.cpp +++ /dev/null @@ -1,260 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "dma.hpp" -#include "power.hpp" - -namespace hal::stm32f411 { -namespace { -std::array, 16> dma_callbacks{}; - -template -void handle_dma_interrupt() noexcept -{ - dma_callbacks[dma_index](); - /// DMA transfer masks are all on bits 5,11,21 and 27 - constexpr std::array const transfer_complete_mask = { - bit_mask::from<5>(), - bit_mask::from<11>(), - bit_mask::from<21>(), - bit_mask::from<27>(), - }; - - dma_config_t* dma_reg; - if constexpr (dma_index / 8) { - dma_reg = get_dma_reg(peripheral::dma1); - } else { - dma_reg = get_dma_reg(peripheral::dma2); - } - - constexpr auto stream_index = dma_index % 8; - constexpr auto mask_index = stream_index % 4; - constexpr auto complete_mask = transfer_complete_mask[mask_index]; - - if constexpr (stream_index < 4) { - bit_modify(dma_reg->interupt_status_clear_low).clear(complete_mask); - } else { - bit_modify(dma_reg->interupt_status_clear_high).clear(complete_mask); - } -} - -void initialize_dma(peripheral p_dma) -{ - power dma_power(p_dma); - if (dma_power.is_on()) { - return; - } - - dma_power.on(); - - initialize_interrupts(); - - hal::cortex_m::enable_interrupt(irq::dma1_channel0, handle_dma_interrupt<0>); - hal::cortex_m::enable_interrupt(irq::dma1_channel1, handle_dma_interrupt<1>); - hal::cortex_m::enable_interrupt(irq::dma1_channel2, handle_dma_interrupt<2>); - hal::cortex_m::enable_interrupt(irq::dma1_channel3, handle_dma_interrupt<3>); - hal::cortex_m::enable_interrupt(irq::dma1_channel4, handle_dma_interrupt<4>); - hal::cortex_m::enable_interrupt(irq::dma1_channel5, handle_dma_interrupt<5>); - hal::cortex_m::enable_interrupt(irq::dma1_channel6, handle_dma_interrupt<6>); - hal::cortex_m::enable_interrupt(irq::dma1_channel7, handle_dma_interrupt<7>); - hal::cortex_m::enable_interrupt(irq::dma2_channel0, handle_dma_interrupt<8>); - hal::cortex_m::enable_interrupt(irq::dma2_channel1, handle_dma_interrupt<9>); - hal::cortex_m::enable_interrupt(irq::dma2_channel2, handle_dma_interrupt<10>); - hal::cortex_m::enable_interrupt(irq::dma2_channel3, handle_dma_interrupt<11>); - hal::cortex_m::enable_interrupt(irq::dma2_channel4, handle_dma_interrupt<12>); - hal::cortex_m::enable_interrupt(irq::dma2_channel5, handle_dma_interrupt<13>); - hal::cortex_m::enable_interrupt(irq::dma2_channel6, handle_dma_interrupt<14>); - hal::cortex_m::enable_interrupt(irq::dma2_channel7, handle_dma_interrupt<15>); -} - -hal::atomic_spin_lock dma_spin_lock; -hal::basic_lock* dma_lock = &dma_spin_lock; - -// This is here for cost sizing -[[maybe_unused]] constexpr auto dma_memory_usage_size = - sizeof(dma_callbacks) + sizeof(dma_spin_lock) + sizeof(dma_lock); // NOLINT -} // namespace - -void set_dma_lock(hal::basic_lock& p_lock) -{ - dma_lock = &p_lock; -} - -dma_channel_stream_t set_available_stream( - peripheral p_dma, - std::span const& p_possible_streams) -{ - auto dma_addr = get_dma_reg(p_dma); - while (true) { - for (auto stream_candidate : p_possible_streams) { - if (bit_extract( - dma_addr->stream[stream_candidate.stream].configure) == - stream_candidate.channel) { - return stream_candidate; - } else if (bit_extract( - dma_addr->stream[stream_candidate.stream].configure) == 0) { - bit_modify(dma_addr->stream[stream_candidate.stream].configure) - .insert(dma_stream_config::channel_select, stream_candidate.channel); - return stream_candidate; - } - } - } -} - -dma_channel_stream_t setup_dma_transfer( - peripheral p_dma, - std::span const& p_possible_streams, - dma_settings_t const& p_configuration, - hal::callback p_interrupt_callback) -{ - auto dma_addr = get_dma_reg(p_dma); - - std::lock_guard take_dma_lock(*dma_lock); - initialize_dma(p_dma); - - auto selected_config = set_available_stream(p_dma, p_possible_streams); - auto& stream = dma_addr->stream[selected_config.stream]; - switch (p_configuration.transfer_type) { - case dma_transfer_type::peripheral_to_memory: - stream.peripheral_address = - std::bit_cast(p_configuration.source); - stream.memory_0_address = - std::bit_cast(p_configuration.destination); - break; - case dma_transfer_type::memory_to_peripheral: - stream.peripheral_address = - std::bit_cast(p_configuration.destination); - stream.memory_0_address = - std::bit_cast(p_configuration.source); - break; - default: - stream.peripheral_address = - std::bit_cast(p_configuration.source); - stream.memory_0_address = - std::bit_cast(p_configuration.destination); - } - - stream.transfer_count = p_configuration.transfer_length; - - bit_modify(dma_addr->stream[selected_config.stream].configure) - .insert(dma_stream_config::peripheral_flow_controller, - value(p_configuration.flow_controller)) - .insert(dma_stream_config::data_transfer_direction, - value(p_configuration.transfer_type)) - .insert(dma_stream_config::circular_mode_enable, - p_configuration.circular_mode) - .insert(dma_stream_config::peripheral_increment_mode, - p_configuration.peripheral_address_increment) - .insert(dma_stream_config::memory_increment_mode, - p_configuration.memory_address_increment) - .insert(dma_stream_config::peripheral_data_size, - value(p_configuration.peripheral_data_size)) - .insert(dma_stream_config::memory_data_size, - value(p_configuration.memory_data_size)) - .insert(dma_stream_config::priority_level, - value(p_configuration.priority_level)) - .insert(dma_stream_config::double_buffer_mode, - p_configuration.double_buffer_mode) - .insert(dma_stream_config::current_target, p_configuration.current_target) - .insert(dma_stream_config::peripheral_burst_transfer, - value(p_configuration.peripheral_burst_size)) - .insert(dma_stream_config::memory_burst_transfer, - value(p_configuration.memory_burst_size)) - .insert(dma_stream_config::channel_select, selected_config.channel); - - bit_modify(dma_addr->stream[selected_config.stream].fifo_control) - .clear(dma_fifo_config::direct_mode_disable); - - uint8_t callback_entry = 0; - if (p_dma == peripheral::dma1) { - callback_entry = selected_config.stream; - } else { - callback_entry = selected_config.stream + 8; - } - - dma_callbacks[callback_entry] = std::move(p_interrupt_callback); - - constexpr std::array const dma_intr_mask = { - bit_mask::from<5, 0>(), - bit_mask::from<11, 6>(), - bit_mask::from<21, 16>(), - bit_mask::from<27, 22>(), - }; - - auto complete_mask = dma_intr_mask[selected_config.stream % 4]; - constexpr uint8_t clear_data = 0x1D; - if (selected_config.stream < 4) { - bit_modify(dma_addr->interupt_status_clear_low) - .insert(complete_mask, clear_data); - } else { - bit_modify(dma_addr->interupt_status_clear_high) - .insert(complete_mask, clear_data); - } - - bit_modify(dma_addr->stream[selected_config.stream].configure) - .set(dma_stream_config::stream_enable); - return selected_config; -}; - -void set_dma_memory_transfer(dma p_dma, - std::span p_source, - std::span const p_destination) -{ - std::array all_streams = { - { { .stream = 0, .channel = 0 }, - { .stream = 1, .channel = 0 }, - { .stream = 2, .channel = 0 }, - { .stream = 3, .channel = 0 }, - { .stream = 4, .channel = 0 }, - { .stream = 5, .channel = 0 }, - { .stream = 6, .channel = 0 }, - { .stream = 7, .channel = 0 } } - }; - dma_settings_t dma_setting = { - .source = p_source.data(), - .destination = p_destination.data(), - - .transfer_length = p_source.size(), - .flow_controller = dma_flow_controller::dma_controls_flow, - .transfer_type = dma_transfer_type::memory_to_memory, - .circular_mode = false, - .peripheral_address_increment = true, - .memory_address_increment = true, - .peripheral_data_size = dma_transfer_size::byte, - .memory_data_size = dma_transfer_size::byte, - .priority_level = dma_priority_level::high, - .double_buffer_mode = false, - .current_target = false, - .peripheral_burst_size = dma_burst_size::single_transfer, - .memory_burst_size = dma_burst_size::single_transfer - }; - setup_dma_transfer( - static_cast(p_dma), all_streams, dma_setting, []() {}); -} -} // namespace hal::stm32f411 diff --git a/src/stm32f411/dma.hpp b/src/stm32f411/dma.hpp deleted file mode 100644 index 032db76..0000000 --- a/src/stm32f411/dma.hpp +++ /dev/null @@ -1,213 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -namespace hal::stm32f411 { -enum class dma_transfer_type : std::uint8_t -{ - peripheral_to_memory = 0b00U, - memory_to_peripheral = 0b01U, - memory_to_memory = 0b10U -}; -enum class dma_transfer_size : std::uint8_t -{ - byte = 0b00U, - half_word = 0b01U, - word = 0b10U -}; - -enum class dma_burst_size : std::uint8_t -{ - single_transfer = 0b00U, - transfer_4_beats = 0b01U, - transfer_8_beats = 0b10U, - transfer_16_beats = 0b11U, -}; - -enum class dma_priority_level : std::uint8_t -{ - low = 0b00U, - medium = 0b01U, - high = 0b10U, - very_high = 0b11U, -}; - -enum class dma_flow_controller : u8 -{ - dma_controls_flow = 0b0U, - peripheral_controls_flow = 0b1U, -}; - -struct dma_channel_stream_t -{ - uint8_t stream; - uint8_t channel; -}; -/// DMA register map -struct stream_config_t -{ - /// Offset 0x00: This register is used to configure the concerned stream - std::uint32_t volatile configure; - /// Offset 0x04: Number of data items to be transferred (0 up to 65535). This - /// register can be written only when the stream is disabled - std::uint32_t volatile transfer_count; - /// Offset 0x08: Base address of the peripheral data register from/to which - /// the data will be read/written. These bits are write-protected and can be - /// written only when bit EN = '0' in the DMA_SxCR register. - std::uintptr_t volatile peripheral_address; - /// Offset 0x0C: Base address of Memory area 0 from/to which the data will be - /// read/written - std::uintptr_t volatile memory_0_address; - /// Offset 0x10: Base address of Memory area 1 from/to which the data will be - /// read/written - std::uintptr_t volatile memory_1_address; - /// Offset 0x14: fifo_control - std::uint32_t volatile fifo_control; -}; -struct dma_config_t -{ - /// Offset 0x00: low interrupt status register - std::uint32_t volatile interupt_status_low; - /// Offset 0x04: high interrupt status register - std::uint32_t volatile interupt_status_high; - /// Offset 0x08: low interrupt flag clear register - std::uint32_t volatile interupt_status_clear_low; - /// Offset 0x0C: low interrupt flag clear register - std::uint32_t volatile interupt_status_clear_high; - std::array stream; -}; -struct dma_stream_config -{ - static constexpr auto stream_enable = bit_mask::from<0>(); - static constexpr auto direct_mode_error_interupt_enable = bit_mask::from<1>(); - static constexpr auto transfer_error_interupt_enable = bit_mask::from<2>(); - static constexpr auto half_transfer_interupt_enable = bit_mask::from<3>(); - static constexpr auto transfer_complete_interupt_enable = bit_mask::from<4>(); - /// 0: DMA is the flow controller - /// 1: peripheral is the flow controller - static constexpr auto peripheral_flow_controller = bit_mask::from<5>(); - /// 00: Peripheral-to-memory - /// 01: Memory-to-peripheral - /// 10: Memory-to-memory - static constexpr auto data_transfer_direction = bit_mask::from<7, 6>(); - static constexpr auto circular_mode_enable = bit_mask::from<8>(); - /// 0: peripheral address pointer is fixed - /// 1: peripheral address pointer is incremented after each data transfer (set - /// by peripheral_data_size) - static constexpr auto peripheral_increment_mode = bit_mask::from<9>(); - /// 0: memory address pointer is fixed - /// 1: memory address pointer is incremented after each data transfer (set by - /// memory_data_size) - static constexpr auto memory_increment_mode = bit_mask::from<10>(); - /// 00: byte (8-bit) - /// 01: half-word (16-bit) - /// 10: word (32-bit) - static constexpr auto peripheral_data_size = bit_mask::from<12, 11>(); - /// 00: byte (8-bit) - /// 01: half-word (16-bit) - /// 10: word (32-bit) - static constexpr auto memory_data_size = bit_mask::from<14, 13>(); - /// 0: The offset size for the peripheral address calculation is linked to the - /// PSIZE 1: The offset size for the peripheral address calculation is fixed - /// to 4 (32-bit alignment). - static constexpr auto peripheral_offset_size = bit_mask::from<15>(); - /// 00: Low - /// 01: Medium - /// 10: High - /// 11: Very high - static constexpr auto priority_level = bit_mask::from<17, 16>(); - /// 0: No buffer switching at the end of transfer - /// 1: Memory target switched at the end of the DMA transfer - static constexpr auto double_buffer_mode = bit_mask::from<18>(); - /// 0: The current target memory is Memory 0 (addressed by the DMA_SxM0AR - /// pointer) 1: The current target memory is Memory 1 (addressed by the - /// DMA_SxM1AR pointer) - static constexpr auto current_target = bit_mask::from<19>(); - /// 00: single transfer - /// 01: INCR4 (incremental burst of 4 beats) - /// 10: INCR8 (incremental burst of 8 beats) - /// 11: INCR16 (incremental burst of 16 beats) - static constexpr auto peripheral_burst_transfer = bit_mask::from<22, 21>(); - /// 00: single transfer - /// 01: INCR4 (incremental burst of 4 beats) - /// 10: INCR8 (incremental burst of 8 beats) - /// 11: INCR16 (incremental burst of 16 beats) - static constexpr auto memory_burst_transfer = bit_mask::from<24, 23>(); - /// Refer to Table 27(DMA 1) or 28(DMA 2) of the user manual for channel - /// selection - static constexpr auto channel_select = bit_mask::from<27, 25>(); -}; -struct dma_fifo_config -{ - static constexpr auto direct_mode_disable = bit_mask::from<2>(); - static constexpr auto threshold_select = bit_mask::from<1, 0>(); -}; -inline constexpr intptr_t ahb_base = 0x4002'0000UL; -inline constexpr intptr_t dma_base = ahb_base + 0x6000; -static inline dma_config_t* get_dma_reg(peripheral p_dma) -{ - auto const dma_index = - static_cast(hal::value(p_dma) - hal::value(peripheral::dma1)); - - // STM has dedicated memory blocks where every 2^10 is a new DMA register - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(dma_base + (dma_index << 10)); -} - -struct dma_settings_t -{ - void const volatile* source; - void volatile* destination; - - size_t transfer_length; - dma_flow_controller flow_controller; - dma_transfer_type transfer_type; - bool circular_mode; - bool peripheral_address_increment; - bool memory_address_increment; - dma_transfer_size peripheral_data_size; - dma_transfer_size memory_data_size; - dma_priority_level priority_level; - bool double_buffer_mode; - bool current_target; - dma_burst_size peripheral_burst_size; - dma_burst_size memory_burst_size; -}; - -/** - * @brief Setup and start a dma transfer - * - * @param p_configuration - dma configuration - * @param p_interrupt_callback - callback when dma has completed - */ - -dma_channel_stream_t setup_dma_transfer( - peripheral p_dma, - std::span const& p_possible_streams, - dma_settings_t const& p_configuration, - hal::callback p_interrupt_callback); - -} // namespace hal::stm32f411 diff --git a/src/stm32f411/flash_reg.hpp b/src/stm32f411/flash_reg.hpp deleted file mode 100644 index c3f241c..0000000 --- a/src/stm32f411/flash_reg.hpp +++ /dev/null @@ -1,56 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -namespace hal::stm32f411 { -/// flash register map -struct flash_config_t -{ - /// Offset 0x00: The Flash access control register is used to enable/disable - /// the acceleration features and control the Flash memory access time - /// according to CPU frequency. - u32 volatile access_control_reg; - /// Offset 0x04: The Flash key register is used to allow access to the Flash - /// control register and so, to allow program and erase operations. - u32 volatile key_reg; - /// Offset 0x08: The Flash option key register is used to allow program and - /// erase operations in the user configuration sector. - u32 volatile option_key_reg; - /// Offset 0x0C: The Flash status register gives information on ongoing - /// program and erase operations. - u32 volatile status_reg; - /// Offset 0x10: The Flash control register is used to configure and start - /// Flash memory operations. - u32 volatile control_reg; - /// Offset 0x14: The FLASH_OPTCR register is used to modify the user option - /// bytes - u32 volatile optional_control_reg; -}; - -struct flash_acess_control -{ - static constexpr auto latency = bit_mask::from<3, 0>(); - static constexpr auto prefetch_cache_en = bit_mask::from<8>(); - static constexpr auto instruction_cache_en = bit_mask::from<9>(); - static constexpr auto data_cache_en = bit_mask::from<10>(); - static constexpr auto instruction_cache_reset = bit_mask::from<11>(); - static constexpr auto data_cache_reset = bit_mask::from<12>(); -}; - -inline auto* flash_config = reinterpret_cast(0x4002'3C00); -} // namespace hal::stm32f411 diff --git a/src/stm32f411/gpio_reg.hpp b/src/stm32f411/gpio_reg.hpp deleted file mode 100644 index 4370309..0000000 --- a/src/stm32f411/gpio_reg.hpp +++ /dev/null @@ -1,62 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include -#include - -namespace hal::stm32f411 { -/// gpio peripheral register map -struct gpio_config_t -{ - /// Offset: 0x000 pin mode (00 = Input, 01 = Output, 10 = Alternate Function - /// mode, 11 Analog) (R/W) - u32 volatile pin_mode; - /// Offset: 0x004 output type(0 = output push-pull, 1 = output open-drain) - u32 volatile output_type; - /// Offset: 0x008 output speed(00 = Low speed, 01 = Medium speed, 10 = Fast - /// speed, 11 = High speed) - u32 volatile output_speed; - /// Offset: 0x00C port pull-up/pull-down (00 = no pull-up/pull-down, 01 = - /// pull-up, 10 pull-down) - u32 volatile pull_up_pull_down; - /// Offset: 0x010 port input data (RO) - u32 volatile input_data; - /// Offset: 0x014 port output data - u32 volatile output_data; - /// Offset: 0x018low port set (0 = no action, 1 = reset) - std::uint16_t volatile set; - /// Offset: 0x018high port reset (0 = no action, 1 = reset) - std::uint16_t volatile reset; - /// Offset: 0x01C config lock - u32 volatile lock; - /// Offset: 0x020 alternate function low (bits 0 - 7) - u32 volatile alt_function_low; - /// Offset: 0x024 alternate function high (bits 8 - 15) - u32 volatile alt_function_high; -}; - -inline constexpr intptr_t ahb_base = 0x4002'0000UL; - -static inline gpio_config_t* get_gpio_reg(hal::stm32f411::peripheral p_port) -{ - // STM has dedicated memory blocks where every 2^10 is a new gpio register - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(ahb_base + - (hal::value(p_port) << 10)); -} -} // namespace hal::stm32f411 diff --git a/src/stm32f411/i2c.cpp b/src/stm32f411/i2c.cpp deleted file mode 100644 index f8b0720..0000000 --- a/src/stm32f411/i2c.cpp +++ /dev/null @@ -1,173 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estelland the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "libhal-arm-mcu/interrupt.hpp" -#include "power.hpp" - -namespace hal::stm32f411 { -i2c_manager_impl::i2c_manager_impl(peripheral p_select) - : m_port(p_select) -{ - power(m_port).on(); -} - -i2c_manager_impl::~i2c_manager_impl() -{ - power(m_port).off(); -} -i2c_manager_impl::i2c i2c_manager_impl::acquire_i2c( - hal::i2c::settings const& p_settings) -{ - return { *this, p_settings }; -} - -i2c_manager_impl::i2c::i2c(i2c_manager_impl& p_manager, - i2c::settings const& p_settings) -{ - auto const i2c1 = reinterpret_cast(0x4000'5400); - auto const i2c2 = reinterpret_cast(0x4000'5800); - auto const i2c3 = reinterpret_cast(0x4000'5C00); - m_manager = &p_manager; - switch (p_manager.m_port) { - case peripheral::i2c1: { - m_i2c = stm32_generic::i2c(i2c1); - pin scl(peripheral::gpio_b, 6); - pin sda(peripheral::gpio_b, 7); - scl.function(pin::pin_function::alternate4) - .open_drain(true) - .resistor(pin_resistor::pull_up); - sda.function(pin::pin_function::alternate4) - .open_drain(true) - .resistor(pin_resistor::pull_up); - } break; - case peripheral::i2c2: { - m_i2c = stm32_generic::i2c(i2c2); - pin scl(peripheral::gpio_b, 10); - pin sda(peripheral::gpio_b, 11); - scl.function(pin::pin_function::alternate4) - .open_drain(true) - .resistor(hal::pin_resistor::pull_up); - sda.function(pin::pin_function::alternate4) - .open_drain(true) - .resistor(pin_resistor::pull_up); - } break; - case peripheral::i2c3: { - m_i2c = stm32_generic::i2c(i2c3); - pin scl(peripheral::gpio_a, 8); - pin sda(peripheral::gpio_c, 9); - scl.function(pin::pin_function::alternate4) - .open_drain(true) - .resistor(hal::pin_resistor::pull_up); - sda.function(pin::pin_function::alternate4) - .open_drain(true) - .resistor(pin_resistor::pull_up); - } break; - default: - hal::safe_throw(hal::operation_not_supported(this)); - } - i2c::driver_configure(p_settings); - stm32f411::initialize_interrupts(); - setup_interrupt(); -}; -void i2c_manager_impl::i2c::driver_transaction( - hal::byte p_address, - std::span p_data_out, - std::span p_data_in, - hal::function_ref p_timeout) -{ - m_i2c.transaction(p_address, p_data_out, p_data_in, p_timeout); -} - -i2c_manager_impl::i2c::~i2c() -{ - switch (m_manager->m_port) { - case peripheral::i2c1: - cortex_m::disable_interrupt(irq::i2c1_ev); - cortex_m::disable_interrupt(irq::i2c1_er); - break; - case peripheral::i2c2: - cortex_m::disable_interrupt(irq::i2c2_ev); - cortex_m::disable_interrupt(irq::i2c2_er); - break; - case peripheral::i2c3: - [[fallthrough]]; - default: - cortex_m::disable_interrupt(irq::i2c3_ev); - cortex_m::disable_interrupt(irq::i2c3_er); - break; - } - power(m_manager->m_port).off(); -} - -void i2c_manager_impl::i2c::driver_configure(settings const& p_settings) -{ - m_i2c.configure(p_settings, frequency(m_manager->m_port)); -} -void i2c_manager_impl::i2c::setup_interrupt() -{ - // Create a lambda to call the interrupt() method - auto event_isr = [this]() { m_i2c.handle_i2c_event(); }; - auto error_isr = [this]() { m_i2c.handle_i2c_error(); }; - - // A pointer to save the static_callable isr address to. - cortex_m::interrupt_pointer event_handler; - cortex_m::interrupt_pointer error_handler; - - switch (m_manager->m_port) { - case peripheral::i2c1: - event_handler = - static_callable(event_isr).get_handler(); - error_handler = - static_callable(error_isr).get_handler(); - // Enable interrupt service routine. - cortex_m::enable_interrupt(irq::i2c1_ev, event_handler); - cortex_m::enable_interrupt(irq::i2c1_er, error_handler); - break; - case peripheral::i2c2: - event_handler = - static_callable(event_isr).get_handler(); - error_handler = - static_callable(error_isr).get_handler(); - // Enable interrupt service routine. - cortex_m::enable_interrupt(irq::i2c2_ev, event_handler); - cortex_m::enable_interrupt(irq::i2c2_er, error_handler); - break; - case peripheral::i2c3: - [[fallthrough]]; - default: - event_handler = - static_callable(event_isr).get_handler(); - error_handler = - static_callable(error_isr).get_handler(); - // Enable interrupt service routine. - cortex_m::enable_interrupt(irq::i2c3_ev, event_handler); - cortex_m::enable_interrupt(irq::i2c3_er, error_handler); - break; - } -} -} // namespace hal::stm32f411 diff --git a/src/stm32f411/input_pin.cpp b/src/stm32f411/input_pin.cpp deleted file mode 100644 index c30611a..0000000 --- a/src/stm32f411/input_pin.cpp +++ /dev/null @@ -1,52 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include - -#include "gpio_reg.hpp" - -namespace hal::stm32f411 { -input_pin::input_pin(hal::stm32f411::peripheral p_port, - std::uint8_t p_pin, - settings const& p_settings) - : m_port(p_port) - , m_pin(p_pin) -{ - input_pin::driver_configure(p_settings); -} - -void input_pin::driver_configure(settings const& p_settings) -{ - bit_mask pin_mode_mask = { .position = 2 * static_cast(m_pin), - .width = 2 }; - - bit_modify(get_gpio_reg(m_port)->pin_mode).clear(pin_mode_mask); - - pin(m_port, m_pin) - .function(pin::pin_function::input) - .open_drain(false) - .resistor(p_settings.resistor); -} - -bool input_pin::driver_level() -{ - bit_mask input_data_mask = { .position = static_cast(m_pin), - .width = 1 }; - auto pin_value = - bit_extract(input_data_mask, get_gpio_reg(m_port)->input_data); - return static_cast(pin_value); -} -} // namespace hal::stm32f411 diff --git a/src/stm32f411/interrupt.cpp b/src/stm32f411/interrupt.cpp deleted file mode 100644 index 9ebe5a1..0000000 --- a/src/stm32f411/interrupt.cpp +++ /dev/null @@ -1,10 +0,0 @@ -#include -#include -#include - -namespace hal::stm32f411 { -void initialize_interrupts() -{ - hal::cortex_m::initialize_interrupts(); -} -} // namespace hal::stm32f411 diff --git a/src/stm32f411/output_pin.cpp b/src/stm32f411/output_pin.cpp deleted file mode 100644 index 562adb1..0000000 --- a/src/stm32f411/output_pin.cpp +++ /dev/null @@ -1,60 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include "gpio_reg.hpp" - -namespace hal::stm32f411 { - -output_pin::output_pin(hal::stm32f411::peripheral p_port, - std::uint8_t p_pin, - output_pin::settings p_settings) - : m_port(p_port) - , m_pin(p_pin) -{ - output_pin::driver_configure(p_settings); -} - -void output_pin::driver_configure(settings const& p_settings) -{ - bit_mask pin_mode_mask = { .position = 2 * static_cast(m_pin), - .width = 2 }; - bit_modify(get_gpio_reg(m_port)->pin_mode).insert(pin_mode_mask, 0b01U); - - pin(m_port, m_pin) - .function(pin::pin_function::output) - .open_drain(p_settings.open_drain) - .resistor(p_settings.resistor); -} - -void output_pin::driver_level(bool p_high) -{ - bit_mask set_bit = { .position = static_cast(m_pin), .width = 1 }; - if (p_high) { - get_gpio_reg(m_port)->set = bit_value(0U).set(set_bit).to(); - } else { - get_gpio_reg(m_port)->reset = - bit_value(0U).set(set_bit).to(); - } -} - -bool output_pin::driver_level() -{ - bit_mask output_data_mask = { .position = static_cast(m_pin), - .width = 1 }; - return bit_extract(output_data_mask, get_gpio_reg(m_port)->output_data); -} -} // namespace hal::stm32f411 diff --git a/src/stm32f411/pin.cpp b/src/stm32f411/pin.cpp deleted file mode 100644 index 295d713..0000000 --- a/src/stm32f411/pin.cpp +++ /dev/null @@ -1,114 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -#include -#include -#include -#include - -#include "gpio_reg.hpp" -#include "power.hpp" -#include "rcc_reg.hpp" - -namespace hal::stm32f411 { - -pin::pin(peripheral p_port, std::uint8_t p_pin) noexcept - : m_port(p_port) - , m_pin(p_pin) -{ - power(p_port).on(); -} - -pin const& pin::function(pin_function p_function) const noexcept -{ - auto port_reg = get_gpio_reg(m_port); - bit_mask pin_mode_mask = { .position = static_cast(m_pin) * 2U, - .width = 2 }; - - switch (p_function) { - case pin_function::input: - bit_modify(port_reg->pin_mode).insert(pin_mode_mask, 0b00U); - break; - case pin_function::output: - bit_modify(port_reg->pin_mode).insert(pin_mode_mask, 0b01U); - break; - case pin_function::analog: - bit_modify(port_reg->pin_mode).insert(pin_mode_mask, 0b11U); - break; - default: - bit_modify(port_reg->pin_mode).insert(pin_mode_mask, 0b10U); - uint8_t alt_func = static_cast(p_function) - 3U; - bit_mask alt_func_mask = { .position = - (static_cast(m_pin) * 4U) % 32, - .width = 4 }; - if (m_pin < 8) { - bit_modify(port_reg->alt_function_low).insert(alt_func_mask, alt_func); - } else { - bit_modify(port_reg->alt_function_high).insert(alt_func_mask, alt_func); - } - break; - } - return *this; -} - -pin const& pin::resistor(hal::pin_resistor p_resistor) const noexcept -{ - // modify the pull_up_pull_down reg to the enumclass of p_registor - auto port_reg = get_gpio_reg(m_port); - bit_mask port_mask = { .position = 2 * static_cast(m_pin), - .width = 2 }; - switch (p_resistor) { - case pin_resistor::none: - hal::bit_modify(port_reg->pull_up_pull_down).insert(port_mask, 0b00U); - break; - case pin_resistor::pull_up: - hal::bit_modify(port_reg->pull_up_pull_down).insert(port_mask, 0b01U); - break; - case pin_resistor::pull_down: - hal::bit_modify(port_reg->pull_up_pull_down).insert(port_mask, 0b10U); - break; - default: - hal::bit_modify(port_reg->pull_up_pull_down).insert(port_mask, 0b00U); - break; - } - return *this; -} - -pin const& pin::open_drain(bool p_enable) const noexcept -{ - // modify output_type to p_enable - auto port_reg = get_gpio_reg(m_port); - bit_mask pin_mask = { .position = static_cast(m_pin), .width = 1 }; - - bit_modify(port_reg->output_type) - .insert(pin_mask, static_cast(p_enable)); - return *this; -} - -void pin::activate_mco_pc9(mco_source p_source) -{ - bit_modify(rcc->config) - .insert(rcc_config::mco2_clock_select, value(p_source)); - bit_modify(rcc->config).insert(rcc_config::mco2_prescaler, 0b110U); - pin a8(peripheral::gpio_c, 9); - a8.function(pin_function::alternate0); - - return; -} - -} // namespace hal::stm32f411 diff --git a/src/stm32f411/power.cpp b/src/stm32f411/power.cpp deleted file mode 100644 index eb27e4e..0000000 --- a/src/stm32f411/power.cpp +++ /dev/null @@ -1,76 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include - -#include "power.hpp" -#include "rcc_reg.hpp" - -namespace hal::stm32f411 { -namespace { -uint32_t volatile* enable(uint32_t p_bus_index) -{ - switch (p_bus_index) { - case 0: - return &rcc->ahb1enr; - case 1: - return &rcc->ahb2enr; - case 2: - [[fallthrough]]; - case 3: - return &rcc->apb1enr; - case 4: - return &rcc->apb2enr; - case 5: - [[fallthrough]]; - default: - return nullptr; - } -} -} // namespace - -power::power(peripheral p_peripheral) -{ - auto peripheral_value = hal::value(p_peripheral); - auto bus_number = peripheral_value / bus_id_offset; - - m_bit_position = static_cast(peripheral_value % bus_id_offset); - m_enable_register = enable(static_cast(bus_number)); -} - -void power::on() -{ - if (m_enable_register) { - hal::bit_modify(*m_enable_register).set(bit_mask::from(m_bit_position)); - } -} - -bool power::is_on() -{ - if (m_enable_register) { - return hal::bit_extract(bit_mask::from(m_bit_position), *m_enable_register); - } - return true; -} - -void power::off() -{ - if (m_enable_register) { - hal::bit_modify(*m_enable_register).clear(bit_mask::from(m_bit_position)); - } -} -} // namespace hal::stm32f411 diff --git a/src/stm32f411/power.hpp b/src/stm32f411/power.hpp deleted file mode 100644 index fb22122..0000000 --- a/src/stm32f411/power.hpp +++ /dev/null @@ -1,61 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include - -namespace hal::stm32f411 { - -/** - * @brief Power control for stm32f1xx peripherals - * - */ -class power -{ -public: - /** - * @brief Construct a new power control object - * - * @param p_peripheral - id of the peripheral to configure - */ - power(peripheral p_peripheral); - - /** - * @brief Power on the peripheral - * - */ - void on(); - - /** - * @brief Check if the peripheral is powered on - * - * @return true - peripheral is on - * @return false - peripheral is off - */ - [[nodiscard]] bool is_on(); - - /** - * @brief Power off peripheral - * - */ - void off(); - -private: - std::uint32_t volatile* m_enable_register = nullptr; - std::uint8_t m_bit_position = 0; -}; -} // namespace hal::stm32f411 diff --git a/src/stm32f411/rcc_reg.hpp b/src/stm32f411/rcc_reg.hpp deleted file mode 100644 index abf0b99..0000000 --- a/src/stm32f411/rcc_reg.hpp +++ /dev/null @@ -1,274 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include - -#include - -namespace hal::stm32f411 { -struct reset_and_clock_control_t -{ - /// Offset: 0x00 Clock Control Register - std::uint32_t volatile cr; - /// Offset: 0x04 PLL config register - std::uint32_t volatile pllconfig; - /// Offset: 0x08 clock config register - std::uint32_t volatile config; - /// Offset: 0x0c clock interrupt register - std::uint32_t volatile cir; - /// Offset: 0x10 ahb1 peripheral reset register - std::uint32_t volatile ahb1rstr; - /// Offset: 0x14 ahb2 peripheral reset register - std::uint32_t volatile ahb2rstr; - - std::array volatile reserved0; - - /// Offset: 0x20 ahb1 peripheral reset register - std::uint32_t volatile apb1rstr; - /// Offset: 0x24 ahb2 peripheral reset register - std::uint32_t volatile apb2rstr; - - std::array volatile reserved1; - - /// Offset: 0x30 ahb1 clock enable register - std::uint32_t volatile ahb1enr; - /// Offset: 0x34 ahb1 clock enable register - std::uint32_t volatile ahb2enr; - - std::array volatile reserved2; - - /// Offset: 0x40 apb1 clock enable register - std::uint32_t volatile apb1enr; - /// Offset: 0x44 apb1 clock enable register - std::uint32_t volatile apb2enr; - - std::array volatile reserved3; - - /// Offset: 0x50 ahb1 peripheral clock enable in low power mode register - std::uint32_t volatile ahb1lpenr; - /// Offset: 0x54 ahb2 peripheral clock enable in low power mode register - std::uint32_t volatile ahb2lpenr; - - std::array volatile reserved4; - - /// Offset: 0x60 apb1 peripheral clock enable in low power mode register - std::uint32_t volatile apb1lpenr; - /// Offset: 0x64 apb2 peripheral clock enable in low power mode register - std::uint32_t volatile apb2lpenr; - - std::array volatile reserved5; - - /// Offset: 0x70 backup domain control register - std::uint32_t volatile backup_domain_control; - /// Offset: 0x74 control and status register - std::uint32_t volatile csr; - - std::array volatile reserved6; - - /// Offset: 0x80 spread spectrum clock generation register - std::uint32_t volatile sscgr; - /// Offset: 0x84 plli2s config register - std::uint32_t volatile plli2scfgr; - - std::uint32_t volatile reserved7; - - /// Offset 0x8c dedicated clocks configuration register - std::uint32_t volatile dckcfgr; -}; - -struct rcc_cr -{ - /// Internal high-speed clock enable. 0: OFF, 1: ON - static constexpr auto high_speed_internal_enable = bit_mask::from<0>(); - - /// Internal high-speed clock ready flag. 0: not ready, 1: ready - static constexpr auto high_speed_internal_ready = bit_mask::from<1>(); - - /// These bits provide an additional user-programmable trimming value that is - /// added to the HSICAL[7:0] bits. - static constexpr auto high_speed_internal_trim = bit_mask::from<7, 3>(); - - /// Internal high-speed clock calibration - static constexpr auto high_speed_internal_calibration = - bit_mask::from<15, 8>(); - - /// External high-speed clock enable. 0: OFF, 1: ON - static constexpr auto high_speed_external_enable = bit_mask::from<16>(); - - /// External high-speed clock ready flag. 0: not ready, 1: ready - static constexpr auto high_speed_external_ready = bit_mask::from<17>(); - - /// External high-speed clock bypass. 0: HSE oscillator not bypassed, 1: HSE - /// oscillator bypassed with an external clock - static constexpr auto high_speed_external_bypass = bit_mask::from<18>(); - - /// Clock security system enable - /// 0: Clock security system OFF (Clock detector OFF) - /// 1: Clock security system ON (Clock detector ON if HSE oscillator is - /// stable, OFF if not) - static constexpr auto clock_security_system_enable = bit_mask::from<19>(); - - /// 0: PLL OFF - /// 1: PLL ON - static constexpr auto main_pll_enable = bit_mask::from<24>(); - - /// 0: PLL unlocked - /// 1: PLL locked - static constexpr auto main_pll_ready = bit_mask::from<25>(); - - /// 0: PLLI2S OFF - /// 1: PLLI2S ON - static constexpr auto pll_i2s_enable = bit_mask::from<26>(); - - /// 0: PLLI2S unlocked - /// 1: PLLI2S locked - static constexpr auto pll_i2s_ready = bit_mask::from<27>(); -}; - -struct rcc_pllcnfg -{ - /// PLL Input Source divider. Must be 1 <= X <= 63 - /// VCO input = input / division_factor. VCO inp must be 1_MHz <= VCO <= 2_MHz - static constexpr auto input_division_factor = bit_mask::from<5, 0>(); - - /// Main PLL output multiplication factor. Must be 50 <= X <= 432 - /// VCO output = output * multiplication_factor. VCO out must be 100_MHz <= - /// VCO <= 432_MHz - static constexpr auto main_multiplication_factor = bit_mask::from<14, 6>(); - - /// Main PLL output division factor. division factor = 2 + 2X - /// Must not exceed 100_MHz - static constexpr auto main_division_factor = bit_mask::from<17, 16>(); - - /// PLL Input Source - static constexpr auto pll_source = bit_mask::from<22>(); - - /// PLL division factor for USB OTG FS, and SDIO clocks - /// USB OTG FS requires a 48 MHz clock to work - /// SDIO need a frequency lower than or equal to 48 MHz to work correctly - static constexpr auto usb_sdio_dividor = bit_mask::from<16>(); -}; - -struct rcc_config -{ - /// System clock switch - /// 00: HSI oscillator selected as system clock - /// 01: HSE oscillator selected as system clock - /// 10: PLL selected as system clock - /// 11: not allowed - static constexpr auto system_clock_switch = bit_mask::from<1, 0>(); - - /// System clock switch status - /// 00: HSI oscillator used as the system clock - /// 01: HSE oscillator used as the system clock - /// 10: PLL used as the system clock - /// 11: not applicable - static constexpr auto system_clock_switch_status = bit_mask::from<3, 2>(); - - /// AHB prescaler - /// if less than 7, not divided - /// else: (system clock frequency)/2**(n-7) - static constexpr auto ahb_prescalar = bit_mask::from<7, 4>(); - - /// APB1 prescaler (apb clock never exceeds 50MHz) - static constexpr auto apb1_prescalar = bit_mask::from<12, 10>(); - - /// APB1 prescaler (apb clock never exceeds 100MHz) - static constexpr auto apb2_prescalar = bit_mask::from<15, 13>(); - - /// HSE division factor for RTC clock - /// (1MHz must be inputed in) - /// RTC = HSE/n - static constexpr auto hse_division_for_rtc_clock = bit_mask::from<20, 16>(); - - /// Microcontroller clock output 1 (MCO1) - /// 00: HSI clock selected - /// 01: LSE oscillator selected - /// 10: HSE oscillator clock selected - /// 11: PLL clock selected - static constexpr auto mco1_clock_select = bit_mask::from<22, 21>(); - - /// I2S clock selection - /// 0: PLLI2S clock used as I2S clock source - /// 1: External clock mapped on the I2S_CKIN pin used as I2S clock source - static constexpr auto i2s_clock_selection = bit_mask::from<23>(); - - /// MCO1 prescaler - /// if: n < 4, no division - /// else: division by (n & 3) + 2 - static constexpr auto mco1_prescaler = bit_mask::from<26, 24>(); - - /// MCO2 prescaler - /// if: n < 4, no division - /// else: division by (n & 3) + 2 - static constexpr auto mco2_prescaler = bit_mask::from<29, 27>(); - - /// Microcontroller clock output 1 (MCO2) - /// 00: System clock (SYSCLK) selected - /// 01: PLLI2S clock selected - /// 10: HSE oscillator clock selected - /// 11: PLL clock selected - static constexpr auto mco2_clock_select = bit_mask::from<31, 30>(); -}; - -struct rcc_backup_domain_control -{ - /// 0: LSE clock OFF - /// 1: LSE clock ON - static constexpr auto low_speed_external_enable = bit_mask::from<0>(); - - /// 0: LSE clock not ready - /// 1: LSE clock ready - static constexpr auto low_speed_external_ready = bit_mask::from<1>(); - - /// 0: LSE oscillator not bypassed - /// 1: LSE oscillator bypassed - static constexpr auto low_speed_external_bypass = bit_mask::from<2>(); - - /// 0: LSE oscillator โ€œlow powerโ€ mode selection - /// 1: LSE oscillator โ€œhigh driveโ€ mode selection - static constexpr auto low_speed_external_mode = bit_mask::from<3>(); - - /// 00: No clock - /// 01: LSE oscillator clock used as the RTC clock - /// 10: LSI oscillator clock used as the RTC clock - /// 11: HSE oscillator clock divided by hse_division_for_rtc_clock - static constexpr auto rtc_clock_source = bit_mask::from<9, 8>(); - - /// 0: RTC clock disabled - /// 1: RTC clock enabled - static constexpr auto rtc_enable = bit_mask::from<15>(); - - /// 0: Reset not activated - /// 1: Resets the entire Backup domain - static constexpr auto backup_domain_software_reset = bit_mask::from<16>(); -}; - -struct rcc_ahb2 -{ - static constexpr auto usb_otg_en = bit_mask::from<7>(); -}; - -// NOLINTBEGIN(performance-no-int-to-ptr) -/** - * @return reset_and_clock_control_t& - return reset_and_clock_control_t - * register. - */ -inline auto* rcc = - reinterpret_cast(0x40000000 + 0x20000 + 0x3800); -// NOLINTEND(performance-no-int-to-ptr) -} // namespace hal::stm32f411 diff --git a/src/stm32f411/spi.cpp b/src/stm32f411/spi.cpp deleted file mode 100644 index 1e47630..0000000 --- a/src/stm32f411/spi.cpp +++ /dev/null @@ -1,190 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. -#include - -#include -#include -#include -#include - -#include "power.hpp" - -namespace hal::stm32f411 { -namespace { -void* peripheral_to_address(peripheral p_id) -{ - constexpr std::uintptr_t apb1_base = 0x4000'0000UL; - constexpr std::uintptr_t apb2_base = 0x4001'0000UL; - constexpr std::uintptr_t spi_reg1 = apb2_base + 0x3000; - constexpr std::uintptr_t spi_reg2 = apb1_base + 0x3800; - constexpr std::uintptr_t spi_reg3 = apb1_base + 0x3C00; - constexpr std::uintptr_t spi_reg4 = apb2_base + 0x3400; - constexpr std::uintptr_t spi_reg5 = apb2_base + 0x5000; - - switch (p_id) { - case peripheral::spi1: - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(spi_reg1); - case peripheral::spi2: - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(spi_reg2); - case peripheral::spi3: - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(spi_reg3); - case peripheral::spi4: - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(spi_reg4); - case peripheral::spi5: - // NOLINTNEXTLINE(performance-no-int-to-ptr) - return reinterpret_cast(spi_reg5); - default: - hal::safe_throw(hal::operation_not_supported(nullptr)); - } -} - -inline peripheral bus_number_to_peripheral(std::uint8_t p_bus_number) -{ - switch (p_bus_number) { - case 1: - return peripheral::spi1; - case 2: - return peripheral::spi2; - case 3: - return peripheral::spi3; - case 4: - return peripheral::spi4; - case 5: - return peripheral::spi5; - default: - hal::safe_throw(hal::operation_not_supported(nullptr)); - } -} -} // namespace - -spi::spi(hal::runtime, - std::uint8_t p_bus_number, - spi::settings const& p_settings) - : m_peripheral_id(bus_number_to_peripheral(p_bus_number)) - , m_spi_driver(hal::unsafe{}, peripheral_to_address(m_peripheral_id)) -{ - // Datasheet: Chapter 4: Pin definition Table 9 - switch (m_peripheral_id) { - case peripheral::spi1: { - pin clock(peripheral::gpio_a, 5); - pin data_in(peripheral::gpio_a, 7); - pin data_out(peripheral::gpio_a, 6); - - clock.function(pin::pin_function::alternate5) - .open_drain(false) - .resistor(pin_resistor::none); - data_in.function(pin::pin_function::alternate5) - .open_drain(false) - .resistor(pin_resistor::none); - data_out.function(pin::pin_function::alternate5) - .open_drain(false) - .resistor(pin_resistor::none); - break; - } - case peripheral::spi2: { - pin clock(peripheral::gpio_b, 10); - pin data_in(peripheral::gpio_b, 14); - pin data_out(peripheral::gpio_b, 15); - - clock.function(pin::pin_function::alternate5) - .open_drain(false) - .resistor(pin_resistor::none); - data_in.function(pin::pin_function::alternate5) - .open_drain(false) - .resistor(pin_resistor::none); - data_out.function(pin::pin_function::alternate5) - .open_drain(false) - .resistor(pin_resistor::none); - break; - } - case peripheral::spi3: { - pin clock(peripheral::gpio_b, 3); - pin data_in(peripheral::gpio_b, 5); - pin data_out(peripheral::gpio_b, 4); - - clock.function(pin::pin_function::alternate7) - .open_drain(false) - .resistor(pin_resistor::none); - data_in.function(pin::pin_function::alternate7) - .open_drain(false) - .resistor(pin_resistor::none); - data_out.function(pin::pin_function::alternate7) - .open_drain(false) - .resistor(pin_resistor::none); - break; - } - case peripheral::spi4: { - pin clock(peripheral::gpio_b, 0); - pin data_in(peripheral::gpio_b, 8); - pin data_out(peripheral::gpio_a, 12); - - clock.function(pin::pin_function::alternate6) - .open_drain(false) - .resistor(pin_resistor::none); - data_in.function(pin::pin_function::alternate6) - .open_drain(false) - .resistor(pin_resistor::none); - data_out.function(pin::pin_function::alternate6) - .open_drain(false) - .resistor(pin_resistor::none); - break; - } - case peripheral::spi5: { - pin clock(peripheral::gpio_b, 3); - pin data_in(peripheral::gpio_b, 5); - pin data_out(peripheral::gpio_b, 4); - - clock.function(pin::pin::pin_function::alternate6) - .open_drain(false) - .resistor(pin_resistor::none); - data_in.function(pin::pin::pin_function::alternate6) - .open_drain(false) - .resistor(pin_resistor::none); - data_out.function(pin::pin_function::alternate6) - .open_drain(false) - .resistor(pin_resistor::none); - break; - } - default: - // "Supported spi busses are 1-5!"; - hal::safe_throw(hal::operation_not_supported(this)); - } - - power(m_peripheral_id).on(); - spi::driver_configure(p_settings); -} - -spi::~spi() -{ - power(m_peripheral_id).off(); -} - -void spi::driver_configure(settings const& p_settings) -{ - using namespace hal::literals; - // TODO(#16): replace input clock with a get_frequency instruction - m_spi_driver.configure(p_settings, 16.0_MHz); -} - -void spi::driver_transfer(std::span p_data_out, - std::span p_data_in, - hal::byte p_filler) -{ - m_spi_driver.transfer(p_data_out, p_data_in, p_filler); -} -} // namespace hal::stm32f411 diff --git a/src/stm32f411/uart.cpp b/src/stm32f411/uart.cpp deleted file mode 100644 index 65b0751..0000000 --- a/src/stm32f411/uart.cpp +++ /dev/null @@ -1,161 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include -#include -#include -#include -#include -#include - -#include "dma.hpp" -#include "power.hpp" - -namespace hal::stm32f411 { -namespace { -inline auto usart1 = reinterpret_cast(0x4001'1000); -inline auto usart2 = reinterpret_cast(0x4000'4400); -inline auto usart6 = reinterpret_cast(0x4001'1400); -} // namespace -uart::uart(hal::runtime, - std::uint8_t p_port, - std::span p_buffer, - serial::settings const& p_settings) - : uart(p_port, p_buffer, p_settings) -{ -} - -uart::uart(std::uint8_t p_port, - std::span p_buffer, - serial::settings const& p_settings) - : m_stm32_uart(usart1, p_buffer) - , m_dma(peripheral::dma2) - , m_id{} -{ - if (p_buffer.size() > max_dma_length) { - hal::safe_throw(hal::operation_not_supported(this)); - } - std::array possible_streams; - switch (p_port) { - case 1: - m_id = peripheral::usart1; - m_dma = peripheral::dma2; - m_stm32_uart = stm32_generic::uart(usart1, p_buffer); - { - pin tx(peripheral::gpio_a, 9); - pin rx(peripheral::gpio_a, 10); - tx.function(pin::pin_function::alternate7) - .open_drain(false) - .resistor(pin_resistor::none); - rx.function(pin::pin_function::alternate7) - .open_drain(false) - .resistor(pin_resistor::none); - } - possible_streams = { dma_channel_stream_t{ .stream = 2, .channel = 4 }, - dma_channel_stream_t{ .stream = 5, .channel = 4 } }; - break; - case 2: - m_dma = peripheral::dma1; - m_id = peripheral::usart2; - m_stm32_uart = stm32_generic::uart(usart2, p_buffer); - { - pin tx(peripheral::gpio_a, 2); - pin rx(peripheral::gpio_a, 3); - tx.function(pin::pin_function::alternate7) - .open_drain(false) - .resistor(pin_resistor::none); - rx.function(pin::pin_function::alternate7) - .open_drain(false) - .resistor(pin_resistor::none); - } - possible_streams = { dma_channel_stream_t{ .stream = 5, .channel = 4 }, - dma_channel_stream_t{ .stream = 7, .channel = 6 } }; - break; - case 6: - m_dma = peripheral::dma2; - m_id = peripheral::usart6; - m_stm32_uart = stm32_generic::uart(usart6, p_buffer); - { - pin tx(peripheral::gpio_a, 11); - pin rx(peripheral::gpio_a, 12); - tx.function(pin::pin_function::alternate8) - .open_drain(false) - .resistor(pin_resistor::none); - rx.function(pin::pin_function::alternate8) - .open_drain(false) - .resistor(pin_resistor::none); - } - possible_streams = { dma_channel_stream_t{ .stream = 2, .channel = 5 }, - dma_channel_stream_t{ .stream = 1, .channel = 5 } }; - break; - default: - hal::safe_throw(hal::operation_not_supported(this)); - } - // Power on the usart/uart id - power(m_id).on(); - - /// configure dma here - dma_settings_t dma_setting = { - .source = m_stm32_uart.data_register(), - .destination = p_buffer.data(), - - .transfer_length = p_buffer.size(), - .flow_controller = dma_flow_controller::dma_controls_flow, - .transfer_type = dma_transfer_type::peripheral_to_memory, - .circular_mode = true, - .peripheral_address_increment = false, - .memory_address_increment = true, - .peripheral_data_size = dma_transfer_size::byte, - .memory_data_size = dma_transfer_size::byte, - .priority_level = dma_priority_level::high, - .double_buffer_mode = false, - .current_target = false, - .peripheral_burst_size = dma_burst_size::single_transfer, - .memory_burst_size = dma_burst_size::single_transfer - }; - - m_dma_stream = - setup_dma_transfer(m_dma, possible_streams, dma_setting, []() {}).stream; - driver_configure(p_settings); -} - -std::uint32_t uart::dma_cursor_position() -{ - std::uint32_t receive_amount = - get_dma_reg(m_dma)->stream[m_dma_stream].transfer_count; - std::uint32_t write_position = m_stm32_uart.buffer_size() - receive_amount; - return write_position % m_stm32_uart.buffer_size(); -} - -void uart::driver_configure(serial::settings const& p_settings) -{ - m_stm32_uart.configure(p_settings, frequency(m_id)); -} - -serial::read_t uart::driver_read(std::span p_data) -{ - return m_stm32_uart.uart_read(p_data, dma_cursor_position()); -} -serial::write_t uart::driver_write(std::span p_data) -{ - return m_stm32_uart.uart_write(p_data); -} - -void uart::driver_flush() -{ - m_stm32_uart.flush(dma_cursor_position()); -} -} // namespace hal::stm32f411 diff --git a/src/system_controller.cpp b/src/system_controller.cpp deleted file mode 100644 index 3edeb16..0000000 --- a/src/system_controller.cpp +++ /dev/null @@ -1,116 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include "system_controller_reg.hpp" - -#include - -namespace hal::cortex_m { -void initialize_floating_point_unit() -{ - scb->cpacr = scb->cpacr | ((0b11 << 10 * 2) | /* set CP10 Full Access */ - (0b11 << 11 * 2)); /* set CP11 Full Access */ -} - -void set_interrupt_vector_table_address(void* p_table_location) -{ - // Relocate the interrupt vector table the vector buffer. By default this - // will be set to the address of the start of flash memory for the MCU. - scb->vtor = reinterpret_cast(p_table_location); -} - -void* get_interrupt_vector_table_address() -{ - // Relocate the interrupt vector table the vector buffer. By default this - // will be set to the address of the start of flash memory for the MCU. - return reinterpret_cast(scb->vtor); // NOLINT -} - -void reset() -{ - // Value "0x5FA" must be written to the VECTKEY field [31:16] to confirm - // that this action is valid, otherwise the processor ignores the write - // command. - // Bit 2 is the SYSRESETREQ bit. - scb->aircr = (0x5FA << 16) | (1 << 2); - // System reset is asynchronous, so the code needs to wait. - hal::halt(); -} - -void wait_for_interrupt() -{ -#if defined(__arm__) - asm volatile("wfi"); -#endif -} - -void wait_for_event() -{ -#if defined(__arm__) - asm volatile("wfe"); -#endif -} - -bool debugger_connected() -{ -#if defined(__thumb2__) - // CoreDebug->DHCSR register (Cortex-M3/M4/M7/etc.) - uint32_t volatile* dhcsr = reinterpret_cast(0xE000EDF0); - // Bit 0 (C_DEBUGEN) indicates debugger is connected - return (*dhcsr & 0x00000001) != 0; -#else - return false; -#endif -} -} // namespace hal::cortex_m - -extern "C" -{ - // The implementation of LLVM calls a calls the breakpoint instruction - // unconditionally, preventing the program from proceeding past this point - // without a debugger connected with semihosting enabled. In order to get - // around this, we replace sys_semihost and check if a debugger is connected. - // If it is connected we call the breakpoint instruction with the appropriate - // input value 0xAB. Otherwise, return an error code. - int sys_semihost([[maybe_unused]] int p_reason, [[maybe_unused]] void* p_arg) - { - if (hal::cortex_m::debugger_connected()) { -#if defined(__thumb2__) - // Let the real semihost call happen (BKPT will work) - // Need to inline the BKPT instruction here - register int r0 asm("r0") = p_reason; - register void* r1 asm("r1") = p_arg; - asm volatile("bkpt 0xAB" : "=r"(r0) : "r"(r0), "r"(r1) : "memory"); - return r0; -#endif - } - return -1; // No debugger, return error - } - - char* sys_semihost_get_cmdline() - { - if (hal::cortex_m::debugger_connected()) { - // SYS_GET_CMDLINE is semihost operation 0x15 - static char cmdline[256]; - int result = sys_semihost(0x15, cmdline); - if (result == 0) { - return cmdline; - } - } - static char empty[] = ""; - return empty; - } -} diff --git a/src/system_controller_reg.hpp b/src/system_controller_reg.hpp deleted file mode 100644 index a819947..0000000 --- a/src/system_controller_reg.hpp +++ /dev/null @@ -1,76 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include -#include - -namespace hal::cortex_m { -/// Structure type to access the System Control Block (SCB). -struct scb_registers_t -{ - /// Offset: 0x000 (R/ ) CPUID Base Register - uint32_t const volatile cpuid; - /// Offset: 0x004 (R/W) Interrupt Control and State Register - uint32_t volatile icsr; - /// Offset: 0x008 (R/W) Vector Table Offset Register - intptr_t volatile vtor; - /// Offset: 0x00C (R/W) Application Interrupt and Reset Control Register - uint32_t volatile aircr; - /// Offset: 0x010 (R/W) System Control Register - uint32_t volatile scr; - /// Offset: 0x014 (R/W) Configuration Control Register - uint32_t volatile ccr; - /// Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 5) - std::array shp; - /// Offset: 0x024 (R/W) System Handler Control and State Register - uint32_t volatile shcsr; - /// Offset: 0x028 (R/W) Configurable Fault Status Register - uint32_t volatile cfsr; - /// Offset: 0x02C (R/W) HardFault Status Register - uint32_t volatile hfsr; - /// Offset: 0x030 (R/W) Debug Fault Status Register - uint32_t volatile dfsr; - /// Offset: 0x034 (R/W) MemManage Fault Address Register - uint32_t volatile mmfar; - /// Offset: 0x038 (R/W) BusFault Address Register - uint32_t volatile bfar; - /// Offset: 0x03C (R/W) Auxiliary Fault Status Register - uint32_t volatile afsr; - /// Offset: 0x040 (R/ ) Processor Feature Register - std::array const pfr; - /// Offset: 0x048 (R/ ) Debug Feature Register - uint32_t const volatile dfr; - /// Offset: 0x04C (R/ ) Auxiliary Feature Register - uint32_t const volatile adr; - /// Offset: 0x050 (R/ ) Memory Model Feature Register - std::array const mmfr; - /// Offset: 0x060 (R/ ) Instruction Set Attributes Register - std::array const isar; - /// Reserved 0 - std::array reserved0; - /// Offset: 0x088 (R/W) Coprocessor Access Control Register - uint32_t volatile cpacr; -}; - -/// System control block address -inline constexpr auto scb_address = static_cast(0xE000'ED00UL); - -/// @return auto* - Address of the Cortex M system control block register -inline auto* scb = - // NOLINTNEXTLINE(performance-no-int-to-ptr) - reinterpret_cast(scb_address); -} // namespace hal::cortex_m diff --git a/src/systick_timer.cpp b/src/systick_timer.cpp deleted file mode 100644 index 5529e57..0000000 --- a/src/systick_timer.cpp +++ /dev/null @@ -1,128 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include - -#include -#include -#include -#include -#include -#include - -#include "systick_timer_reg.hpp" - -namespace hal::cortex_m { - -void start() -{ - hal::bit_modify(sys_tick->control) - .set(); -} - -void stop() -{ - hal::bit_modify(sys_tick->control) - .clear(); -} - -systick_timer::systick_timer(hertz p_frequency, clock_source p_source) - : m_frequency(p_frequency) -{ - if (not interrupt_vector_table_initialized()) { - hal::safe_throw(hal::operation_not_permitted(this)); - } - register_cpu_frequency(p_frequency, p_source); -} - -void systick_timer::register_cpu_frequency(hertz p_frequency, - clock_source p_source) -{ - stop(); - m_frequency = p_frequency; - - // Since reloads only occur when the current_value falls from 1 to 0, - // setting this register directly to zero from any other number will disable - // reloading of the register and will stop the timer. - sys_tick->current_value = 0; - - auto control = hal::bit_value(0); - control.set(); - - if (p_source == clock_source::processor) { - control.set(); - } else { - control.clear(); - } - - // Disable the counter if it was previously enabled. - control.clear(); - - sys_tick->control = control.get(); -} - -systick_timer::~systick_timer() -{ - stop(); - disable_interrupt(event_number); -} - -bool systick_timer::driver_is_running() -{ - auto running_bit = static_cast( - hal::bit_extract( - sys_tick->control)); - return running_bit; -} - -void systick_timer::driver_cancel() -{ - // All that is needed is to stop the timer. When the timer is started again - // via `schedule()`, the timer value will be reloaded/reset. - stop(); -} - -void systick_timer::driver_schedule(hal::callback p_callback, - hal::time_duration p_delay) -{ - constexpr std::int64_t maximum = 0x00FFFFFF; - - auto cycle_count = cycles_per(m_frequency, p_delay); - if (cycle_count <= 1) { - cycle_count = 1; - } else if (cycle_count > maximum) { - throw std::errc::invalid_argument; - } - - // Stop the previously scheduled event - stop(); - - // Save the p_callback to the static_callable object's statically allocated - // callback function. The lifetime of this object exists for the duration of - // the program, so this will never become a dangling reference. - auto handler = static_callable(p_callback); - - // Enable interrupt service routine for SysTick and use this callback as the - // handler - enable_interrupt(event_number, handler.get_handler()); - - sys_tick->current_value = 0; - sys_tick->reload = static_cast(cycle_count); - - // Starting the timer will restart the count - start(); -} -} // namespace hal::cortex_m diff --git a/src/systick_timer_reg.hpp b/src/systick_timer_reg.hpp deleted file mode 100644 index d00e0a1..0000000 --- a/src/systick_timer_reg.hpp +++ /dev/null @@ -1,69 +0,0 @@ -// Copyright 2024 - 2025 Khalil Estell and the libhal contributors -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -#include -#include - -namespace hal::cortex_m { -/// @brief Structure type to access the System Timer (SysTick). -struct systick_register_t -{ - /// Offset: 0x000 (R/W) SysTick Control and Status Register - uint32_t volatile control; - /// Offset: 0x004 (R/W) SysTick Reload Value Register - uint32_t volatile reload; - /// Offset: 0x008 (R/W) SysTick Current Value Register - /// NOTE: Setting this value to anything will zero it out. Setting this zero - /// will NOT cause the SysTick interrupt to be fired. - uint32_t volatile current_value; - /// Offset: 0x00C (R/ ) SysTick Calibration Register - uint32_t const volatile calib; -}; - -/// Namespace containing the bit_mask objects that are used to manipulate the -/// ARM Cortex Mx SysTick Timer. -namespace systick_control_register { -/// When set to 1, takes the contents of the reload counter, writes it to -/// the current_value register and begins counting down to zero. Setting -/// this to zero stops the counter. Restarting the counter will restart the -/// count. -static constexpr auto enable_counter = hal::bit_mask::from<0>(); - -/// When SysTick timer's count goes from 1 to 0, if this bit is set, the -/// SysTick interrupt will fire. -static constexpr auto enable_interrupt = hal::bit_mask::from<1>(); - -/// If set to 0, clock source is external, if set to 1, clock source follows -/// the processor clock. -static constexpr auto clock_source = hal::bit_mask::from<2>(); - -/// Set to 1 when count falls from 1 to 0. This bit is cleared on the next -/// read of this register. -static constexpr auto count_flag = hal::bit_mask::from<16>(); -}; // namespace systick_control_register - -/// The address of the sys_tick register -inline constexpr auto systick_address = static_cast(0xE000'E010UL); -/// The IRQ number for the SysTick interrupt vector -inline constexpr u16 event_number = 15; - -/// @return auto* - Address of the ARM Cortex SysTick peripheral -inline auto* sys_tick = - // NOLINTNEXTLINE(performance-no-int-to-ptr) - reinterpret_cast(systick_address); -} // namespace hal::cortex_m diff --git a/src/rp/time.cpp b/src/time.cpp similarity index 96% rename from src/rp/time.cpp rename to src/time.cpp index cc2a330..d3e8570 100644 --- a/src/rp/time.cpp +++ b/src/time.cpp @@ -18,7 +18,7 @@ #include #include -#include "libhal-arm-mcu/rp/time.hpp" +#include "libhal-picosdk/time.hpp" namespace hal::rp::inline v4 { diff --git a/test_package/CMakeLists.txt b/test_package/CMakeLists.txt index 407d27c..1348a2e 100644 --- a/test_package/CMakeLists.txt +++ b/test_package/CMakeLists.txt @@ -15,7 +15,7 @@ cmake_minimum_required(VERSION 3.15) project(test_package LANGUAGES CXX) -find_package(libhal-arm-mcu CONFIG REQUIRED) +find_package(libhal-picosdk CONFIG REQUIRED) add_executable(test_package main.cpp) -target_link_libraries(test_package PRIVATE libhal::arm-mcu) +target_link_libraries(test_package PRIVATE libhal::picosdk) diff --git a/test_package/conanfile.py b/test_package/conanfile.py index a7f8f16..6f499ea 100644 --- a/test_package/conanfile.py +++ b/test_package/conanfile.py @@ -23,6 +23,4 @@ class TestPackageConan(ConanFile): python_requires_extend = "libhal-bootstrap.library_test_package" def requirements(self): - self.requires(self.tested_reference_str, options={ - 'use_default_linker_script': False - }) + self.requires(self.tested_reference_str) diff --git a/test_package/main.cpp b/test_package/main.cpp index 7f97177..af71f41 100644 --- a/test_package/main.cpp +++ b/test_package/main.cpp @@ -14,7 +14,7 @@ #include -#include +#include bool volatile run = false;