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Merge branch 'espressif:release/v5.4' into release/v5.4
2 parents 86685d1 + 8574a0a commit 029aa09

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.gitmodules

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -49,15 +49,12 @@
4949
[submodule "components/json/cJSON"]
5050
path = components/json/cJSON
5151
url = ../../DaveGamble/cJSON.git
52-
sbom-version = 1.7.18
52+
sbom-version = 1.7.19
5353
sbom-cpe = cpe:2.3:a:cjson_project:cjson:{}:*:*:*:*:*:*:*
5454
sbom-supplier = Person: Dave Gamble
5555
sbom-url = https://github.com/DaveGamble/cJSON
5656
sbom-description = Ultralightweight JSON parser in ANSI C
57-
sbom-hash = 8f2beb57ddad1f94bed899790b00f46df893ccac
58-
sbom-cve-exclude-list = CVE-2024-31755 Resolved in v1.7.18
59-
sbom-cve-exclude-list = CVE-2023-26819 Resolved in commit a328d65ad490b64da8c87523cbbfe16050ba5bf6
60-
sbom-cve-exclude-list = CVE-2023-53154 Resolved in v1.7.18
57+
sbom-hash = c859b25da02955fef659d658b8f324b5cde87be3
6158

6259
[submodule "components/mbedtls/mbedtls"]
6360
path = components/mbedtls/mbedtls

components/bootloader/Kconfig.projbuild

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1107,7 +1107,7 @@ menu "Security features"
11071107
endmenu # Potentially Insecure
11081108

11091109
config SECURE_FLASH_ENCRYPT_ONLY_IMAGE_LEN_IN_APP_PART
1110-
bool "Encrypt only the app image that is present in the partition of type app"
1110+
bool "Encrypt contents upto app image length in app partition"
11111111
depends on SECURE_FLASH_ENC_ENABLED && !SECURE_FLASH_REQUIRE_ALREADY_ENABLED
11121112
default y
11131113
help

components/bootloader_support/include/esp_secure_boot.h

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -236,6 +236,23 @@ typedef struct {
236236
uint8_t signature[64];
237237
} esp_secure_boot_sig_block_t;
238238

239+
/** @brief Get the size of the secure boot signature block
240+
*
241+
* This is the size of the signature block appended to a signed image.
242+
*
243+
* @return Size of the secure boot signature block in bytes
244+
*/
245+
static inline uint32_t esp_secure_boot_sig_block_size(void)
246+
{
247+
#if CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
248+
return sizeof(ets_secure_boot_signature_t);
249+
#elif defined(CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME)
250+
return sizeof(esp_secure_boot_sig_block_t);
251+
#else
252+
return 0;
253+
#endif
254+
}
255+
239256
/** @brief Verify the ECDSA secure boot signature block for Secure Boot V1.
240257
*
241258
* Calculates Deterministic ECDSA w/ SHA256 based on the SHA256 hash of the image. ECDSA signature

components/bootloader_support/src/bootloader_random_esp32p4.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@
1212
#include "soc/lp_adc_reg.h"
1313
#include "esp_private/regi2c_ctrl.h"
1414
#include "esp_rom_regi2c.h"
15+
#include "soc/lpperi_reg.h"
1516

1617
// TODO IDF-6497: once ADC API is supported, use the API instead of defining functions and constants here
1718

@@ -50,6 +51,7 @@ void bootloader_random_enable(void)
5051
pattern_table sar1_table[4] = {};
5152
uint32_t pattern_len = 0;
5253

54+
SET_PERI_REG_MASK(LPPERI_CLK_EN_REG, LPPERI_CK_EN_LP_ADC);
5355
SET_PERI_REG_MASK(HP_SYS_CLKRST_SOC_CLK_CTRL2_REG, HP_SYS_CLKRST_REG_ADC_APB_CLK_EN);
5456
SET_PERI_REG_MASK(HP_SYS_CLKRST_PERI_CLK_CTRL23_REG, HP_SYS_CLKRST_REG_ADC_CLK_EN);
5557

components/bootloader_support/src/flash_encryption/flash_encrypt.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -413,6 +413,10 @@ static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partit
413413
if (should_encrypt) {
414414
// Encrypt only the app image instead of encrypting the whole partition
415415
size = image_data.image_len;
416+
#if CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
417+
// If secure update without secure boot, also encrypt the signature block
418+
size += esp_secure_boot_sig_block_size();
419+
#endif
416420
}
417421
#endif
418422
} else if ((partition->type == PART_TYPE_DATA && partition->subtype == PART_SUBTYPE_DATA_OTA)

components/bt/common/ble_log/Kconfig.in

Lines changed: 25 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -33,12 +33,32 @@ if BLE_LOG_ENABLED
3333
try to use the LBM with spin lock protection. So the more LBMs with atomic
3434
lock protection are created, the more ISRs can nest.
3535

36-
config BLE_LOG_LL_ENABLED
37-
bool "Enable BLE Log for Link Layer"
36+
config BLE_LOG_IS_ESP_CONTROLLER
37+
bool "Current BLE Controller is ESP BLE Controller"
3838
depends on BT_CONTROLLER_ENABLED
39+
depends on SOC_ESP_NIMBLE_CONTROLLER
3940
default y
4041
select BT_LE_CONTROLLER_LOG_ENABLED
41-
select BT_LE_CONTROLLER_LOG_MODE_BLE_LOG
42+
select BT_LE_CONTROLLER_LOG_MODE_BLE_LOG_V2
43+
select BLE_LOG_LL_ENABLED
44+
help
45+
Current BLE Controller is ESP BLE Controller
46+
47+
config BLE_LOG_IS_ESP_LEGACY_CONTROLLER
48+
bool "Current BLE Controller is ESP BLE Legacy Controller"
49+
depends on BT_CONTROLLER_ENABLED
50+
depends on !SOC_ESP_NIMBLE_CONTROLLER
51+
depends on BT_CTRL_RUN_IN_FLASH_ONLY
52+
default y
53+
select BT_CTRL_LE_LOG_EN
54+
select BLE_LOG_LL_ENABLED
55+
help
56+
Current BLE Controller is ESP BLE Legacy Controller
57+
58+
config BLE_LOG_LL_ENABLED
59+
bool "Enable BLE Log for Link Layer"
60+
depends on BT_CONTROLLER_ENABLED
61+
default n
4262
help
4363
Enable BLE Log for Link Layer
4464

@@ -96,11 +116,13 @@ if BLE_LOG_ENABLED
96116

97117
config BLE_LOG_PRPH_SPI_MASTER_DMA
98118
bool "Utilize SPI master DMA driver as transport"
119+
depends on SOC_GPSPI_SUPPORTED
99120
help
100121
Utilize SPI master DMA driver as transport
101122

102123
config BLE_LOG_PRPH_UART_DMA
103124
bool "Utilize UART DMA driver as transport"
125+
depends on SOC_UHCI_SUPPORTED
104126
help
105127
Utilize UART DMA driver as transport
106128
endchoice

components/bt/common/ble_log/src/internal_include/ble_log_lbm.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,6 @@
1717

1818
#include "freertos/FreeRTOS.h"
1919
#include "freertos/semphr.h"
20-
#include "freertos/portmacro.h"
2120

2221
/* ------------------------- */
2322
/* Log Frame Defines */

components/bt/common/ble_log/src/internal_include/ble_log_util.h

Lines changed: 2 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -17,11 +17,11 @@
1717
#include <string.h>
1818

1919
#include "esp_bit_defs.h"
20+
#include "freertos/FreeRTOS.h"
2021

2122
#ifndef UNIT_TEST
22-
#include "freertos/portmacro.h"
2323
#include "esp_heap_caps.h"
24-
#include "esp_rom_serial_output.h"
24+
#include "esp_rom_uart.h"
2525
#endif /* !UNIT_TEST */
2626

2727
/* MACRO */
@@ -47,18 +47,9 @@
4747
#define BLE_LOG_MEMSET(ptr, value, len) memset(ptr, value, len)
4848

4949
/* Critical section wrapper */
50-
#ifndef CONFIG_BLE_LOG_LL_ENABLED
5150
extern portMUX_TYPE ble_log_spin_lock;
5251
#define BLE_LOG_ENTER_CRITICAL() portENTER_CRITICAL_SAFE(&ble_log_spin_lock);
5352
#define BLE_LOG_EXIT_CRITICAL() portEXIT_CRITICAL_SAFE(&ble_log_spin_lock);
54-
#else /* CONFIG_BLE_LOG_LL_ENABLED */
55-
/* Note
56-
* It's mandatory to use the same spin lock with Link Layer in multi-core system */
57-
extern uint32_t npl_freertos_hw_enter_critical(void);
58-
extern void npl_freertos_hw_exit_critical(uint32_t ctx);
59-
#define BLE_LOG_ENTER_CRITICAL() npl_freertos_hw_enter_critical()
60-
#define BLE_LOG_EXIT_CRITICAL() npl_freertos_hw_exit_critical(0)
61-
#endif /* !CONFIG_BLE_LOG_LL_ENABLED */
6253

6354
#define BLE_LOG_ACQUIRE_SPIN_LOCK(spin_lock) portENTER_CRITICAL_SAFE(spin_lock)
6455
#define BLE_LOG_RELEASE_SPIN_LOCK(spin_lock) portEXIT_CRITICAL_SAFE(spin_lock)

components/bt/common/ble_log/src/prph/ble_log_prph_uart_dma.c

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@
2323

2424
/* MACRO */
2525
#define BLE_LOG_UART_MAX_TRANSFER_SIZE (10240)
26-
#define BLE_LOG_UART_RX_BUF_SIZE (32)
26+
#define BLE_LOG_UART_RX_BUF_SIZE (256)
2727
#define BLE_LOG_UART_DMA_BURST_SIZE (32)
2828
#if BLE_LOG_PRPH_UART_DMA_REDIR
2929
#define BLE_LOG_UART_REDIR_BUF_SIZE (512)
@@ -95,8 +95,6 @@ bool ble_log_prph_init(size_t trans_cnt)
9595
.data_bits = UART_DATA_8_BITS,
9696
.parity = UART_PARITY_DISABLE,
9797
.stop_bits = UART_STOP_BITS_1,
98-
.flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
99-
.rx_flow_ctrl_thresh = 122,
10098
};
10199
if ((uart_param_config(CONFIG_BLE_LOG_PRPH_UART_DMA_PORT, &uart_config) != ESP_OK) ||
102100
(uart_set_pin(CONFIG_BLE_LOG_PRPH_UART_DMA_PORT,

components/bt/controller/esp32/bt.c

Lines changed: 34 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -48,9 +48,13 @@
4848
#include "esp_rom_sys.h"
4949
#include "hli_api.h"
5050

51+
#if CONFIG_BLE_LOG_ENABLED
52+
#include "ble_log.h"
53+
#else /* !CONFIG_BLE_LOG_ENABLED */
5154
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
5255
#include "ble_log/ble_log_spi_out.h"
5356
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
57+
#endif /* CONFIG_BLE_LOG_ENABLED */
5458

5559
#if CONFIG_BT_ENABLED
5660

@@ -878,9 +882,22 @@ static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
878882
#if CONFIG_FREERTOS_UNICORE
879883
cause_sw_intr((void *)intr_no);
880884
#else /* CONFIG_FREERTOS_UNICORE */
885+
#if CONFIG_FREERTOS_SMP
886+
uint32_t state = portDISABLE_INTERRUPTS();
887+
#else
888+
uint32_t state = portSET_INTERRUPT_MASK_FROM_ISR();
889+
#endif
881890
if (xPortGetCoreID() == core_id) {
882891
cause_sw_intr((void *)intr_no);
892+
#if CONFIG_FREERTOS_SMP
893+
portRESTORE_INTERRUPTS(state);
894+
} else {
895+
portRESTORE_INTERRUPTS(state);
896+
#else
897+
portCLEAR_INTERRUPT_MASK_FROM_ISR(state);
883898
} else {
899+
portCLEAR_INTERRUPT_MASK_FROM_ISR(state);
900+
#endif
884901
err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
885902
}
886903
#endif /* !CONFIG_FREERTOS_UNICORE */
@@ -1501,11 +1518,7 @@ static void hli_queue_setup_pinned_to_core(int core_id)
15011518
#if CONFIG_FREERTOS_UNICORE
15021519
hli_queue_setup_cb(NULL);
15031520
#else /* CONFIG_FREERTOS_UNICORE */
1504-
if (xPortGetCoreID() == core_id) {
1505-
hli_queue_setup_cb(NULL);
1506-
} else {
1507-
esp_ipc_call(core_id, hli_queue_setup_cb, NULL);
1508-
}
1521+
esp_ipc_call_blocking(core_id, hli_queue_setup_cb, NULL);
15091522
#endif /* !CONFIG_FREERTOS_UNICORE */
15101523
}
15111524
#endif /* CONFIG_BTDM_CTRL_HLI */
@@ -1702,13 +1715,21 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
17021715
coex_init();
17031716
#endif
17041717

1718+
#if CONFIG_BLE_LOG_ENABLED
1719+
if (!ble_log_init()) {
1720+
ESP_LOGE(BTDM_LOG_TAG, "BLE Log v2 init failed");
1721+
err = ESP_ERR_NO_MEM;
1722+
goto error;
1723+
}
1724+
#else /* !CONFIG_BLE_LOG_ENABLED */
17051725
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
17061726
if (ble_log_spi_out_init() != 0) {
17071727
ESP_LOGE(BTDM_LOG_TAG, "BLE Log SPI output init failed");
17081728
err = ESP_ERR_NO_MEM;
17091729
goto error;
17101730
}
17111731
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
1732+
#endif /* CONFIG_BLE_LOG_ENABLED */
17121733

17131734
btdm_cfg_mask = btdm_config_mask_load();
17141735

@@ -1737,9 +1758,13 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
17371758

17381759
error:
17391760

1761+
#if CONFIG_BLE_LOG_ENABLED
1762+
ble_log_deinit();
1763+
#else /* !CONFIG_BLE_LOG_ENABLED */
17401764
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
17411765
ble_log_spi_out_deinit();
17421766
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
1767+
#endif /* CONFIG_BLE_LOG_ENABLED */
17431768

17441769
bt_controller_deinit_internal();
17451770

@@ -1752,9 +1777,13 @@ esp_err_t esp_bt_controller_deinit(void)
17521777
return ESP_ERR_INVALID_STATE;
17531778
}
17541779

1780+
#if CONFIG_BLE_LOG_ENABLED
1781+
ble_log_deinit();
1782+
#else /* !CONFIG_BLE_LOG_ENABLED */
17551783
#if CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
17561784
ble_log_spi_out_deinit();
17571785
#endif // CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED
1786+
#endif /* CONFIG_BLE_LOG_ENABLED */
17581787

17591788
btdm_controller_deinit();
17601789

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