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change(esp_hw_support): control DCDC switch by PMU FSM while control DCDC_EN by software
1 parent bb14ab2 commit 072bca4

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2 files changed

+29
-6
lines changed

2 files changed

+29
-6
lines changed

components/esp_hw_support/port/esp32p4/pmu_sleep.c

Lines changed: 26 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,7 @@
4343
#define HP(state) (PMU_MODE_HP_ ## state)
4444
#define LP(state) (PMU_MODE_LP_ ## state)
4545

46+
#define DCDC_STARTUP_TIME_US (950)
4647

4748
static bool s_pmu_sleep_regdma_backup_enabled;
4849

@@ -290,6 +291,24 @@ static void pmu_sleep_analog_init(pmu_context_t *ctx, const pmu_sleep_analog_con
290291
pmu_ll_hp_set_regulator_dbias (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.dbias);
291292
pmu_ll_hp_set_regulator_driver_bar (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.drv_b);
292293

294+
#if CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON
295+
if (dslp)
296+
#endif
297+
{
298+
/**
299+
DCDC_EN will be controlled by software to avoid DCDC working in a non-feedback state, which may
300+
cause input glitch voltage when waking up and switching to LDO.
301+
1. Lightsleep:
302+
CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON = y: DCDC will not shutdown during sleep.
303+
CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON = n:
304+
PD_TOP: DCDC_EN DCDC_EN enabled by regdma after wake up.
305+
PU_TOP: DCDC_EN DCDC_EN enabled by pmu_sleep_finish after wakeup.
306+
2. Deepsleep
307+
After chip wake up from deepsleep, set DCDC_EN in rtc_clk_init.
308+
**/
309+
pmu_ll_hp_set_dcm_mode(ctx->hal->dev, HP(ACTIVE), 0);
310+
}
311+
293312
pmu_ll_lp_set_regulator_sleep_dbias(ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.slp_dbias);
294313
pmu_ll_lp_set_regulator_dbias (ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.dbias);
295314
pmu_ll_lp_set_regulator_driver_bar (ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.drv_b);
@@ -340,7 +359,7 @@ void pmu_sleep_increase_ldo_volt(void) {
340359
}
341360

342361
void pmu_sleep_shutdown_dcdc(void) {
343-
pmu_ll_set_dcdc_switch_force_power_down(&PMU, true);
362+
// Keep dcdc_switch on, will be disabled by PMU when entered sleep.
344363
pmu_ll_set_dcdc_en(&PMU, false);
345364
// Decrease hp_ldo voltage.
346365
pmu_ll_hp_set_regulator_dbias(&PMU, PMU_MODE_HP_ACTIVE, HP_CALI_ACTIVE_DBIAS_DEFAULT);
@@ -450,10 +469,12 @@ TCM_IRAM_ATTR bool pmu_sleep_finish(bool dslp)
450469
{
451470
pmu_ll_hp_set_dcm_vset(&PMU, PMU_MODE_HP_ACTIVE, HP_CALI_ACTIVE_DCM_VSET_DEFAULT);
452471
pmu_sleep_enable_dcdc();
453-
if (pmu_ll_hp_is_sleep_reject(&PMU)) {
454-
// If sleep is rejected, the hardware wake-up process that turns on DCDC
455-
// is skipped, and wait DCDC volt rise up by software here.
456-
esp_rom_delay_us(950);
472+
if (pmu_ll_hp_is_sleep_reject(&PMU) || !s_pmu_sleep_regdma_backup_enabled) {
473+
// If sleep is rejected or regdma restore is skipped, the hardware wake-up process that
474+
// turns on DCDC is skipped, and wait DCDC volt rise up by software here.
475+
esp_rom_delay_us(DCDC_STARTUP_TIME_US);
476+
} else if (s_pmu_sleep_regdma_backup_enabled) {
477+
esp_rom_delay_us(DCDC_STARTUP_TIME_US - PMU_REGDMA_S2A_WORK_TIME_US);
457478
}
458479
pmu_sleep_shutdown_ldo();
459480
}

components/esp_hw_support/port/esp32p4/private_include/pmu_param.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -351,6 +351,7 @@ typedef struct {
351351
#define PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(sleep_flags) { \
352352
.hp_sys = { \
353353
.analog = { \
354+
.dcm_mode = 0, \
354355
.drv_b = PMU_HP_DRVB_LIGHTSLEEP, \
355356
.pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \
356357
.bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \
@@ -385,6 +386,7 @@ typedef struct {
385386
#define PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(sleep_flags) { \
386387
.hp_sys = { \
387388
.analog = { \
389+
.dcm_mode = 0, \
388390
.pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \
389391
.bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \
390392
.xpd = PMU_HP_XPD_DEEPSLEEP, \
@@ -503,7 +505,7 @@ typedef struct pmu_sleep_machine_constant {
503505
.system_dfs_up_work_time_us = 124, \
504506
.analog_wait_time_us = PMU_HP_ANA_WAIT_TIME_PD_TOP_US, \
505507
.power_supply_wait_time_us = 2, \
506-
.power_up_wait_time_us = 2, \
508+
.power_up_wait_time_us = 26, \
507509
.regdma_s2m_work_time_us = 172, \
508510
.regdma_s2a_work_time_us = PMU_REGDMA_S2A_WORK_TIME_US, \
509511
.regdma_m2a_work_time_us = 278, \

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