fix(clk): clear force_on reg for cache

Author: Kainarx

components/esp_system/port/soc/esp32p4/clk.c

@@ -258,17 +258,8 @@ __attribute__((weak)) void esp_perip_clk_init(void)
         REG_CLR_BIT(HP_SYS_CLKRST_CLK_FORCE_ON_CTRL0_REG,   HP_SYS_CLKRST_REG_CPUICM_GATED_CLK_FORCE_ON
                     | HP_SYS_CLKRST_REG_TCM_CPU_CLK_FORCE_ON
                     | HP_SYS_CLKRST_REG_BUSMON_CPU_CLK_FORCE_ON
-                    | HP_SYS_CLKRST_REG_L1CACHE_CPU_CLK_FORCE_ON
-                    | HP_SYS_CLKRST_REG_L1CACHE_D_CPU_CLK_FORCE_ON
-                    | HP_SYS_CLKRST_REG_L1CACHE_I0_CPU_CLK_FORCE_ON
-                    | HP_SYS_CLKRST_REG_L1CACHE_I1_CPU_CLK_FORCE_ON
                     | HP_SYS_CLKRST_REG_TRACE_CPU_CLK_FORCE_ON
-                    | HP_SYS_CLKRST_REG_TRACE_SYS_CLK_FORCE_ON
-                    | HP_SYS_CLKRST_REG_L1CACHE_MEM_CLK_FORCE_ON
-                    | HP_SYS_CLKRST_REG_L1CACHE_D_MEM_CLK_FORCE_ON
-                    | HP_SYS_CLKRST_REG_L1CACHE_I0_MEM_CLK_FORCE_ON
-                    | HP_SYS_CLKRST_REG_L1CACHE_I1_MEM_CLK_FORCE_ON
-                    | HP_SYS_CLKRST_REG_L2CACHE_MEM_CLK_FORCE_ON);
+                    | HP_SYS_CLKRST_REG_TRACE_SYS_CLK_FORCE_ON);
         _adc_ll_sar1_clock_force_en(false);
         _adc_ll_sar2_clock_force_en(false);
         _emac_ll_clock_force_en(false);