P3 async primitives: typed streams, backpressure, waitable sets backed by Gale

[avrabe]

Context

Moved from pulseengine/gale#13. The P3 typed stream/backpressure/waitable primitives are WASM Component Model concepts that belong in kiln-builtins, not the RTOS kernel.

Architecture

Gale provides verified RTOS building blocks. Kiln composes them:

Synth WASM → kiln-builtins dispatch → Gale FFI (verified) → Zephyr kernel

Gale already provides (all ASIL-D verified):

• ring_buf (RB01-RB08) — byte-level ring buffer
• msgq (MQ01-MQ13) — fixed-size message queue
• event (EV01-EV08) — 32-bit event bitmask signaling
• poll (PL01-PL08) — event-driven I/O polling
• pipe (PP01-PP10) — byte stream with wait queues
• sem (P01-P10) — counting semaphore (for backpressure)

What kiln-builtins should implement

1. Typed Channel (compose Gale msgq + event)

• Fixed message size per channel (known at component instantiation)
• Send/recv wrapping gale_k_msgq_put_decide / gale_k_msgq_get_decide
• Channel IDs stored in P3 context slots

2. Backpressure Gate (compose Gale sem + atomic)

• enable() → gale_k_sem_take_decide (block host calls)
• disable() → gale_k_sem_give_decide (resume)
• Fast-path bypass via atomic bool

3. Waitable Event Aggregator (compose Gale poll + event)

• waitable_set_poll() → gale_k_poll_submit_decide
• Event type tagging (Subtask, StreamRead, StreamWrite, etc.)
• Join ID tracking for registered waitables

4. MPU-Protected Shared Regions (compose Gale mem_domain + ring_buf)

• Zero-copy stream optimization on ARM targets
• Writer/reader get separate MPU-protected access to shared ring buffer

Implementation plan

All in kiln-builtins/ (no_std):

1. Add Gale FFI headers to kiln-builtins build
2. Implement typed channel wrapper around msgq FFI
3. Wire into __meld_dispatch_import for P3 stream imports
4. Test with synth-compiled P3 component

Connects to

• Typed stream channels and P3 async extensions for Kiln integration gale#13 (origin — moved here)
• Meld P3 lowering (meld#94)
• cFS Software Bus (kiln#226)