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Add const tests for abm, bmi1, bmi2, bswap and tbm
1 parent 391dc70 commit e1572c5

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10 files changed

+53
-39
lines changed

10 files changed

+53
-39
lines changed

crates/core_arch/src/x86/abm.rs

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -48,17 +48,18 @@ pub const fn _popcnt32(x: i32) -> i32 {
4848

4949
#[cfg(test)]
5050
mod tests {
51+
use crate::core_arch::assert_eq_const as assert_eq;
5152
use stdarch_test::simd_test;
5253

5354
use crate::core_arch::x86::*;
5455

5556
#[simd_test(enable = "lzcnt")]
56-
unsafe fn test_lzcnt_u32() {
57+
const unsafe fn test_lzcnt_u32() {
5758
assert_eq!(_lzcnt_u32(0b0101_1010), 25);
5859
}
5960

6061
#[simd_test(enable = "popcnt")]
61-
unsafe fn test_popcnt32() {
62+
const unsafe fn test_popcnt32() {
6263
assert_eq!(_popcnt32(0b0101_1010), 4);
6364
}
6465
}

crates/core_arch/src/x86/bmi1.rs

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -138,6 +138,7 @@ unsafe extern "C" {
138138

139139
#[cfg(test)]
140140
mod tests {
141+
use crate::core_arch::assert_eq_const as assert_eq;
141142
use stdarch_test::simd_test;
142143

143144
use crate::core_arch::x86::*;
@@ -149,7 +150,7 @@ mod tests {
149150
}
150151

151152
#[simd_test(enable = "bmi1")]
152-
unsafe fn test_andn_u32() {
153+
const unsafe fn test_andn_u32() {
153154
assert_eq!(_andn_u32(0, 0), 0);
154155
assert_eq!(_andn_u32(0, 1), 1);
155156
assert_eq!(_andn_u32(1, 0), 0);
@@ -172,32 +173,32 @@ mod tests {
172173
}
173174

174175
#[simd_test(enable = "bmi1")]
175-
unsafe fn test_blsi_u32() {
176+
const unsafe fn test_blsi_u32() {
176177
assert_eq!(_blsi_u32(0b1101_0000u32), 0b0001_0000u32);
177178
}
178179

179180
#[simd_test(enable = "bmi1")]
180-
unsafe fn test_blsmsk_u32() {
181+
const unsafe fn test_blsmsk_u32() {
181182
let r = _blsmsk_u32(0b0011_0000u32);
182183
assert_eq!(r, 0b0001_1111u32);
183184
}
184185

185186
#[simd_test(enable = "bmi1")]
186-
unsafe fn test_blsr_u32() {
187+
const unsafe fn test_blsr_u32() {
187188
// TODO: test the behavior when the input is `0`.
188189
let r = _blsr_u32(0b0011_0000u32);
189190
assert_eq!(r, 0b0010_0000u32);
190191
}
191192

192193
#[simd_test(enable = "bmi1")]
193-
unsafe fn test_tzcnt_u16() {
194+
const unsafe fn test_tzcnt_u16() {
194195
assert_eq!(_tzcnt_u16(0b0000_0001u16), 0u16);
195196
assert_eq!(_tzcnt_u16(0b0000_0000u16), 16u16);
196197
assert_eq!(_tzcnt_u16(0b1001_0000u16), 4u16);
197198
}
198199

199200
#[simd_test(enable = "bmi1")]
200-
unsafe fn test_tzcnt_u32() {
201+
const unsafe fn test_tzcnt_u32() {
201202
assert_eq!(_tzcnt_u32(0b0000_0001u32), 0u32);
202203
assert_eq!(_tzcnt_u32(0b0000_0000u32), 32u32);
203204
assert_eq!(_tzcnt_u32(0b1001_0000u32), 4u32);

crates/core_arch/src/x86/bmi2.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,6 +78,7 @@ unsafe extern "C" {
7878

7979
#[cfg(test)]
8080
mod tests {
81+
use crate::core_arch::assert_eq_const as assert_eq;
8182
use stdarch_test::simd_test;
8283

8384
use crate::core_arch::x86::*;
@@ -118,7 +119,7 @@ mod tests {
118119
}
119120

120121
#[simd_test(enable = "bmi2")]
121-
unsafe fn test_mulx_u32() {
122+
const unsafe fn test_mulx_u32() {
122123
let a: u32 = 4_294_967_200;
123124
let b: u32 = 2;
124125
let mut hi = 0;

crates/core_arch/src/x86/bswap.rs

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,10 +17,13 @@ pub const fn _bswap(x: i32) -> i32 {
1717

1818
#[cfg(test)]
1919
mod tests {
20+
use crate::core_arch::assert_eq_const as assert_eq;
21+
use stdarch_test::simd_test;
22+
2023
use super::*;
2124

22-
#[test]
23-
fn test_bswap() {
25+
#[simd_test]
26+
const fn test_bswap() {
2427
assert_eq!(_bswap(0x0EADBE0F), 0x0FBEAD0E);
2528
assert_eq!(_bswap(0x00000000), 0x00000000);
2629
}

crates/core_arch/src/x86/tbm.rs

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -148,6 +148,7 @@ pub const fn _tzmsk_u32(x: u32) -> u32 {
148148

149149
#[cfg(test)]
150150
mod tests {
151+
use crate::core_arch::assert_eq_const as assert_eq;
151152
use stdarch_test::simd_test;
152153

153154
use crate::core_arch::x86::*;
@@ -158,13 +159,13 @@ mod tests {
158159
}
159160

160161
#[simd_test(enable = "tbm")]
161-
unsafe fn test_blcfill_u32() {
162+
const unsafe fn test_blcfill_u32() {
162163
assert_eq!(_blcfill_u32(0b0101_0111u32), 0b0101_0000u32);
163164
assert_eq!(_blcfill_u32(0b1111_1111u32), 0u32);
164165
}
165166

166167
#[simd_test(enable = "tbm")]
167-
unsafe fn test_blci_u32() {
168+
const unsafe fn test_blci_u32() {
168169
assert_eq!(
169170
_blci_u32(0b0101_0000u32),
170171
0b1111_1111_1111_1111_1111_1111_1111_1110u32
@@ -176,25 +177,25 @@ mod tests {
176177
}
177178

178179
#[simd_test(enable = "tbm")]
179-
unsafe fn test_blcic_u32() {
180+
const unsafe fn test_blcic_u32() {
180181
assert_eq!(_blcic_u32(0b0101_0001u32), 0b0000_0010u32);
181182
assert_eq!(_blcic_u32(0b1111_1111u32), 0b1_0000_0000u32);
182183
}
183184

184185
#[simd_test(enable = "tbm")]
185-
unsafe fn test_blcmsk_u32() {
186+
const unsafe fn test_blcmsk_u32() {
186187
assert_eq!(_blcmsk_u32(0b0101_0001u32), 0b0000_0011u32);
187188
assert_eq!(_blcmsk_u32(0b1111_1111u32), 0b1_1111_1111u32);
188189
}
189190

190191
#[simd_test(enable = "tbm")]
191-
unsafe fn test_blcs_u32() {
192+
const unsafe fn test_blcs_u32() {
192193
assert_eq!(_blcs_u32(0b0101_0001u32), 0b0101_0011u32);
193194
assert_eq!(_blcs_u32(0b1111_1111u32), 0b1_1111_1111u32);
194195
}
195196

196197
#[simd_test(enable = "tbm")]
197-
unsafe fn test_blsfill_u32() {
198+
const unsafe fn test_blsfill_u32() {
198199
assert_eq!(_blsfill_u32(0b0101_0100u32), 0b0101_0111u32);
199200
assert_eq!(
200201
_blsfill_u32(0u32),
@@ -203,7 +204,7 @@ mod tests {
203204
}
204205

205206
#[simd_test(enable = "tbm")]
206-
unsafe fn test_blsic_u32() {
207+
const unsafe fn test_blsic_u32() {
207208
assert_eq!(
208209
_blsic_u32(0b0101_0100u32),
209210
0b1111_1111_1111_1111_1111_1111_1111_1011u32
@@ -215,7 +216,7 @@ mod tests {
215216
}
216217

217218
#[simd_test(enable = "tbm")]
218-
unsafe fn test_t1mskc_u32() {
219+
const unsafe fn test_t1mskc_u32() {
219220
assert_eq!(
220221
_t1mskc_u32(0b0101_0111u32),
221222
0b1111_1111_1111_1111_1111_1111_1111_1000u32
@@ -227,7 +228,7 @@ mod tests {
227228
}
228229

229230
#[simd_test(enable = "tbm")]
230-
unsafe fn test_tzmsk_u32() {
231+
const unsafe fn test_tzmsk_u32() {
231232
assert_eq!(_tzmsk_u32(0b0101_1000u32), 0b0000_0111u32);
232233
assert_eq!(_tzmsk_u32(0b0101_1001u32), 0b0000_0000u32);
233234
}

crates/core_arch/src/x86_64/abm.rs

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -48,17 +48,18 @@ pub const fn _popcnt64(x: i64) -> i32 {
4848

4949
#[cfg(test)]
5050
mod tests {
51+
use crate::core_arch::assert_eq_const as assert_eq;
5152
use stdarch_test::simd_test;
5253

5354
use crate::core_arch::arch::x86_64::*;
5455

5556
#[simd_test(enable = "lzcnt")]
56-
unsafe fn test_lzcnt_u64() {
57+
const unsafe fn test_lzcnt_u64() {
5758
assert_eq!(_lzcnt_u64(0b0101_1010), 57);
5859
}
5960

6061
#[simd_test(enable = "popcnt")]
61-
unsafe fn test_popcnt64() {
62+
const unsafe fn test_popcnt64() {
6263
assert_eq!(_popcnt64(0b0101_1010), 4);
6364
}
6465
}

crates/core_arch/src/x86_64/bmi.rs

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,7 @@ unsafe extern "C" {
129129

130130
#[cfg(test)]
131131
mod tests {
132+
use crate::core_arch::assert_eq_const as assert_eq;
132133
use stdarch_test::simd_test;
133134

134135
use crate::core_arch::{x86::*, x86_64::*};
@@ -140,7 +141,7 @@ mod tests {
140141
}
141142

142143
#[simd_test(enable = "bmi1")]
143-
unsafe fn test_andn_u64() {
144+
const unsafe fn test_andn_u64() {
144145
assert_eq!(_andn_u64(0, 0), 0);
145146
assert_eq!(_andn_u64(0, 1), 1);
146147
assert_eq!(_andn_u64(1, 0), 0);
@@ -163,25 +164,25 @@ mod tests {
163164
}
164165

165166
#[simd_test(enable = "bmi1")]
166-
unsafe fn test_blsi_u64() {
167+
const unsafe fn test_blsi_u64() {
167168
assert_eq!(_blsi_u64(0b1101_0000u64), 0b0001_0000u64);
168169
}
169170

170171
#[simd_test(enable = "bmi1")]
171-
unsafe fn test_blsmsk_u64() {
172+
const unsafe fn test_blsmsk_u64() {
172173
let r = _blsmsk_u64(0b0011_0000u64);
173174
assert_eq!(r, 0b0001_1111u64);
174175
}
175176

176177
#[simd_test(enable = "bmi1")]
177-
unsafe fn test_blsr_u64() {
178+
const unsafe fn test_blsr_u64() {
178179
// TODO: test the behavior when the input is `0`.
179180
let r = _blsr_u64(0b0011_0000u64);
180181
assert_eq!(r, 0b0010_0000u64);
181182
}
182183

183184
#[simd_test(enable = "bmi1")]
184-
unsafe fn test_tzcnt_u64() {
185+
const unsafe fn test_tzcnt_u64() {
185186
assert_eq!(_tzcnt_u64(0b0000_0001u64), 0u64);
186187
assert_eq!(_tzcnt_u64(0b0000_0000u64), 64u64);
187188
assert_eq!(_tzcnt_u64(0b1001_0000u64), 4u64);

crates/core_arch/src/x86_64/bmi2.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,7 @@ unsafe extern "C" {
8080

8181
#[cfg(test)]
8282
mod tests {
83+
use crate::core_arch::assert_eq_const as assert_eq;
8384
use stdarch_test::simd_test;
8485

8586
use crate::core_arch::x86_64::*;
@@ -121,7 +122,7 @@ mod tests {
121122

122123
#[simd_test(enable = "bmi2")]
123124
#[rustfmt::skip]
124-
unsafe fn test_mulx_u64() {
125+
const unsafe fn test_mulx_u64() {
125126
let a: u64 = 9_223_372_036_854_775_800;
126127
let b: u64 = 100;
127128
let mut hi = 0;

crates/core_arch/src/x86_64/bswap.rs

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,13 @@ pub const fn _bswap64(x: i64) -> i64 {
1818

1919
#[cfg(test)]
2020
mod tests {
21+
use crate::core_arch::assert_eq_const as assert_eq;
22+
use stdarch_test::simd_test;
23+
2124
use super::*;
2225

23-
#[test]
24-
fn test_bswap64() {
26+
#[simd_test]
27+
const fn test_bswap64() {
2528
assert_eq!(_bswap64(0x0EADBEEFFADECA0E), 0x0ECADEFAEFBEAD0E);
2629
assert_eq!(_bswap64(0x0000000000000000), 0x0000000000000000);
2730
}

crates/core_arch/src/x86_64/tbm.rs

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -148,6 +148,7 @@ pub const fn _tzmsk_u64(x: u64) -> u64 {
148148

149149
#[cfg(test)]
150150
mod tests {
151+
use crate::core_arch::assert_eq_const as assert_eq;
151152
use stdarch_test::simd_test;
152153

153154
use crate::core_arch::x86_64::*;
@@ -158,13 +159,13 @@ mod tests {
158159
}
159160

160161
#[simd_test(enable = "tbm")]
161-
unsafe fn test_blcfill_u64() {
162+
const unsafe fn test_blcfill_u64() {
162163
assert_eq!(_blcfill_u64(0b0101_0111u64), 0b0101_0000u64);
163164
assert_eq!(_blcfill_u64(0b1111_1111u64), 0u64);
164165
}
165166

166167
#[simd_test(enable = "tbm")]
167-
unsafe fn test_blci_u64() {
168+
const unsafe fn test_blci_u64() {
168169
assert_eq!(
169170
_blci_u64(0b0101_0000u64),
170171
0b1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1110u64
@@ -176,25 +177,25 @@ mod tests {
176177
}
177178

178179
#[simd_test(enable = "tbm")]
179-
unsafe fn test_blcic_u64() {
180+
const unsafe fn test_blcic_u64() {
180181
assert_eq!(_blcic_u64(0b0101_0001u64), 0b0000_0010u64);
181182
assert_eq!(_blcic_u64(0b1111_1111u64), 0b1_0000_0000u64);
182183
}
183184

184185
#[simd_test(enable = "tbm")]
185-
unsafe fn test_blcmsk_u64() {
186+
const unsafe fn test_blcmsk_u64() {
186187
assert_eq!(_blcmsk_u64(0b0101_0001u64), 0b0000_0011u64);
187188
assert_eq!(_blcmsk_u64(0b1111_1111u64), 0b1_1111_1111u64);
188189
}
189190

190191
#[simd_test(enable = "tbm")]
191-
unsafe fn test_blcs_u64() {
192+
const unsafe fn test_blcs_u64() {
192193
assert_eq!(_blcs_u64(0b0101_0001u64), 0b0101_0011u64);
193194
assert_eq!(_blcs_u64(0b1111_1111u64), 0b1_1111_1111u64);
194195
}
195196

196197
#[simd_test(enable = "tbm")]
197-
unsafe fn test_blsfill_u64() {
198+
const unsafe fn test_blsfill_u64() {
198199
assert_eq!(_blsfill_u64(0b0101_0100u64), 0b0101_0111u64);
199200
assert_eq!(
200201
_blsfill_u64(0u64),
@@ -203,7 +204,7 @@ mod tests {
203204
}
204205

205206
#[simd_test(enable = "tbm")]
206-
unsafe fn test_blsic_u64() {
207+
const unsafe fn test_blsic_u64() {
207208
assert_eq!(
208209
_blsic_u64(0b0101_0100u64),
209210
0b1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1011u64
@@ -215,7 +216,7 @@ mod tests {
215216
}
216217

217218
#[simd_test(enable = "tbm")]
218-
unsafe fn test_t1mskc_u64() {
219+
const unsafe fn test_t1mskc_u64() {
219220
assert_eq!(
220221
_t1mskc_u64(0b0101_0111u64),
221222
0b1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1000u64
@@ -227,7 +228,7 @@ mod tests {
227228
}
228229

229230
#[simd_test(enable = "tbm")]
230-
unsafe fn test_tzmsk_u64() {
231+
const unsafe fn test_tzmsk_u64() {
231232
assert_eq!(_tzmsk_u64(0b0101_1000u64), 0b0000_0111u64);
232233
assert_eq!(_tzmsk_u64(0b0101_1001u64), 0b0000_0000u64);
233234
}

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