diff --git a/config/sst_check_hybridsim.m4 b/config/sst_check_hybridsim.m4 deleted file mode 100644 index 4df8c849d8..0000000000 --- a/config/sst_check_hybridsim.m4 +++ /dev/null @@ -1,59 +0,0 @@ - -AC_DEFUN([SST_CHECK_HYBRIDSIM], [ - AC_ARG_WITH([hybridsim], - [AS_HELP_STRING([--with-hybridsim@<:@=DIR@:>@], - [Use HybridSim package installed in optionally specified DIR])]) - - sst_check_hybridsim_happy="yes" - AS_IF([test "$with_hybridsim" = "no"], [sst_check_hybridsim_happy="no"]) - - CXXFLAGS_saved="$CXXFLAGS" - CPPFLAGS_saved="$CPPFLAGS" - LDFLAGS_saved="$LDFLAGS" - LIBS_saved="$LIBS" - - AS_IF([test ! -z "$with_hybridsim" -a "$with_hybridsim" != "yes"], - [HYBRIDSIM_CPPFLAGS="-I$with_hybridsim" - CPPFLAGS="$HYBRIDSIM_CPPFLAGS $AM_CPPFLAGS $CPPFLAGS" - CXXFLAGS="$AM_CXXFLAGS $CXXFLAGS" - HYBRIDSIM_LDFLAGS="-L$with_hybridsim" - LDFLAGS="$HYBRIDSIM_LDFLAGS $AM_LDFLAGS $LDFLAGS" - HYBRIDSIM_LIBDIR="$with_hybridsim"], - [HYRBRIDSIM_CPPFLAGS= - HYBRIDSIM_LDFLAGS= - HYBRIDSIM_LIBDIR=]) - - AC_LANG_PUSH(C++) - AC_CHECK_HEADERS([HybridSim.h], [], [sst_check_hybridsim_happy="no"]) - AC_CHECK_LIB([hybridsim], [libhybridsim_is_present], - [HYBRIDSIM_LIB="-lhybridsim"], [sst_check_hybridsim_happy="no"]) - AC_LANG_POP(C++) - - CXXFLAGS="$CXXFLAGS_saved" - CPPFLAGS="$CPPFLAGS_saved" - LDFLAGS="$LDFLAGS_saved" - LIBS="$LIBS_saved" - - AC_REQUIRE([SST_CHECK_NVDIMMSIM]) - AC_REQUIRE([SST_CHECK_DRAMSIM]) - - AS_IF([test "$sst_check_hybridsim_happy" = "no"], - [], - [ - AS_IF([test "$sst_check_nvdimmsim_happy" = "no"], - [AC_MSG_ERROR([NVDIMMSim required for HybridSim])]) - AS_IF([test "$sst_check_dramsim_happy" = "no"], - [AC_MSG_ERROR([DRAMSim required for HybridSim])]) - ]) - - AC_SUBST([HYBRIDSIM_CPPFLAGS]) - AC_SUBST([HYBRIDSIM_LDFLAGS]) - AC_SUBST([HYBRIDSIM_LIB]) - AC_SUBST([HYBRIDSIM_LIBDIR]) - AM_CONDITIONAL([HAVE_HYBRIDSIM], [test "$sst_check_hybridsim_happy" = "yes"]) - AS_IF([test "$sst_check_hybridsim_happy" = "yes"], - [AC_DEFINE([HAVE_HYBRIDSIM], [1], [Set to 1 if HybridSim was found])]) - AC_DEFINE_UNQUOTED([HYBRIDSIM_LIBDIR], ["$HYBRIDSIM_LIBDIR"], [Path to HybridSim library]) - - AS_IF([test "$sst_check_hybridsim_happy" = "yes"], [$1], [$2]) -]) diff --git a/config/sst_check_nvdimmsim.m4 b/config/sst_check_nvdimmsim.m4 deleted file mode 100644 index 4d3985df21..0000000000 --- a/config/sst_check_nvdimmsim.m4 +++ /dev/null @@ -1,50 +0,0 @@ - -AC_DEFUN([SST_CHECK_NVDIMMSIM], [ - AC_ARG_WITH([nvdimmsim], - [AS_HELP_STRING([--with-nvdimmsim@<:@=DIR@:>@], - [Use NVDIMMSim package installed in optionally specified DIR])]) - - sst_check_nvdimmsim_happy="yes" - AS_IF([test "$with_nvdimmsim" = "no"], [sst_check_nvdimmsim_happy="no"]) - - CXXFLAGS_saved="$CXXFLAGS" - CPPFLAGS_saved="$CPPFLAGS" - LDFLAGS_saved="$LDFLAGS" - LIBS_saved="$LIBS" - - AS_IF([test ! -z "$with_nvdimmsim" -a "$with_nvdimmsim" != "yes"], - [NVDIMMSIM_CPPFLAGS="-I$with_nvdimmsim -I$with_nvdimmsim/include" - CPPFLAGS="$NVDIMMSIM_CPPFLAGS $AM_CPPFLAGS $CPPFLAGS" - CXXFLAGS="$AM_CXXFLAGS $CXXFLAGS" - NVDIMMSIM_CXXFLAGS="$CXXFLAGS" - NVDIMMSIM_LDFLAGS="-L$with_nvdimmsim -L$with_nvdimmsim/lib" - NVDIMMSIM_LIBDIR="$with_nvdimmsim" - LDFLAGS="$NVDIMMSIM_LDFLAGS $AM_LDFLAGS $LDFLAGS"], - [NVDIMMSIM_CPPFLAGS= - NVDIMMSIM_LDFLAGS= - NVDIMMSIM_LIBDIR= - NVDIMMSIM_CXXFLAGS=]) - - AC_LANG_PUSH(C++) - AC_CHECK_HEADERS([NVDIMM.h], [], [sst_check_nvdimmsim_happy="no"]) - AC_CHECK_LIB([nvdsim], [main], - [NVDIMMSIM_LIB="-lnvdsim"], [sst_check_nvdimmsim_happy="no"]) - AC_LANG_POP(C++) - - CXXFLAGS="$CXXFLAGS_saved" - CPPFLAGS="$CPPFLAGS_saved" - LDFLAGS="$LDFLAGS_saved" - LIBS="$LIBS_saved" - - AC_SUBST([NVDIMMSIM_CPPFLAGS]) - AC_SUBST([NVDIMMSIM_LDFLAGS]) - AC_SUBST([NVDIMMSIM_CXXFLAGS]) - AC_SUBST([NVDIMMSIM_LIB]) - AC_SUBST([NVDIMMSIM_LIBDIR]) - AM_CONDITIONAL([HAVE_NVDIMMSIM], [test "$sst_check_nvdimmsim_happy" = "yes"]) - AS_IF([test "$sst_check_nvdimmsim_happy" = "yes"], - [AC_DEFINE([HAVE_NVDIMMSIM], [1], [Set to 1 if NVDIMMSim was found])]) - AC_DEFINE_UNQUOTED([NVDIMMSIM_LIBDIR], ["$NVDIMMSIM_LIBDIR"], [Path to NVDIMMSim library]) - - AS_IF([test "$sst_check_nvdimmsim_happy" = "yes"], [$1], [$2]) -]) diff --git a/src/sst/elements/memHierarchy/Makefile.am b/src/sst/elements/memHierarchy/Makefile.am index 0dca59bb11..c94e653c91 100644 --- a/src/sst/elements/memHierarchy/Makefile.am +++ b/src/sst/elements/memHierarchy/Makefile.am @@ -130,7 +130,6 @@ libmemHierarchy_la_SOURCES = \ EXTRA_DIST = \ membackend/ramulator2/Instructions.md \ membackend/ramulator2/sst_frontend.cpp \ - tests/testsuite_default_memHierarchy_hybridsim.py \ tests/testsuite_default_memHierarchy_memHA.py \ tests/testsuite_default_memHierarchy_sdl.py \ tests/testsuite_default_memHierarchy_memory.py \ @@ -168,7 +167,6 @@ EXTRA_DIST = \ tests/sdl8-4.py \ tests/sdl9-1.py \ tests/sdl9-2.py \ - tests/test_hybridsim.py \ tests/test_coherence_1core.py \ tests/test_coherence_2core_3level.py \ tests/test_coherence_4core_5level.py \ @@ -232,7 +230,6 @@ EXTRA_DIST = \ tests/hbm_system.ini \ tests/utils.py \ tests/mhlib.py \ - tests/refFiles/test_hybridsim.out \ tests/refFiles/test_memHA_BackendChaining.out \ tests/refFiles/test_memHA_BackendDelayBuffer.out \ tests/refFiles/test_memHA_BackendDramsim3.out \ @@ -488,15 +485,6 @@ nobase_sst_HEADERS += membackend/HBMpagedMultiBackend.h endif -if HAVE_HYBRIDSIM -libmemHierarchy_la_LDFLAGS += $(HYBRIDSIM_LDFLAGS) -libmemHierarchy_la_LIBADD += $(HYBRIDSIM_LIB) -libmemHierarchy_la_SOURCES += membackend/hybridSimBackend.cc \ - membackend/hybridSimBackend.h -nobase_sst_HEADERS += membackend/hybridSimBackend.h -AM_CPPFLAGS += $(HYBRIDSIM_CPPFLAGS) -DHAVE_LIBHYBRIDSIM -endif - if USE_LIBZ libmemHierarchy_la_LDFLAGS += $(LIBZ_LDFLAGS) libmemHierarchy_la_LIBADD += $(LIBZ_LIB) @@ -513,8 +501,6 @@ libmemHierarchy_la_LIBADD += $(GOBLIN_HMCSIM_LIB) AM_CPPFLAGS += $(GOBLIN_HMCSIM_CPPFLAGS) -DHAVE_GOBLIN_HMCSIM endif - - if HAVE_FDSIM libmemHierarchy_la_SOURCES += \ membackend/flashSimBackend.cc \ @@ -530,8 +516,6 @@ install-exec-hook: $(SST_REGISTER_TOOL) DRAMSIM LIBDIR=$(DRAMSIM_LIBDIR) $(SST_REGISTER_TOOL) DRAMSIM3 LIBDIR=$(DRAMSIM3_LIBDIR) $(SST_REGISTER_TOOL) HBMDRAMSIM LIBDIR=$(HBMDRAMSIM_LIBDIR) - $(SST_REGISTER_TOOL) HYBRIDSIM LIBDIR=$(HYBRIDSIM_LIBDIR) - $(SST_REGISTER_TOOL) NVDIMMSIM LIBDIR=$(NVDIMMSIM_LIBDIR) $(SST_REGISTER_TOOL) FDSIM LIBDIR=$(FDSIM_LIBDIR) $(SST_REGISTER_TOOL) GOBLIN_HMCSIM LIBDIR=$(GOBLIN_HMCSIM_LIBDIR) $(SST_REGISTER_TOOL) RAMULATOR LIBDIR=$(RAMULATOR_LIBDIR) diff --git a/src/sst/elements/memHierarchy/configure.m4 b/src/sst/elements/memHierarchy/configure.m4 index dba40e67de..f14d210758 100644 --- a/src/sst/elements/memHierarchy/configure.m4 +++ b/src/sst/elements/memHierarchy/configure.m4 @@ -20,15 +20,9 @@ AC_DEFUN([SST_memHierarchy_CONFIG], [ # Use global HBMDRAMSim check SST_CHECK_HBMDRAMSIM([],[],[AC_MSG_ERROR([HBM DRAMSim requested but could not be found])]) - # Use global HybridSim check - SST_CHECK_HYBRIDSIM([],[],[AC_MSG_ERROR([HybridSim requested but could not be found])]) - # Use GOBLIN HMC Sim SST_CHECK_GOBLIN_HMCSIM([],[],[AC_MSG_ERROR([GOBLIN HMC Sim requested but could not be found])]) - # Use NVDIMM Sim - SST_CHECK_NVDIMMSIM([],[],[AC_MSG_ERROR([NVDIMMSim requested but could not be found])]) - # Use FlashDIMMSim SST_CHECK_FDSIM([],[],[AC_MSG_ERROR([FlashDIMMSim requested but could not be found])]) diff --git a/src/sst/elements/memHierarchy/membackend/HBMpagedMultiBackend.cc b/src/sst/elements/memHierarchy/membackend/HBMpagedMultiBackend.cc index 9878e058b1..0e501f30c8 100644 --- a/src/sst/elements/memHierarchy/membackend/HBMpagedMultiBackend.cc +++ b/src/sst/elements/memHierarchy/membackend/HBMpagedMultiBackend.cc @@ -106,7 +106,7 @@ HBMpagedMultiMemory::HBMpagedMultiMemory(ComponentId_t id, Params ¶ms) nanoConv = getTimeConverter("1ns"); - minAccTime = self_link->getDefaultTimeBase()->getFactor() / + minAccTime = self_link->getDefaultTimeBase().getFactor() / nanoConv.getFactor(); const uint32_t seed = params.find("seed", 1447); diff --git a/src/sst/elements/memHierarchy/membackend/goblinHMCBackend.h b/src/sst/elements/memHierarchy/membackend/goblinHMCBackend.h index 8b18192e89..e664974b5a 100644 --- a/src/sst/elements/memHierarchy/membackend/goblinHMCBackend.h +++ b/src/sst/elements/memHierarchy/membackend/goblinHMCBackend.h @@ -229,6 +229,7 @@ class GOBLINHMCSimBackend : public ExtMemBackend { {"RowAccessTherm", "HMC DRAM row access thermal", "btus", 1} ) /* Class definition */ + [[deprecated("The gc64-hmcsim memory backend has been deprecated and will be removed in SST 17.")]] GOBLINHMCSimBackend(ComponentId_t id, Params& params); ~GOBLINHMCSimBackend(); bool issueRequest(ReqId, Addr, bool, diff --git a/src/sst/elements/memHierarchy/membackend/hybridSimBackend.cc b/src/sst/elements/memHierarchy/membackend/hybridSimBackend.cc deleted file mode 100644 index 9f3470a2d0..0000000000 --- a/src/sst/elements/memHierarchy/membackend/hybridSimBackend.cc +++ /dev/null @@ -1,82 +0,0 @@ -// Copyright 2009-2026 NTESS. Under the terms -// of Contract DE-NA0003525 with NTESS, the U.S. -// Government retains certain rights in this software. -// -// Copyright (c) 2009-2026, NTESS -// All rights reserved. -// -// Portions are copyright of other developers: -// See the file CONTRIBUTORS.TXT in the top level directory -// of the distribution for more information. -// -// This file is part of the SST software package. For license -// information, see the LICENSE file in the top level directory of the -// distribution. - - -#include -#include "sst/elements/memHierarchy/util.h" -#include "membackend/memBackend.h" -#include "membackend/hybridSimBackend.h" - -using namespace SST; -using namespace SST::MemHierarchy; - -HybridSimMemory::HybridSimMemory(ComponentId_t id, Params ¶ms) : SimpleMemBackend(id, params){ - output->init("@R:HybridSimMemory::@p():@l " + getName() + ": ", 0, 0, - (Output::output_location_t)params.find("debug", 0)); - std::string hybridIniFilename = params.find("system_ini", NO_STRING_DEFINED); - if(hybridIniFilename == NO_STRING_DEFINED) - output->fatal(CALL_INFO, -1, "XML must define a 'system_ini' file parameter\n"); - - memSystem = HybridSim::getMemorySystemInstance( 1, hybridIniFilename); - - typedef HybridSim::Callback hybridsim_callback_t; - HybridSim::TransactionCompleteCB *read_cb = new hybridsim_callback_t(this, &HybridSimMemory::hybridSimDone); - HybridSim::TransactionCompleteCB *write_cb = new hybridsim_callback_t(this, &HybridSimMemory::hybridSimDone); - memSystem->RegisterCallbacks(read_cb, write_cb); -} - - - -bool HybridSimMemory::issueRequest( ReqId reqId, Addr addr, bool isWrite, unsigned ) -{ - bool ok = memSystem->WillAcceptTransaction(); - if(!ok) return false; - ok = memSystem->addTransaction(isWrite, addr); - if(!ok) return false; // This *SHOULD* always be ok -#ifdef __SST_DEBUG_OUTPUT__ - output->debug(_L10_, "Issued transaction for address %" PRIx64 "\n", (Addr)addr); -#endif - dramReqs[addr].push_back(reqId); - return true; -} - - - -bool HybridSimMemory::clock(Cycle_t cycle){ - memSystem->update(); - return false; -} - - - -void HybridSimMemory::finish(){ - memSystem->printLogfile(); -} - - - -void HybridSimMemory::hybridSimDone(unsigned int id, uint64_t addr, uint64_t clockcycle){ - std::deque &reqs = dramReqs[addr]; -#ifdef __SST_DEBUG_OUTPUT__ - output->debug(_L10_, "Memory Request for %" PRIx64 " Finished [%zu reqs]\n", addr, reqs.size()); -#endif - if (reqs.size() == 0) output->fatal(CALL_INFO, -1, "Error: reqs.size() is 0 at DRAMSimMemory done\n"); - ReqId req = reqs.front(); - reqs.pop_front(); - if(reqs.size() == 0) - dramReqs.erase(addr); - - handleMemResponse(req); -} diff --git a/src/sst/elements/memHierarchy/membackend/hybridSimBackend.h b/src/sst/elements/memHierarchy/membackend/hybridSimBackend.h deleted file mode 100644 index e3837741dd..0000000000 --- a/src/sst/elements/memHierarchy/membackend/hybridSimBackend.h +++ /dev/null @@ -1,64 +0,0 @@ -// Copyright 2009-2026 NTESS. Under the terms -// of Contract DE-NA0003525 with NTESS, the U.S. -// Government retains certain rights in this software. -// -// Copyright (c) 2009-2026, NTESS -// All rights reserved. -// -// Portions are copyright of other developers: -// See the file CONTRIBUTORS.TXT in the top level directory -// of the distribution for more information. -// -// This file is part of the SST software package. For license -// information, see the LICENSE file in the top level directory of the -// distribution. - - -#ifndef _H_SST_MEMH_HYBRIDSIM_BACKEND -#define _H_SST_MEMH_HYBRIDSIM_BACKEND - -#include "sst/elements/memHierarchy/membackend/memBackend.h" - -#ifdef DEBUG -#define OLD_DEBUG DEBUG -#undef DEBUG -#endif - -#include - -#ifdef OLD_DEBUG -#define DEBUG OLD_DEBUG -#undef OLD_DEBUG -#endif - -namespace SST { -namespace MemHierarchy { - -class HybridSimMemory : public SimpleMemBackend { -public: -/* Element Library Info */ - SST_ELI_REGISTER_SUBCOMPONENT(HybridSimMemory, "memHierarchy", "hybridsim", SST_ELI_ELEMENT_VERSION(1,0,0), - "HybridSim-driven memory timings", SST::MemHierarchy::SimpleMemBackend) - - SST_ELI_DOCUMENT_PARAMS( MEMBACKEND_ELI_PARAMS, - /* Own parameters */ - {"verbose", "Sets the verbosity of the backend output", "0"}, - {"device_ini", "Name of the HybridSim Device config file", NULL}, - {"system_ini", "Name of the HybridSim Device system file", NULL} ) - -/* Begin class definition */ - HybridSimMemory(ComponentId_t id, Params ¶ms); - bool issueRequest( ReqId, Addr, bool, unsigned ); - bool clock(Cycle_t cycle); - void finish(); -private: - void hybridSimDone(unsigned int id, uint64_t addr, uint64_t clockcycle); - - HybridSim::HybridSystem *memSystem; - std::map > dramReqs; -}; - -} -} - -#endif diff --git a/src/sst/elements/memHierarchy/membackend/pagedMultiBackend.cc b/src/sst/elements/memHierarchy/membackend/pagedMultiBackend.cc index fb8df3b5e0..791c71f3d7 100644 --- a/src/sst/elements/memHierarchy/membackend/pagedMultiBackend.cc +++ b/src/sst/elements/memHierarchy/membackend/pagedMultiBackend.cc @@ -101,7 +101,7 @@ pagedMultiMemory::pagedMultiMemory(ComponentId_t id, Params ¶ms) : DRAMSimMe nanoConv = getTimeConverter("1ns"); - minAccTime = self_link->getDefaultTimeBase()->getFactor() / + minAccTime = self_link->getDefaultTimeBase().getFactor() / nanoConv.getFactor(); const uint32_t seed = params.find("seed", 1447); diff --git a/src/sst/elements/memHierarchy/membackend/ramulatorBackend.h b/src/sst/elements/memHierarchy/membackend/ramulatorBackend.h index d790fc2cfa..e9aa569377 100644 --- a/src/sst/elements/memHierarchy/membackend/ramulatorBackend.h +++ b/src/sst/elements/memHierarchy/membackend/ramulatorBackend.h @@ -40,6 +40,7 @@ class ramulatorMemory : public SimpleMemBackend { {"configFile", "Name of the Ramulator Device config file", NULL} ) /* Begin class definition */ + [[deprecated("The Ramulator memory backend has been deprecated and will be removed in SST 17. Please switch to Ramulator2.")]] ramulatorMemory(ComponentId_t id, Params ¶ms); bool issueRequest(ReqId, Addr, bool, unsigned ); //virtual bool issueRequest(DRAMReq *req); diff --git a/src/sst/elements/memHierarchy/tests/refFiles/test_hybridsim.out b/src/sst/elements/memHierarchy/tests/refFiles/test_hybridsim.out deleted file mode 100644 index 599a72078e..0000000000 --- a/src/sst/elements/memHierarchy/tests/refFiles/test_hybridsim.out +++ /dev/null @@ -1,5 +0,0 @@ -l2cache: No MSHR lookup latency provided (mshr_latency_cycles)...intrapolated to 2 cycles. -got to save state in nvdimm -save file was state/nvdimm_restore.txt -NVDIMM is saving the used table, dirty table and address map -Simulation is complete, simulated time: 9.37 us diff --git a/src/sst/elements/memHierarchy/tests/test_hybridsim.py b/src/sst/elements/memHierarchy/tests/test_hybridsim.py deleted file mode 100644 index 6687f574b4..0000000000 --- a/src/sst/elements/memHierarchy/tests/test_hybridsim.py +++ /dev/null @@ -1,101 +0,0 @@ -import sst -import os - -from mhlib import Bus - -# Define SST core options -sst.setProgramOption("stop-at", "100000ns") - -# Define the simulation components -cpu_params = { - "memFreq" : 10, - "memSize" : "1MiB", - "verbose" : 0, - "clock" : "2GHz", - "maxOutstanding" : 16, - "opCount" : 1000, - "reqsPerIssue" : 2, - "write_freq" : 40, # 40% writes - "read_freq" : 60, # 60% reads -} - -comp_cpu0 = sst.Component("core0", "memHierarchy.standardCPU") -comp_cpu0.addParams(cpu_params) -comp_cpu0.addParams({ - "rngseed" : 0 -}) -comp_c0_l1cache = sst.Component("c0.l1cache", "memHierarchy.Cache") -comp_c0_l1cache.addParams({ - "access_latency_cycles" : 2, - "cache_frequency" : "2GHz", - "replacement_policy" : "lru", - "coherence_protocol" : "MSI", - "associativity" : "4", - "cache_line_size" : "64", - "cache_size" : "4 KB", - "L1" : "1", - "debug" : "0" -}) -comp_cpu1 = sst.Component("core1", "memHierarchy.standardCPU") -comp_cpu1.addParams(cpu_params) -comp_cpu1.addParams({ - "rngseed" : 0 -}) -comp_c1_l1cache = sst.Component("c1.l1cache", "memHierarchy.Cache") -comp_c1_l1cache.addParams({ - "access_latency_cycles" : "2", - "cache_frequency" : "2 Ghz", - "replacement_policy" : "lru", - "coherence_protocol" : "MSI", - "associativity" : "4", - "cache_line_size" : "64", - "cache_size" : "4 KB", - "L1" : "1", - "debug" : "0" -}) - -bus_params = { "bus_frequency" : "2GHz" } - -comp_bus = Bus("bus", bus_params, "10000ps") - -comp_l2cache = sst.Component("l2cache", "memHierarchy.Cache") -comp_l2cache.addParams({ - "access_latency_cycles" : "8", - "cache_frequency" : "2 Ghz", - "replacement_policy" : "lru", - "coherence_protocol" : "MSI", - "associativity" : "4", - "cache_line_size" : "64", - "cache_size" : "32 KB", - "L1" : "0", - "debug" : "0", - "mshr_num_entries" : "4096" -}) -comp_memory = sst.Component("memory", "memHierarchy.MemController") -comp_memory.addParams({ - "debug" : "0", - "clock" : "1GHz", - "access_time" : "1000 ns", - "addr_range_start" : 0, -}) -comp_hybridsim = comp_memory.setSubComponent("backend", "memHierarchy.hybridsim") -comp_hybridsim.addParams({ - "access_time" : "1000 ns", - "device_ini" : "DDR3_micron_32M_8B_x4_sg125.ini", - "system_ini" : os.environ['SST_HYBRIDSIM_LIB_DIR'] + '/ini/hybridsim.ini', - "mem_size" : "512MiB", -}) - -subcomp_iface0 = comp_cpu0.setSubComponent("memory", "memHierarchy.standardInterface") -subcomp_iface1 = comp_cpu1.setSubComponent("memory", "memHierarchy.standardInterface") - -# Define the simulation links -link_cpu0_l1cache_link = sst.Link("link_cpu0_l1cache_link") -link_cpu0_l1cache_link.connect( (subcomp_iface0, "lowlink", "1000ps"), (comp_c0_l1cache, "highlink", "1000ps") ) -link_cpu1_l1cache_link = sst.Link("link_cpu1_l1cache_link") -link_cpu1_l1cache_link.connect( (subcomp_iface1, "lowlink", "1000ps"), (comp_c1_l1cache, "highlink", "1000ps") ) - -comp_bus.connect(highcomps=[comp_c0_l1cache,comp_c1_l1cache], lowcomps=[comp_l2cache]) - -link_mem = sst.Link("link_mem_link") -link_mem.connect( (comp_l2cache, "lowlink", "10000ps"), (comp_memory, "highlink", "10000ps") ) diff --git a/src/sst/elements/memHierarchy/tests/testsuite_default_memHierarchy_hybridsim.py b/src/sst/elements/memHierarchy/tests/testsuite_default_memHierarchy_hybridsim.py deleted file mode 100644 index 5f9a4b9f26..0000000000 --- a/src/sst/elements/memHierarchy/tests/testsuite_default_memHierarchy_hybridsim.py +++ /dev/null @@ -1,74 +0,0 @@ -# -*- coding: utf-8 -*- - -from sst_unittest import * -from sst_unittest_support import * -import os - - -class testcase_memHierarchy_hybridsim(SSTTestCase): - - def setUp(self): - super(type(self), self).setUp() - # Put test based setup code here. it is called once before every test - - def tearDown(self): - # Put test based teardown code here. it is called once after every test - super(type(self), self).tearDown() - -##### - - @skip_on_sstsimulator_conf_empty_str("HYBRIDSIM", "LIBDIR", "HYBRIDSIM is not included as part of this build") - def test_hybridsim_hybridsim(self): - self.hybridsim_Template("hybridsim") - -##### - - def hybridsim_Template(self, testcase, testtimeout=120): - # Get the path to the test files - test_path = self.get_testsuite_dir() - outdir = self.get_test_output_run_dir() - tmpdir = self.get_test_output_tmp_dir() - - # Set the Path of the HybridSim Lib into the Env so that the SDL file - # can pull it - lib_dir = sstsimulator_conf_get_value("HYBRIDSIM", "LIBDIR", str, "LIBDIR_UNDEFINED") - os.environ['SST_HYBRIDSIM_LIB_DIR'] = lib_dir - - # Set the various file paths - testDataFileName=("test_{0}".format(testcase)) - sdlfile = "{0}/{1}.py".format(test_path, testDataFileName) - reffile = "{0}/refFiles/{1}.out".format(test_path, testDataFileName) - - outfile = "{0}/{1}.out".format(outdir, testDataFileName) - errfile = "{0}/{1}.err".format(outdir, testDataFileName) - mpioutfiles = "{0}/{1}.testfile".format(outdir, testDataFileName) - - log_debug("testcase = {0}".format(testcase)) - log_debug("sdl file = {0}".format(sdlfile)) - log_debug("ref file = {0}".format(reffile)) - log_debug("out file = {0}".format(outfile)) - log_debug("err file = {0}".format(errfile)) - - # Run SST in the tests directory - self.run_sst(sdlfile, outfile, errfile, set_cwd=test_path, - mpi_out_files=mpioutfiles, timeout_sec=testtimeout) - - testing_remove_component_warning_from_file(outfile) - - # NOTE: THE PASS / FAIL EVALUATIONS ARE PORTED FROM THE SQE BAMBOO - # BASED testSuite_XXX.sh THESE SHOULD BE RE-EVALUATED BY THE - # DEVELOPER AGAINST THE LATEST VERSION OF SST TO SEE IF THE - # TESTS & RESULT FILES ARE STILL VALID - - # Perform the tests - # This test uses DRAMSim2 which dumps data to the error output, we cannot - # test for an empty errfile. - if os_test_file(errfile, "-s"): - log_testing_note("hybridsim test {0} has a Non-Empty Error File {1}".format(testDataFileName, errfile)) - - cmp_result = testing_compare_sorted_diff(testcase, outfile, reffile) - if not cmp_result: - diffdata = testing_get_diff_data(testcase) - log_failure(diffdata) - self.assertTrue(cmp_result, "Diffed compared Output file {0} does not match Reference File {1}".format(outfile, reffile)) -