Add support for Zba address generation extension

Add support for the RISC-V Zba address generation extension. These
instructions combine shift and addition operations, enabling efficient
address calculation in pointer arithmetic and memory access patterns.

Supporting the Zba extension improves compatibility with the RISC-V
specification and enables optimized handling of address generation
tasks.

Author: visitorckw

Makefile

@@ -107,6 +107,10 @@ $(call set-feature, Zicsr)
 ENABLE_Zifencei ?= 1
 $(call set-feature, Zifencei)
 
+# Zba Address generation instructions
+ENABLE_Zba ?= 1
+$(call set-feature, Zba)
+
 ENABLE_FULL4G ?= 0
 
 # Experimental SDL oriented system calls

src/decode.c

@@ -665,6 +665,30 @@ static inline bool op_op(rv_insn_t *ir, const uint32_t insn)
         break;
 #endif /* RV32_HAS(EXT_M) */
 
+#if RV32_HAS(Zba)
+    /* inst   funct7  rs2 rs1 funct3 rd opcode
+     * ------+-------+---+---+------+--+-------
+     * SH1ADD 0010000 rs2 rs1 010    rd 0110011
+     * SH2ADD 0010000 rs2 rs1 100    rd 0110011
+     * SH3ADD 0010000 rs2 rs1 110    rd 0110011
+     */
+    case 0b0010000:
+        switch (funct3) {
+        case 0b010: /* sh1add */
+            ir->opcode = rv_insn_sh1add;
+            break;
+        case 0b100: /* sh2add */
+            ir->opcode = rv_insn_sh2add;
+            break;
+        case 0b110: /* sh3add */
+            ir->opcode = rv_insn_sh3add;
+            break;
+        default: /* illegal instruction */
+            return false;
+        }
+        break;
+#endif /* RV32_HAS(Zba) */
+
     case 0b0100000:
         switch (funct3) {
         case 0b000: /* SUB: Substract */

src/decode.h

@@ -97,6 +97,12 @@ enum op_field {
         _(csrrsi, 0, 4, 0, ENC(rs1, rd))               \
         _(csrrci, 0, 4, 0, ENC(rs1, rd))               \
     )                                                  \
+    /* RV32 Zba Standard Extension */                  \
+    IIF(RV32_HAS(Zba))(                                \
+        _(sh1add, 0, 4, 0, ENC(rs1, rs2, rd))          \
+        _(sh2add, 0, 4, 0, ENC(rs1, rs2, rd))          \
+        _(sh3add, 0, 4, 0, ENC(rs1, rs2, rd))          \
+    )                                                  \
     /* RV32M Standard Extension */                     \
     IIF(RV32_HAS(EXT_M))(                              \
         _(mul, 0, 4, 1, ENC(rs1, rs2, rd))             \

src/feature.h

@@ -37,6 +37,11 @@
 #define RV32_FEATURE_Zifencei 1
 #endif
 
+/* Zba Address generation instructions */
+#ifndef RV32_FEATURE_Zba
+#define RV32_FEATURE_Zba 1
+#endif
+
 /* Experimental SDL oriented system calls */
 #ifndef RV32_FEATURE_SDL
 #define RV32_FEATURE_SDL 1

src/rv32_constopt.c

@@ -1039,3 +1039,23 @@ CONSTOPT(cflw, {})
 /* C.FSW */
 CONSTOPT(cfsw, {})
 #endif
+
+#if RV32_HAS(Zba)
+/* SH1ADD */
+CONSTOPT(sh1add, {
+    if (ir->rd)
+        info->is_constant[ir->rd] = false;
+})
+
+/* SH2ADD */
+CONSTOPT(sh2add, {
+    if (ir->rd)
+        info->is_constant[ir->rd] = false;
+})
+
+/* SH3ADD */
+CONSTOPT(sh3add, {
+    if (ir->rd)
+        info->is_constant[ir->rd] = false;
+})
+#endif

src/rv32_template.c

@@ -2600,3 +2600,33 @@ RVOP(
         assert; /* FIXME: Implement */
     }))
 #endif
+
+/* RV32Zba Standard Extension */
+
+#if RV32_HAS(Zba)
+
+/* SH1ADD */
+RVOP(
+    sh1add,
+    { rv->X[ir->rd] = (rv->X[ir->rs1] << 1) + rv->X[ir->rs2]; },
+    GEN({
+        assert; /* FIXME: Implement */
+    }))
+
+/* SH2ADD */
+RVOP(
+    sh2add,
+    { rv->X[ir->rd] = (rv->X[ir->rs1] << 2) + rv->X[ir->rs2]; },
+    GEN({
+        assert; /* FIXME: Implement */
+    }))
+
+/* SH3ADD */
+RVOP(
+    sh3add,
+    { rv->X[ir->rd] = (rv->X[ir->rs1] << 3) + rv->X[ir->rs2]; },
+    GEN({
+        assert; /* FIXME: Implement */
+    }))
+
+#endif

src/t2c_template.c

@@ -793,6 +793,14 @@ T2C_OP(cflw, { __UNREACHABLE; })
 T2C_OP(cfsw, { __UNREACHABLE; })
 #endif
 
+#if RV32_HAS(Zba)
+T2C_OP(sh1add, { __UNREACHABLE; })
+
+T2C_OP(sh2add, { __UNREACHABLE; })
+
+T2C_OP(sh3add, { __UNREACHABLE; })
+#endif
+
 T2C_OP(fuse1, {
     opcode_fuse_t *fuse = ir->fuse;
     for (int i = 0; i < ir->imm2; i++) {