1+ #include " catch2/catch_test_macros.hpp"
2+ #include " catch2/matchers/catch_matchers_all.hpp"
3+
4+ #include " compressed_grid.h"
5+ #include " globals.h"
6+ #include " physical_types.h"
7+
8+ // for comparing floats
9+ #include " vtr_math.h"
10+
11+ namespace {
12+
13+ void set_type_tile_to_empty (const int x, const int y,
14+ vtr::NdMatrix<t_grid_tile, 3 >& grid) {
15+ t_physical_tile_type_ptr type = grid[0 ][x][y].type ;
16+ const int width_offset = grid[0 ][x][y].width_offset ;
17+ const int height_offset = grid[0 ][x][y].height_offset ;
18+ const int x_anchor = x - width_offset;
19+ const int y_anchor = y - height_offset;
20+
21+ for (int i = x_anchor; i < x_anchor + type->width ; i++) {
22+ for (int j = y_anchor; j < y_anchor + type->height ; j++) {
23+ if (grid[0 ][i][j].type == type && grid[0 ][i][j].width_offset == i - x_anchor && grid[0 ][i][j].height_offset == j - y_anchor) {
24+ grid[0 ][i][j].type = g_vpr_ctx.device ().EMPTY_PHYSICAL_TILE_TYPE ;
25+ grid[0 ][i][j].width_offset = 0 ;
26+ grid[0 ][i][j].height_offset = 0 ;
27+ }
28+ }
29+ }
30+
31+ }
32+
33+ void set_tile_type_at_loc (const int x_anchor, const int y_anchor,
34+ vtr::NdMatrix<t_grid_tile, 3 >& grid,
35+ const t_physical_tile_type& tile_type) {
36+
37+ for (int i = x_anchor; i < x_anchor + tile_type.width ; i++) {
38+ for (int j = y_anchor; j < y_anchor + tile_type.height ; j++) {
39+ if (grid[0 ][i][j].type != g_vpr_ctx.device ().EMPTY_PHYSICAL_TILE_TYPE ) {
40+ set_type_tile_to_empty (i, j, grid);
41+ }
42+ grid[0 ][i][j].type = &tile_type;
43+ grid[0 ][i][j].width_offset = i - x_anchor;
44+ grid[0 ][i][j].height_offset = j - y_anchor;
45+ }
46+ }
47+ }
48+
49+ TEST_CASE (" test_compressed_grid" " [vpr_compressed_grid]"
50+ // test device grid name
51+ std::string device_grid_name = " test"
52+
53+ // creating a reference for the empty tile name and router name
54+ char empty_tile_name[] = " empty"
55+ char io_tile_name[] = " io"
56+ char small_tile_name[] = " small"
57+ char tall_tile_name[] = " tall"
58+ char large_tile_name[] = " large"
59+
60+ // device grid parameters
61+ const int test_grid_width = 100 ;
62+ const int test_grid_height = 100 ;
63+
64+ // create the test device grid (10x10)
65+ auto test_grid = vtr::NdMatrix<t_grid_tile, 3 >({1 , test_grid_width, test_grid_height});
66+
67+ t_logical_block_type EMPTY_LOGICAL_BLOCK_TYPE = get_empty_logical_type ();
68+ EMPTY_LOGICAL_BLOCK_TYPE.index = 0 ;
69+
70+ t_physical_tile_type empty_tile;
71+ empty_tile.name = empty_tile_name;
72+ empty_tile.height = 1 ;
73+ empty_tile.width = 1 ;
74+
75+ g_vpr_ctx.mutable_device ().EMPTY_PHYSICAL_TILE_TYPE = &empty_tile;
76+
77+ // create an io physical tile and assign its parameters
78+ t_physical_tile_type io_tile;
79+ io_tile.name = io_tile_name;
80+ io_tile.height = 1 ;
81+ io_tile.width = 1 ;
82+
83+ t_logical_block_type io_logical_type;
84+ io_logical_type.index = 1 ;
85+ io_logical_type.equivalent_tiles .push_back (&io_tile);
86+
87+ // create a small tile and assign its parameters
88+ t_physical_tile_type small_tile;
89+ small_tile.name = small_tile_name;
90+ small_tile.height = 1 ;
91+ small_tile.width = 1 ;
92+
93+ t_logical_block_type small_logical_type;
94+ small_logical_type.index = 2 ;
95+ small_logical_type.equivalent_tiles .push_back (&small_tile);
96+
97+ // create a small tile and assign its parameters
98+ t_physical_tile_type tall_tile;
99+ tall_tile.name = tall_tile_name;
100+ tall_tile.height = 4 ;
101+ tall_tile.width = 1 ;
102+
103+ t_logical_block_type tall_logical_type;
104+ tall_logical_type.index = 3 ;
105+ tall_logical_type.equivalent_tiles .push_back (&tall_tile);
106+
107+ t_physical_tile_type large_tile;
108+ large_tile.name = large_tile_name;
109+ large_tile.height = 3 ;
110+ large_tile.width = 3 ;
111+
112+ t_logical_block_type large_logical_type;
113+ large_logical_type.index = 4 ;
114+ large_logical_type.equivalent_tiles .push_back (&large_tile);
115+
116+
117+ for (int x = 0 ; x < test_grid_width; x++) {
118+ for (int y = 0 ; y < test_grid_height; y++) {
119+ test_grid[0 ][x][y].type = &io_tile;
120+ test_grid[0 ][x][y].height_offset = 0 ;
121+ test_grid[0 ][x][y].width_offset = 0 ;
122+ }
123+ }
124+
125+ for (int x = 1 ; x < test_grid_width - 1 ; x++) {
126+ for (int y = 1 ; y < test_grid_height - 1 ; y++) {
127+ set_tile_type_at_loc (x, y, test_grid, small_tile);
128+ }
129+ }
130+
131+ for (int x = 7 ; x < test_grid_width - 7 ; x += 10 ) {
132+ for (int y = 5 ; y < test_grid_height - 5 ; y += 5 ) {
133+ set_tile_type_at_loc (x, y, test_grid, tall_tile);
134+ }
135+ }
136+
137+ for (int x = 8 ; x < test_grid_width - 8 ; x += 17 ) {
138+ for (int y = 7 ; y < test_grid_height - 6 ; y += 13 ) {
139+ set_tile_type_at_loc (x, y, test_grid, large_tile);
140+ }
141+ }
142+
143+ auto & logical_block_types = g_vpr_ctx.mutable_device ().logical_block_types ;
144+ logical_block_types.clear ();
145+
146+ auto & grid = g_vpr_ctx.mutable_device ().grid ;
147+ grid = DeviceGrid (" test_device_grid"
148+
149+ std::vector<t_compressed_block_grid> compressed_grids = create_compressed_block_grids ();
150+
151+ echo_compressed_grids (" havij"
152+
153+ // SECTION("All routers are seperated by one or more grid spaces") {
154+ // // in this test, the routers will be on the 4 corners of the FPGA
155+ // }
156+
157+ }
158+
159+ } // namespace
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