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soc: nxp: mcxw2xx: Enable the power management
Enabled modes: idle: SLEEP suspend: DEEP-SLEEP standby: POWER-DOWN with CPU retention OS Time Base: OSTIMER with 32K clock source Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
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4 files changed

+313
-7
lines changed

dts/arm/nxp/nxp_mcxw23x_common.dtsi

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,12 +32,47 @@
3232
reg = <0>;
3333
#address-cells = <1>;
3434
#size-cells = <1>;
35+
cpu-power-states = <&idle &suspend &standby>;
3536

3637
mpu: mpu@e000ed90 {
3738
compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
3940
};
4041
};
42+
43+
power-states {
44+
/* Idle mode maps to Sleep mode. */
45+
idle: idle {
46+
compatible = "zephyr,power-state";
47+
power-state-name = "runtime-idle";
48+
min-residency-us = <60>;
49+
exit-latency-us = <16>;
50+
zephyr,pm-device-disabled;
51+
};
52+
53+
/* Suspend mode maps to Deep Sleep mode. */
54+
suspend: suspend {
55+
compatible = "zephyr,power-state";
56+
power-state-name = "suspend-to-idle";
57+
min-residency-us = <1300>;
58+
exit-latency-us = <749>;
59+
};
60+
61+
/* Standby mode maps to Power Down mode with CPU retention . */
62+
standby: standby {
63+
compatible = "zephyr,power-state";
64+
power-state-name = "standby";
65+
min-residency-us = <2000>;
66+
exit-latency-us = <1345>;
67+
};
68+
};
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};
70+
71+
/* For the resource which will be off and lose content. */
72+
standby_off_domain: standby-off-domain {
73+
compatible = "power-domain-soc-state-change";
74+
#power-domain-cells = <0>;
75+
onoff-power-states = <&standby>;
4176
};
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4378
sysclk: system-clock {
@@ -175,6 +210,7 @@
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mode = <0>;
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input = <0>;
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prescale = <0>;
213+
zephyr,disabling-power-states = <&suspend &standby>;
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};
179215

180216
ctimer1: ctimer@9000 {
@@ -187,6 +223,7 @@
187223
mode = <0>;
188224
input = <0>;
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prescale = <0>;
226+
zephyr,disabling-power-states = <&suspend &standby>;
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};
191228

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ctimer2: ctimer@28000 {
@@ -199,6 +236,7 @@
199236
mode = <0>;
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input = <0>;
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prescale = <0>;
239+
zephyr,disabling-power-states = <&suspend &standby>;
202240
};
203241

204242
ctimer3: ctimer@29000 {
@@ -211,6 +249,7 @@
211249
mode = <0>;
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input = <0>;
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prescale = <0>;
252+
zephyr,disabling-power-states = <&suspend &standby>;
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};
215254

216255
ctimer4: ctimer@2a000 {
@@ -223,6 +262,7 @@
223262
mode = <0>;
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input = <0>;
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prescale = <0>;
265+
zephyr,disabling-power-states = <&suspend &standby>;
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};
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228268
sc_timer: pwm@85000 {
@@ -232,13 +272,15 @@
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status = "disabled";
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clocks = <&syscon MCUX_SCTIMER_CLK>;
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prescaler = <2>;
275+
zephyr,disabling-power-states = <&suspend &standby>;
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#pwm-cells = <3>;
236277
};
237278

238279
os_timer: timers@2d000 {
239280
compatible = "nxp,os-timer";
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reg = <0x2d000 0x1000>;
241282
interrupts = <38 1>;
283+
resets = <&reset NXP_SYSCON_RESET(1, 1)>;
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status = "disabled";
243285
};
244286

@@ -250,6 +292,7 @@
250292
resets = <&reset NXP_SYSCON_RESET(1, 11)>;
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dmas = <&dma0 4 &dma0 5>;
252294
dma-names = "rx", "tx";
295+
zephyr,disabling-power-states = <&suspend &standby>;
253296
status = "disabled";
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};
255298

@@ -261,6 +304,8 @@
261304
resets = <&reset NXP_SYSCON_RESET(1, 12)>;
262305
dmas = <&dma0 6 &dma0 7>;
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dma-names = "rx", "tx";
307+
zephyr,disabling-power-states = <&suspend &standby>;
308+
power-domains = <&standby_off_domain>;
264309
status = "disabled";
265310
};
266311

@@ -272,6 +317,8 @@
272317
resets = <&reset NXP_SYSCON_RESET(1, 13)>;
273318
dmas = <&dma0 8 &dma0 9>;
274319
dma-names = "rx", "tx";
320+
zephyr,disabling-power-states = <&suspend &standby>;
321+
power-domains = <&standby_off_domain>;
275322
status = "disabled";
276323
};
277324

@@ -287,6 +334,8 @@
287334
reg = <0x82000 0x1000>;
288335
interrupts = <1 1>;
289336
dma-channels = <23>;
337+
zephyr,disabling-power-states = <&suspend &standby>;
338+
power-domains = <&standby_off_domain>;
290339
status = "disabled";
291340
#dma-cells = <1>;
292341
};
@@ -296,6 +345,8 @@
296345
reg = <0xa7000 0x1000>;
297346
interrupts = <58 1>;
298347
dma-channels = <10>;
348+
zephyr,disabling-power-states = <&suspend &standby>;
349+
power-domains = <&standby_off_domain>;
299350
status = "disabled";
300351
#dma-cells = <1>;
301352
};
@@ -328,6 +379,7 @@
328379
resets = <&reset NXP_SYSCON_RESET(1, 0)>;
329380
#address-cells = <1>;
330381
#size-cells = <0>;
382+
zephyr,disabling-power-states = <&suspend &standby>;
331383

332384
mrt0_channel0: mrt0_channel@0 {
333385
compatible = "nxp,mrt-channel";

soc/nxp/mcx/mcxw/mcxw2xx/Kconfig.defconfig

Lines changed: 39 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,8 @@ if SOC_SERIES_MCXW2XX
88
# In case we need to switch to OS timer, then
99
# define CONFIG_MCUX_OS_TIMER=y
1010
config MCUX_OS_TIMER
11-
default n
11+
default y if PM
12+
default n if !PM
1213

1314
config CORTEX_M_SYSTICK
1415
default n if MCUX_OS_TIMER
@@ -19,9 +20,14 @@ config NUM_IRQS
1920
DT_SYSCLK_PATH := $(dt_nodelabel_path,sysclk)
2021

2122
config SYS_CLOCK_HW_CYCLES_PER_SEC
22-
default 1000000 if MCUX_OS_TIMER
23+
default 32768 if MCUX_OS_TIMER && PM
24+
default 1000000 if MCUX_OS_TIMER && !PM
2325
default $(dt_node_int_prop_int,$(DT_SYSCLK_PATH),clock-frequency) if CORTEX_M_SYSTICK
2426

27+
config SYS_CLOCK_TICKS_PER_SEC
28+
default 512 if MCUX_OS_TIMER && PM
29+
default 1000 if MCUX_OS_TIMER && !PM
30+
2531
# Set to the minimal size of data which can be written.
2632
config FLASH_FILL_BUFFER_SIZE
2733
default 512
@@ -42,4 +48,35 @@ config MAIN_STACK_SIZE
4248

4349
endif # BT
4450

51+
if PM
52+
53+
# Enable PM_DEVICE for Suspend mode and Standby mode,
54+
# because some devices can't work in these modes.
55+
config PM_DEVICE
56+
default y if "$(dt_nodelabel_enabled,standby)" || "$(dt_nodelabel_enabled,suspend)"
57+
58+
config PM_POLICY_DEVICE_CONSTRAINTS
59+
default y if PM_DEVICE
60+
61+
config IDLE_STACK_SIZE
62+
default 640
63+
64+
config TICKLESS_KERNEL
65+
default y
66+
67+
if BT
68+
choice PM_POLICY
69+
default PM_POLICY_CUSTOM
70+
endchoice
71+
endif # BT
72+
73+
endif # PM
74+
75+
if PM_DEVICE
76+
77+
config POWER_DOMAIN
78+
default y
79+
80+
endif # PM_DEVICE
81+
4582
endif # SOC_SERIES_MCXW2XX

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