Skip to content

Machine code monitor fixes#704

Open
chrisgleissner wants to merge 6 commits into
GideonZ:test-mergefrom
chrisgleissner:fix/machine-code-monitor-disassembly
Open

Machine code monitor fixes#704
chrisgleissner wants to merge 6 commits into
GideonZ:test-mergefrom
chrisgleissner:fix/machine-code-monitor-disassembly

Conversation

@chrisgleissner
Copy link
Copy Markdown
Contributor

@chrisgleissner chrisgleissner commented Jun 3, 2026

Summary

This PR contains bug fixes as well as test improvements for the machine code monitor.

Bug Fixes

  • Corrects 6502 disassembly operand handling for BIT opcode, as well as for a few illegal opcodes
  • Changed undocumented opcodes to use their preferred mnemonic as per NMOS 6510 Unintended Opcodes and C64 Wiki
  • Updates keyboard references to use RUN/STOP instead of ESC in monitor help, header text, docs, and tests
  • Align monitor ROM buffers to 4-byte boundaries to prevent crash when opening monitor

Related PRs

Documentation for the machine code monitor was added to GideonZ/1541u-documentation#27

Test improvements

  • Strengthened machine monitor E2E test with a round-trip save/load test, both for top-level and D64-hosted files

Tests

All E2E tests for the monitor, as well as for the recently added REST API for injecting keyboard and joystick events were successfully run after deploying this firmware to my Ultimate 64 Elite I via JTAG.

Machine Code Monitor

python3 tools/developer/machine-code-monitor/monitor_test.py --host u64 --port 23 --rest-host u64

Result: monitor_test: OK (23 checks)

Input REST API

python3 tools/api/input_test.py -H u64 -r u64

Result: input_test: OK (44 checks)

Copilot AI review requested due to automatic review settings June 3, 2026 23:42
Copy link
Copy Markdown

Copilot AI left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Pull request overview

Note

Copilot was unable to run its full agentic suite in this review.

Updates the monitor/disassembler to correctly treat only rel-specified opcodes as branches (fixing BIT being misinterpreted), switches UI/help text and docs from ESC to RUN/STOP, and hardens ROM cache buffers against unaligned 32-bit writes on Nios2.

Changes:

  • Adjust 6502 opcode templates/operand formatting so branch behavior is driven by an explicit rel operand spec (and add tests for additional opcodes/ASM edit behavior).
  • Update monitor help text, tests, and documentation to use RUN/STOP as the cancel/exit key instead of ESC.
  • Align ROM cache buffers to 4 bytes to prevent unaligned 32-bit store traps in the flash read path.

Reviewed changes

Copilot reviewed 6 out of 6 changed files in this pull request and generated 4 comments.

Show a summary per file
File Description
software/test/monitor/machine_monitor_test_support.cc Updates test UI stub signature to match new string_edit interface.
software/test/monitor/machine_monitor_test.cc Adds disassembler/ASM edit tests and updates help text expectations for RUN/STOP.
software/monitor/u64_memory_backend.cc Forces 4-byte alignment for ROM cache buffers to avoid unaligned word stores.
software/monitor/machine_monitor.cc Switches branch detection to rel parsing and updates UI strings to RSTOP.
software/monitor/disassembler_6502.cc Makes branch operand handling template-driven (rel), adjusts templates, removes $nn,S handling.
doc/machine_code_monitor.md Documents RUN/STOP replacing ESC for cancel/exit flows.
Comments suppressed due to low confidence (1)

software/monitor/disassembler_6502.cc:1

  • Support for the $nn,S operand spec was removed from both operand_length() and format_operand(). If any remaining opcode templates still include $nn,S, those opcodes will now likely get an incorrect operand length and/or blank/misformatted operands. Either ensure no templates use $nn,S anymore (and consider adding a targeted test for any opcode that previously relied on it), or keep $nn,S handling in these helpers.
#include "disassembler_6502.h"

💡 Add Copilot custom instructions for smarter, more guided reviews. Learn how to get started.

Comment thread software/monitor/machine_monitor.cc Outdated
Comment thread software/monitor/u64_memory_backend.cc Outdated
Comment thread software/monitor/machine_monitor.cc
Comment thread software/test/monitor/machine_monitor_test.cc
@chrisgleissner chrisgleissner changed the title Fix machine code monitor disassembly Machine code monitor fixes Jun 3, 2026
@chrisgleissner chrisgleissner marked this pull request as draft June 4, 2026 00:00
- asm_is_branch(): reuse the decoder's operand_spec() helper instead of a
  hard-coded "templ + 4" offset, so branch classification stays consistent
  with disassembly. operand_spec() is given external linkage (moved out of
  the anonymous namespace, declared in the header).
- u64_memory_backend: use the standard C++ alignas(4) instead of the
  GCC-specific __attribute__((aligned(4))) for the ROM cache buffers, keeping
  the same 4-byte alignment guarantee.
- disassembler tests: assert the remaining relative branches (BPL/BMI/BVC/
  BVS/BNE) so a missing or wrong "rel" operand spec is caught by tests.
Round-trip a known memory pattern through the monitor's S(ave) and L(oad)
commands to two targets under the /Temp RAM disk: a plain top-level PRG file
and a PRG inside a freshly created D64 image. The file picker is driven over
telnet and the data is verified through the REST memory API.
@chrisgleissner chrisgleissner marked this pull request as ready for review June 4, 2026 00:27
@chrisgleissner
Copy link
Copy Markdown
Contributor Author

Hi @GideonZ ,

Thanks for reviewing and hopefully merging.

Best wishes
Christian

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants