V0.02

What's Changed

• feat(setup): Use new setup process: Call iob_cache.py directly. by @arturum1 in #283
• Update iob_cache.py according to new LIB. by @arturum1 in #284
• Add correct widths to if_gen interfaces. by @arturum1 in #285
• feat: merge with latest main branch by @P-Miranda in #289
• Fix py2hw setup process using previously agreed-upon py2hw syntax by @arturum1 in #301
• Update core to use new py2hwsw format. by @arturum1 in #305
• Merge branch 'main' into if_gen2 by @arturum1 in #309
• Update according to new py2hwsw version; Format code. by @arturum1 in #311
• feat(dest_dir): Replace 'purpose' by 'dest_dir' by @arturum1 in #312
• Use new csrs module from py2hwsw by @arturum1 in #313
• feat(Makefile): Remove setup.mk include by @arturum1 in #314
• Use BE_IF and BE_DATA_W python parameters by @arturum1 in #315
• feat(mem): update memory instantiation by @P-Miranda in #316
• Rename fpga to match new name of py2hwsw by @arturum1 in #317
• Fix default.nix; Rename fpga.sdc by @arturum1 in #318
• Update CACHE to use new py2hwsw version; Add ci.yml; Fix license. by @arturum1 in #319
• Update cache with latest Py2HWSW by @arturum1 in #320
• Cache improvements and fixes by @arturum1 in #321
• Export fusesoc-compatible release artifacts of iob_cache by @arturum1 in #322
• feat(Makefile): Add fusesoc-core-file target; Fix release-artifacts. by @arturum1 in #324
• feat(lint): Update and lint cache by @P-Miranda in #323
• feat(lint, vutb, coverage): verilator lint, vutb simulation, add coverage, improve cache control by @P-Miranda in #325

Full Changelog: V0.10...V0.20

M3_d

What's Changed

• feat(lint): Update and lint cache by @P-Miranda in #323
• feat(lint, vutb, coverage): verilator lint, vutb simulation, add coverage, improve cache control by @P-Miranda in #325

Full Changelog: M3_g...M3_d

M3_g

What's Changed

• Cache improvements and fixes by @arturum1 in #321
• Export fusesoc-compatible release artifacts of iob_cache by @arturum1 in #322
• feat(Makefile): Add fusesoc-core-file target; Fix release-artifacts. by @arturum1 in #324

Full Changelog: M1.d...M3_g

Milestone M1.d

What's Changed

• feat(setup): Use new setup process: Call iob_cache.py directly. by @arturum1 in #283
• Update iob_cache.py according to new LIB. by @arturum1 in #284
• Add correct widths to if_gen interfaces. by @arturum1 in #285
• feat: merge with latest main branch by @P-Miranda in #289
• Fix py2hw setup process using previously agreed-upon py2hw syntax by @arturum1 in #301
• Update core to use new py2hwsw format. by @arturum1 in #305
• Merge branch 'main' into if_gen2 by @arturum1 in #309
• Update according to new py2hwsw version; Format code. by @arturum1 in #311
• feat(dest_dir): Replace 'purpose' by 'dest_dir' by @arturum1 in #312
• Use new csrs module from py2hwsw by @arturum1 in #313
• feat(Makefile): Remove setup.mk include by @arturum1 in #314
• Use BE_IF and BE_DATA_W python parameters by @arturum1 in #315
• feat(mem): update memory instantiation by @P-Miranda in #316
• Rename fpga to match new name of py2hwsw by @arturum1 in #317
• Fix default.nix; Rename fpga.sdc by @arturum1 in #318
• Update CACHE to use new py2hwsw version; Add ci.yml; Fix license. by @arturum1 in #319
• Update cache with latest Py2HWSW by @arturum1 in #320

Full Changelog: V0.10...V0.11

V0.10

Pre-release to prepare for main release.