cpu: mirror chip RAM across the chip window by Agnus address reach#197
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The motherboard decode (Gary and equivalents) routes the whole $000000-$1FFFFF window to Agnus, which only decodes as many address bits as its DRAM reach, so the fitted chip RAM image repeats across the window: an OCS 8370/8371 mirrors its 512K image at $080000/$100000/$180000, the 1M 8372A (A20 unused) repeats its image at $100000, and the 2M 8375/Alice decode the full window. Within one image, addresses past the fitted RAM select no DRAM bank and stay open bus, e.g. $080000-$0FFFFF on an 8372A with 512K fitted. Copperline previously decoded chip RAM only within its fitted size and left the rest of the window unmapped. Action Replay freeze-disk loaders park the supervisor stack at $100000 on a 512K OCS machine and rely on the pushes landing at the top of chip RAM; without the mirror the pushes vanished, the return popped 0, and the exception cascade rebooted into a garbage guru (issue #196, Brian the Lion AR freeze on 512K chip + 512K slow). With the mirror the freeze restores and the game resumes, matching real OCS hardware and vAmiga. Writes through an image repeat report the canonical chip address to watchpoints and UI highlights. Kickstart's chip sizing detects the wrap and still reports the fitted size (verified with AmigaTestKit on KS 1.2/1.3 x OCS/8372A with 512K and 1M chip). The debugger memory find now walks the alias hits, so its test asserts the image-repeat addresses. Fixes #196
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Pull request overview
This PR fixes incorrect CPU-visible chip RAM decoding by mirroring the fitted chip RAM image across the full $000000–$1FFFFF chip window according to the active Agnus revision’s address reach, matching real hardware behavior (fixes #196).
Changes:
- Add CPU-side chip-window decoding via
CpuBus::chip_window_offset, usingAgnusRevision::dma_addr_capability_mask()to model per-revision mirroring and open-bus gaps. - Update debugger/UI memory-find test expectations to include mirror hits across the chip window.
- Document the chip-window mirroring model and introduce a shared
CHIP_WINDOW_SIZEconstant.
Reviewed changes
Copilot reviewed 4 out of 4 changed files in this pull request and generated 1 comment.
| File | Description |
|---|---|
src/video/window/tests.rs |
Updates debugger mem-find UI test to expect repeated matches at chip RAM mirror addresses. |
src/memory.rs |
Introduces CHIP_WINDOW_SIZE and documents the motherboard-to-Agnus chip window behavior. |
src/cpu.rs |
Implements chip-window address folding for CPU plain-memory decode and adds unit tests for mirroring/open-bus behavior. |
docs/internals/chipset.md |
Documents CPU-visible chip RAM reach/mirroring and the Action Replay regression example. |
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A chip write through an Agnus image repeat lands in one RAM cell that is CPU-visible at several addresses, and watchpoints store the address the user set them on. Note the CPU bus address and the canonical chip address (when they differ) so watches and UI highlights fire whichever alias they were set on.
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Fixes #196.
Root cause
The Action Replay freeze-disk loader on the attached disk restores the frozen machine from inside
Supervisor()with SP = $100000. On a real 512K OCS A500 that works because the 8371 Agnus only decodes A1-A18: the 512K chip RAM image mirrors across the whole $000000-$1FFFFF chip window, so the stack pushes at $0FFFFC land at physical $7FFFC (top of chip RAM).Copperline decoded chip RAM only within its fitted size, leaving the rest of the window unmapped: the loader's pushes vanished into open bus, the return popped 0, and the resulting exception cascade rebooted the machine. The guru
#00000287.00C05170is KS 1.3 displaying the stored garbage alert after that reboot (the "address" is the CLI task in slow RAM), which is why it appears "at the end of loading". Adding more chip RAM (1MB) hid the problem because $0FFFFC then had real RAM behind it.Fix
CPU-side chip decode now models the real address path: the motherboard decode (Gary and equivalents) routes the whole $000000-$1FFFFF window to Agnus, which decodes only its DRAM reach (the existing
AgnusRevision::dma_addr_capability_mask()):One helper (
CpuBus::chip_window_offset) feeds every CPU path (reads, writes, prefetch, caches, GDB, debugger views). Writes through an image repeat report the canonical chip address to watchpoints and UI highlights.Verification
A500_OCS_1MB) and the reporter's real A500ocs_bpu7_hamperf test), clippy and fmt all passdocs/internals/chipset.md