Hi, I’m Manimohan Thiriloganathan – a recent graduate from Electronics & Telecommunication Engineering undergraduate at the University of Moratuwa, Sri Lanka.
🎓 Research Interests:
- Analog & Digital Integrated Circuit Design (ICD) (Analog, RF, Mixed-Signal)
- VLSI Systems & Design Methodologies
- Machine Learning (ML) & AI for Hardware Systems
⚡ I specialize in PLL/VCO design, FPGA-based computing, and ML-driven system optimization.
I am passionate about collaborative research, open-source IC projects, and academic innovation.
- 🧠 Analog/Mixed-Signal IC Design: PLLs, VCOs, OTAs, Linear Power Supplies
- 📶 VLSI & FPGA: RTL design, FPGA acceleration (Zynq Ultrascale+, FINN, Vivado, Vitis)
- 🤖 AI & ML: YOLO-based object detection, surrogate modeling, biomedical AI
- 🔬 EDA & Simulation Tools: Cadence, LTspice, Ngspice, KLayout, Xschem
- Open to academic research collaborations in IC design & ML for hardware
- Seeking opportunities in Analog/Mixed-Signal IC Design, VLSI, and AI-Hardware integration
- Fractional-N PLL with LC-VCO (SKY130) → Repo
- PLL Clock Multiplier (IHP SG13G2) → Repo
- FPGA-based License Plate Recognition → Repo
- YOLOv8 – Densely Packed Product Detection → Repo
- ECG Heart Monitor → Repo
- Dean’s List (Sem 04, 06, 07, 08) 🎓
- Winner – Huawei ICT Competition 2022-23
- IEEE Xtreme 16.0 & 18.0 Finalist ⚡
- Varsity Battles Winner – Colombo Stock Exchange (2024)