Extended support of Alveo boards by BSC#150
Conversation
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++ @Jbalkind |
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Thanks Alex! This is great :) There's a lot in here (my browser freezes reading the "files changed" tab) and I'm wondering how we can scale this down to make merging it more manageable. There are also a few things I can see from a quick initial scan that I think we should check over or pare down for the initial merge. Initial comments:
Could we also rewrite the history down to a smaller number of commits? That or I could do a squashed merge when I actually merge the PR into the repo. |
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Thanks Jon for the feedback. |
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Ok that all sounds good. I think going for a squash at merge time is reasonable so let's assume that we'll do that. Thanks! |
Ft/cms acc See merge request hwdesign/frameworks/meep_openpiton!128
…ts for DDR mem (2 inactive ports are present by default).
DDR support for MEEP Shell See merge request hwdesign/frameworks/meep_openpiton!129
Update of way to apply patch for Ariane. See merge request hwdesign/frameworks/meep_openpiton!130
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Hi @Jbalkind , sorry for a delay. Some update is here: now Ariane patching is done through |
…HBM) in meep shell.
Parameter for SDRAM address width. See merge request hwdesign/frameworks/meep_openpiton!132
…e containing sw test application, 100GbE uB-based prototype design.
…C/Aurora states, and applying resets to readyness of data consumers around CMAC/AUrora bridegs (to compensate their probable different reset delays).
… `valrdy_to_credit` unit to exclude interactions for earlier release of Aurora reset.
… FPGA throgh P2P QSFP
… NOC-Aurora bridge in order to ramp-up the Tile.
…uring reset in order to flush incoming Eth packets at startup.
…hframe` module for flushing Eth packets coming through ACK channel during startup.
…hframe_to_valrdy` module since they are retransmitted infinitely until acknowledged and thus might fill-up the pipeline in the bridge when NOC side is not ready causing the deadlock.
…now is applied without extra delay.
…odule instead of previously `ethframe_to_valrdy`, what is more reliable not to start accepting eth frame in its middle after `rstn_guard` release.
…immediately `valid` signal from Aurora bridge after `rstn_guard` is released.
Here is a suggested support of 3 types of AMD Alveo boards: U55C, U280, U250. It is based on embedded meep_shell which includes QDMA based PCIe inteface, 2 kinds of supported DRAM: DDR and HBM, support of multi-MC (Memory Controllers) connection to HBM utilizing free NOC ports of edge tiles. Apart of this the contribution includes modified NOC-AXI4 bridge, 100GbE solution based on Ultrascale+ CMAC hard-macro+QSFP and AXI-DMA, BSCAN based small JTAG shell. Support of Alveo boards is provided as independent of Vivado versions. The last checked Vivado version is 2024.1. The bitstream built in different configurations and utilizing all above is Linux bootable.