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pre-commit.yml
77 workflow runs
77 workflow runs

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fix: disable CLC for now pre-commit #77: Commit cbff3ce pushed by davschneller
33s dev2
dev2
33s
Work towards more asynchronous memory transfers pre-commit #76: Commit 4529582 pushed by davschneller
1m 28s dev2
dev2
1m 28s
Mix MFMA and DPP better pre-commit #75: Commit f1838b6 pushed by davschneller
17s dev2
dev2
17s
Improve DPP usage pre-commit #74: Commit da167bc pushed by davschneller
17s dev2
dev2
17s
Fix asserts pre-commit #73: Commit e948ed1 pushed by davschneller
19s dev2
dev2
19s
Disable experiments pre-commit #72: Commit b44a587 pushed by davschneller
20s dev2
dev2
20s
Try FP16 emulation pre-commit #71: Commit 524146e pushed by davschneller
18s dev2
dev2
18s
Add BF16->FP32 emulation pre-commit #70: Commit 33e94c1 pushed by davschneller
22s dev2
dev2
22s
Fix multilinear (and visco) pre-commit #69: Commit 9284e55 pushed by davschneller
24s dev2
dev2
24s
Add atomic updates pre-commit #68: Commit 40ac1b5 pushed by davschneller
41m 32s dev2
dev2
41m 32s
Continue work on buffering pre-commit #67: Commit 296a812 pushed by davschneller
3h 15m 29s dev2
dev2
3h 15m 29s
Implment double buffering pre-commit #66: Commit 4e5bcb8 pushed by davschneller
15s dev2
dev2
15s
nontemporal vector loads pre-commit #65: Commit 6c2ed1b pushed by davschneller
19s dev2
dev2
19s
Start implementing float4 loads pre-commit #64: Commit 3074009 pushed by davschneller
19s dev2
dev2
19s
Fix register names pre-commit #63: Commit 2101864 pushed by davschneller
29s dev2
dev2
29s
Fix memory and register layouting pre-commit #62: Commit 69e3562 pushed by davschneller
2m 40s dev2
dev2
2m 40s
Next memmove correction pre-commit #61: Commit d754db3 pushed by davschneller
16s dev2
dev2
16s
Fix attempt pre-commit #60: Commit 067e178 pushed by davschneller
21s dev2
dev2
21s
Start optimizing the memory loading pre-commit #59: Commit c13c814 pushed by davschneller
14s dev2
dev2
14s
Working AMD 16x16 instruction transpose pre-commit #58: Commit f032633 pushed by davschneller
19s dev2
dev2
19s
Working AMD 16x16 instruction transpose pre-commit #57: Commit 89a6e3d pushed by davschneller
17s dev2
dev2
17s
Fix more long-kernel bugs pre-commit #56: Commit 19f933e pushed by davschneller
5m 44s dev2
dev2
5m 44s
Begin adding SIMD support pre-commit #55: Commit bc4dcdc pushed by davschneller
15s dev2
dev2
15s
Towards more AMD and Intel matrix ops pre-commit #54: Commit ae43f64 pushed by davschneller
15s dev
dev
15s
Towards more AMD and Intel matrix ops pre-commit #53: Commit ae43f64 pushed by davschneller
17s dev2
dev2
17s