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2 parents 8c16b8f + f9d2192 commit 6f4ec0eCopy full SHA for 6f4ec0e
sphinxcontrib_verilog_diagrams/__init__.py
@@ -116,7 +116,7 @@ def run(self):
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# type: () -> List[nodes.Node]
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rel_filename, filename = self.env.relfn2path(self.arguments[0])
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- code = open(rel_filename, 'r').read().strip().split('\n')
+ code = open(filename, 'r').read().strip().split('\n')
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first_line = next(
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(idx for idx, line in enumerate(code) if 'SPDX' in line), 1)
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