Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
33 commits
Select commit Hold shift + click to select a range
e8658c9
Integrate UART peripheral with the core
RunzeZhu28 Jan 13, 2026
c7a6fd8
Delete quartus workspace/inst_mem.v
RunzeZhu28 Jan 13, 2026
0a72099
Delete quartus workspace/ram_m10k.v
RunzeZhu28 Jan 13, 2026
4dea453
Merge branch 'uart_peripheral'
RunzeZhu28 Jan 23, 2026
e5262b0
Update ControlFSM.sv
RunzeZhu28 Jan 24, 2026
b348567
Lint changes
RunzeZhu28 Jan 24, 2026
aae5bf5
Lint update
RunzeZhu28 Jan 24, 2026
f998b48
lint update
RunzeZhu28 Jan 24, 2026
6822df9
spacing
RunzeZhu28 Jan 24, 2026
afb4550
lint fixing
RunzeZhu28 Jan 24, 2026
00d5a9f
lint fixing
RunzeZhu28 Jan 24, 2026
809281a
lint fixing
RunzeZhu28 Jan 24, 2026
4ddbd36
lint fixing
RunzeZhu28 Jan 24, 2026
61a8686
lint fixing
RunzeZhu28 Jan 24, 2026
8bf5ee8
lint fixing
RunzeZhu28 Jan 24, 2026
42ef5e0
lint fixing
RunzeZhu28 Jan 24, 2026
f7a1205
lint fixing
RunzeZhu28 Jan 24, 2026
d98e1d5
lint fixing
RunzeZhu28 Jan 24, 2026
2e0da8f
lint fixing
RunzeZhu28 Jan 24, 2026
ea3666f
lint fixing
RunzeZhu28 Jan 24, 2026
b83dffd
lint fixing
RunzeZhu28 Jan 24, 2026
c7a5955
lint fixing
RunzeZhu28 Jan 24, 2026
5a55d1c
fix de1-soc build
TheDeepestSpace Feb 26, 2026
06b1062
Merge branch 'main' into uart_peripheral
TheDeepestSpace Feb 26, 2026
880e9e2
add pin assignments for uart
TheDeepestSpace Feb 28, 2026
9ef3c2b
fix de1-soc base tb
TheDeepestSpace Feb 28, 2026
663dae6
remote nested quartus workspace
TheDeepestSpace Mar 9, 2026
e542d2a
gitignore .idea/ preferences
TheDeepestSpace Mar 9, 2026
95dbc6e
remove autogenerated mem files
TheDeepestSpace Mar 9, 2026
6b4a268
undo ^M drops to cdf
TheDeepestSpace Mar 9, 2026
cab2453
undo ^M drops to qpf and qsf
TheDeepestSpace Mar 9, 2026
69bd415
delete bak files
TheDeepestSpace Mar 9, 2026
3bbd5d7
Moved rx_ready assignment so that it is after the declaration of the …
marwannismail Mar 14, 2026
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 2 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
.idea/*

*.vvp
*.vcd

Expand Down
2 changes: 1 addition & 1 deletion CONTRIBUTORS.md
Original file line number Diff line number Diff line change
Expand Up @@ -22,4 +22,4 @@ Mihir Maringanti

Marwan Ismail (marwannismail)

Tony Zhu (RunzeZhu28)
Tony Zhu (RunzeZhu28)
130 changes: 65 additions & 65 deletions Dockerfile.riscv-toolchain
100755 → 100644
Original file line number Diff line number Diff line change
@@ -1,65 +1,65 @@
FROM public.ecr.aws/lts/ubuntu:22.04_stable AS builder
ARG DEBIAN_FRONTEND=noninteractive
ARG KEYRING_PATH=/usr/share/keyrings
ARG APT_SOURCES_PATH=/etc/apt/sources.list.d
# update and upgrade
RUN apt update && apt upgrade -y
# install essentialls
RUN apt update && \
apt install -y \
man make build-essential git zsh vim curl wget procps gnupg gnupg2 ca-certificates zip \
software-properties-common
# unminimize the system
RUN bash -c "yes | unminimize"
# create dev sudo user
RUN useradd --create-home dev && \
usermod --append --groups sudo dev && \
apt update && apt install -y sudo && \
echo '%sudo ALL=(ALL) NOPASSWD:ALL' >> /etc/sudoers
# build riscv toolchain
RUN sudo apt-get install -y \
autoconf automake autotools-dev curl python3 libmpc-dev libmpfr-dev libgmp-dev gawk \
build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev libexpat-dev && \
cd /tmp && \
git clone --recursive https://github.com/riscv/riscv-gnu-toolchain.git && \
git clone --recursive https://github.com/riscv/riscv-opcodes.git && \
cd riscv-gnu-toolchain && \
./configure --prefix=/opt/riscv --with-arch=rv32i --with-abi=ilp32 && \
sudo make
# main image stage
FROM public.ecr.aws/lts/ubuntu:22.04_stable
ARG DEBIAN_FRONTEND=noninteractive
ARG KEYRING_PATH=/usr/share/keyrings
ARG APT_SOURCES_PATH=/etc/apt/sources.list.d
# update and upgrade
RUN apt update && apt upgrade -y
# install essentialls
RUN apt update && \
apt install -y \
man make build-essential git zsh vim curl wget procps gnupg gnupg2 ca-certificates zip \
software-properties-common
# unminimize the system
RUN bash -c "yes | unminimize"
# create dev sudo user
RUN useradd --create-home dev && \
usermod --append --groups sudo dev && \
apt update && apt install -y sudo && \
echo '%sudo ALL=(ALL) NOPASSWD:ALL' >> /etc/sudoers
# get toolchain artifacts from builder stage
COPY --from=builder /opt/riscv /opt/riscv
ENV PATH="/opt/riscv/bin:${PATH}"
USER dev
FROM public.ecr.aws/lts/ubuntu:22.04_stable AS builder

ARG DEBIAN_FRONTEND=noninteractive
ARG KEYRING_PATH=/usr/share/keyrings
ARG APT_SOURCES_PATH=/etc/apt/sources.list.d

# update and upgrade
RUN apt update && apt upgrade -y

# install essentialls
RUN apt update && \
apt install -y \
man make build-essential git zsh vim curl wget procps gnupg gnupg2 ca-certificates zip \
software-properties-common

# unminimize the system
RUN bash -c "yes | unminimize"

# create dev sudo user
RUN useradd --create-home dev && \
usermod --append --groups sudo dev && \
apt update && apt install -y sudo && \
echo '%sudo ALL=(ALL) NOPASSWD:ALL' >> /etc/sudoers

# build riscv toolchain
RUN sudo apt-get install -y \
autoconf automake autotools-dev curl python3 libmpc-dev libmpfr-dev libgmp-dev gawk \
build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev libexpat-dev && \
cd /tmp && \
git clone --recursive https://github.com/riscv/riscv-gnu-toolchain.git && \
git clone --recursive https://github.com/riscv/riscv-opcodes.git && \
cd riscv-gnu-toolchain && \
./configure --prefix=/opt/riscv --with-arch=rv32i --with-abi=ilp32 && \
sudo make

# main image stage
FROM public.ecr.aws/lts/ubuntu:22.04_stable

ARG DEBIAN_FRONTEND=noninteractive
ARG KEYRING_PATH=/usr/share/keyrings
ARG APT_SOURCES_PATH=/etc/apt/sources.list.d

# update and upgrade
RUN apt update && apt upgrade -y

# install essentialls
RUN apt update && \
apt install -y \
man make build-essential git zsh vim curl wget procps gnupg gnupg2 ca-certificates zip \
software-properties-common

# unminimize the system
RUN bash -c "yes | unminimize"

# create dev sudo user
RUN useradd --create-home dev && \
usermod --append --groups sudo dev && \
apt update && apt install -y sudo && \
echo '%sudo ALL=(ALL) NOPASSWD:ALL' >> /etc/sudoers

# get toolchain artifacts from builder stage
COPY --from=builder /opt/riscv /opt/riscv
ENV PATH="/opt/riscv/bin:${PATH}"

USER dev
63 changes: 37 additions & 26 deletions envs/de1-soc/memory_map.sv
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,8 @@ module memory_map #( parameter SIZE = 1024 )
, input data_t write_data
, input logic [3:0] write_enable
, output data_t read_data
, input logic [31:0] dbg_regs [0:31]
, input addr_t dbg_pc

, output reg [9:0] LEDR
);
Expand All @@ -26,36 +28,45 @@ module memory_map #( parameter SIZE = 1024 )
$readmemh("poc/poc3.mem", M3);
end
`endif
reg [31:0] mem_rdata;

reg [31:0] M [0:SIZE - 1];
reg [31:0] mem_rdata;
localparam bit [31:0] LEDR_ADDRESS = 32'h1000_0000;
localparam bit [31:0] DBG_REG_BASE = 32'h2000_0000; // x0..x31
localparam bit [31:0] DBG_PC_ADDR = 32'h2000_0080; // to see where is the current pc

localparam bit [31:0] LEDR_ADDRESS = 32'h10000000;
localparam int ADDR_LSB = 2;
localparam int ADDR_WIDTH = $clog2(SIZE);
wire [ADDR_WIDTH - 1 : 0] mem_index = address[ADDR_LSB + ADDR_WIDTH - 1 : ADDR_LSB];

localparam int ADDR_LSB = 2;
localparam int ADDR_WIDTH = $clog2(SIZE);
wire [ADDR_WIDTH - 1:0] mem_index = address[ADDR_LSB + ADDR_WIDTH - 1 : ADDR_LSB]; // I think this way may save some resources
wire dbg_reg_hit = (address[31:12] == DBG_REG_BASE[31:12]) && (address[11:7] == 5'd0); //between REG_BASE and use only 31 words
wire [4:0] dbg_reg_idx = address[6:2];

always @(*) begin
case (address)
LEDR_ADDRESS: read_data = {22'b0, LEDR};
default: read_data = mem_rdata;
endcase
end
always @(*) begin
case (address)
LEDR_ADDRESS: read_data = {22'b0, LEDR};
DBG_PC_ADDR: read_data = dbg_pc;
default: begin
if (dbg_reg_hit && (dbg_reg_idx < 5'd32)) read_data = dbg_regs[dbg_reg_idx];
Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

i think there's a construct that looks like case (address) inside that allows specifying ranges of values in the case's arms. I think it should be synthesizable, not sure how efficient though.

else read_data = mem_rdata;
end
endcase
end

always @(posedge clk) begin
mem_rdata <= { M3[mem_index], M2[mem_index], M1[mem_index], M0[mem_index] };
case (address)
LEDR_ADDRESS: begin
if (|write_enable) LEDR <= write_data[9:0];
end
default: begin
if (write_enable[0]) M0[mem_index] <= write_data[7:0];
if (write_enable[1]) M1[mem_index] <= write_data[15:8];
if (write_enable[2]) M2[mem_index] <= write_data[23:16];
if (write_enable[3]) M3[mem_index] <= write_data[31:24];
end
endcase
end
always @(posedge clk) begin
mem_rdata <= { M3[mem_index], M2[mem_index], M1[mem_index], M0[mem_index] };

case (address)
LEDR_ADDRESS: begin
if (|write_enable) LEDR <= write_data[9:0];
end

default: begin
if (write_enable[0]) M0[mem_index] <= write_data[7:0];
if (write_enable[1]) M1[mem_index] <= write_data[15:8];
if (write_enable[2]) M2[mem_index] <= write_data[23:16];
if (write_enable[3]) M3[mem_index] <= write_data[31:24];
end
endcase
end

endmodule
2 changes: 1 addition & 1 deletion envs/de1-soc/poc/poc.c
Original file line number Diff line number Diff line change
Expand Up @@ -13,4 +13,4 @@ int main(void) {
}

return 0;
}
}
Empty file modified envs/de1-soc/quartus/output_files/utoss-risc-v.cdf
100755 → 100644
Empty file.
19 changes: 19 additions & 0 deletions envs/de1-soc/quartus/top.sdc
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
# Timing constraints for UTOSS RISC-V processor

# Create base clock constraint for 50MHz input
create_clock -name {CLOCK_50} -period 20.000 [get_ports {CLOCK_50}]

set_false_path -from [get_ports KEY[0]]
set_false_path -to [get_ports KEY[0]]

set_false_path -from [get_ports LEDR]
set_false_path -to [get_ports LEDR]

# Set input/output delays relative to the 5MHz clock
# Assume external signals are synchronized to the 5MHz domain
#set_input_delay -clock {clk_5mhz} -max 50.0 [get_ports {KEY[*]}]
#set_input_delay -clock {clk_5mhz} -min 10.0 [get_ports {KEY[*]}]

#set_output_delay -clock {clk_5mhz} -max 50.0 [get_ports {LEDR[*]}]
#set_output_delay -clock {clk_5mhz} -min -10.0 [get_ports {LEDR[*]}]

Empty file modified envs/de1-soc/quartus/utoss-risc-v.qpf
100755 → 100644
Empty file.
12 changes: 9 additions & 3 deletions envs/de1-soc/quartus/utoss-risc-v.qsf
100755 → 100644
Original file line number Diff line number Diff line change
Expand Up @@ -311,21 +311,27 @@ set_location_assignment PIN_D12 -to VGA_R[5]
set_location_assignment PIN_E12 -to VGA_R[6]
set_location_assignment PIN_F13 -to VGA_R[7]
set_location_assignment PIN_C10 -to VGA_SYNC_N
set_location_assignment PIN_D11 -to VGA_VS
set_location_assignment PIN_D11 -to VGA_VS
set_location_assignment PIN_D9 -to UART_RX
set_location_assignment PIN_E9 -to UART_TX

set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/packages/pkg_control_fsm.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/utils.svh
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/types.svh
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/params.svh
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/ALU_ALUdecoder/ALUdecoder.sv
set_global_assignment -name VERILOG_FILE ../../../src/ALU_ALUdecoder/ALU.v
set_global_assignment -name VERILOG_FILE ../../../src/Instruction_Decode/RegisterFile.v
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/Instruction_Decode/RegisterFile.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/Instruction_Decode/MemoryLoader.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/Instruction_Decode/Instruction_Decode.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/utoss_riscv.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/fetch.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/ControlFSM.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/uart_bus_master.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/uart_rx.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/uart_tx.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../../../src/uart.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../top.sv
set_global_assignment -name SYSTEMVERILOG_FILE ../memory_map.sv
set_global_assignment -name SDC_FILE "utoss-risc-v.sdc"
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
Expand Down
Empty file modified envs/de1-soc/quartus/utoss-risc-v_description.txt
100755 → 100644
Empty file.
Loading
Loading