implemented zbb instructions (logic-not, min/max, sign/zero ext)#196
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implemented zbb instructions (logic-not, min/max, sign/zero ext)#196
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🔧 DE1-SoC Synthesis Report Summary Diff📊 Fitter Summary (.fit.summary)@@ -1,4 +1,4 @@
-Fitter Status : Successful - Sun Mar 22 02:17:43 2026
+Fitter Status : Successful - Sun Mar 22 16:24:54 2026
Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Revision Name : utoss-risc-v
Top-level Entity Name : top⏱️ Timing Analysis Summary (.sta.summary)No changes detected Comparing synthesis results from main branch vs. this PR |
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Hey @TheDeepestSpace I fixed up the zbb instructions and decoder |
…ference/isa/unpriv/b-st-ext.html#zbb and updated types.svh and the zbb.sv accordingly
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Hey, thanks! Lemme see what these merge conflicts are about |
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| case (funct3) | ||
| 3'b100: | ||
| case(rs2) | ||
| 5'b00000: b_alu_control = B_ALU_CTRL__ZEXTH; |
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Why do we need to check that rs2 is zero for zext.h?
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we don't technically need to, I added it to be more compliant with the riscv encoding
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implemented 8 of the zbb instructions.