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Small fixes to slowfil_srl#1

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eddiehung wants to merge 4 commits into
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FPGeh:slowfil_srl
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Small fixes to slowfil_srl#1
eddiehung wants to merge 4 commits into
ZipCPU:masterfrom
FPGeh:slowfil_srl

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@eddiehung

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@ZipCPU

ZipCPU commented Mar 21, 2019

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No, that's not right. IW is the width of an input sample in bits, not the number of items that need to be shifted. NTAPS should be the number of elements in the shift register, not IW.

@eddiehung

eddiehung commented Mar 21, 2019

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For the purpose of keeping things clean here, I've reverted the changes I made to slowfil_srl.v that uses a different style of describing the shift register to aid inference.

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