Performance improvements through Chip Caching #30
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…y activate caching on larger chips.
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I just resolved the errors using GitHub‘s web editor. I can‘t test it right now or fix the PinState stuff etc, maybe @firecerne can do that if he has the time? |
logic-mindful
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Aug 10, 2025
* Performance improvements through Chip Caching (#30) * added caching of purely combinational chips * fixed chip caching; now always works correctly * Added extra ui in the chip customization menu to let the user manually activate caching on larger chips. * added info popup while creating a cache * fixed recalculation of caches to only happen when actually necessary * caching now gets disabled when viewing so cached chips actually show whats happening --------- Co-authored-by: Chris <christianilhoefer@gmail.com> Co-authored-by: Logic Mindful <master51.main@gmail.com> * Precom edit (#33) only really includes the last commit - everything else has already been added i'm just bad with git * fixed a small error. * Fix custom pin position issues on saving Changes how chip descriptions are created, now accounting for custom pin layout (positions and presence of layout). In addition, it fixes how the game sometimes falsly registers chips as unsaved when they have custom pin layouts. It feels wrong to directly commit here. * Custom special chip deletion Players are now able to delete their custom i/o and split/merge (only in pairs). The base i/o and split merge are excluded from this. * Can delete custom buses Buses are now able to be deleted. They can't be manually deleted alone, but only when a custom bitcount is deleted. Delete IN-12 -> also deletes OUT-12 and BUS * Prevents user from creating same size split/merge Makes it impossible to create split/merges such as 16-16 or 4-4 or 1-1, because they are useless and cause problems. * Flat colour fix Wires now are of a flat color (on/off of the same color) only after 64, not starting from 64. * Removes Saver debug logs * Fixes name label placement on top/bottom pins Top/Bottom pin name labels are no longer excruciatingly spaced away from their pins. * Added an indicator of mod version on main menu I choose 1.2.0 as I think it will be the next update. We can always change it. I changed the modid of current version to 1.2.0. We will have to set the update date the day we release the new update. * Changes to EditorDebugUpdate for easier debugging * Fixes freezes when using the random ram values Stops the content of the ram from overflowing out of the 8 bytes it is supposed to have (would be a shame if a 8 bit wire contained 16 bit of data) * Stats menu responds to escape shortcut * Optimization and Bug Fixes For The New Cache Mechanism (#34) * Reduced recursion in cache generation and decreased cache dictionary lookups, both to the effect of improving the performance of cache generation and the latter improving cache performance overall. Refactored some of the cache related code to the SimChip class. Fixed a bug where output pins larger than 16 bits were being cached even though the current cache mechanism can not handle them. Fixed a bug where tri-stated outputs were being cached as low outputs. Partially fixed a bug where chips being modified did not cause their parent chips to regenerate their cache. Fixed a bug where caches would continue to generate even after switching to another chip. Marked ROM chips as combinational. * Finished refactoring most of the cache code into SimChip. Fully fixed the bug causing parent chips to not recache when their children do. Fixed a bug which allowed chips with loops to cache if the loop was only a single chip, allowing stateful chips to potentially cache and break. * Update version + release date (hopefully right) * Pinstatevalue fix + output of Pulse chip Caused a sim freezing bug when a pulse chip would output to a single-input cached chip. * Update update date --------- Co-authored-by: CC56785 <109369210+CC56785@users.noreply.github.com> Co-authored-by: Chris <christianilhoefer@gmail.com> Co-authored-by: Logic Mindful <master51.main@gmail.com> Co-authored-by: Imred-Gemu <3dsusernamedimred9001@gmail.com>
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