Fix/hip apu host buffer#25863
Conversation
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@liminfei-amd could you please take a look? |
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Thanks for the ping. I tested this on gfx1151 / ROCm 7.2.1. Before #24233, the host-buffer capability and factory were already enabled; the newly reachable behavior was The current patch fixes this conservatively, but disabling the factory reduced pp512 from 5857 to 1502 t/s. I suggest a narrower fix: This keeps pinned staging/output buffers but prevents direct HIP APU computation on |
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Thanks @liminfei-amd for the testing and for clarifying the narrower fix. I tested your suggested variant with my setup, and it still fixes the issue. I've updated the PR accordingly. As for performance, on my setup I didn't see any meaningful difference. Here are my llama-bench results with a Qwen3.6-35B-A3B model:
Could you retest the updated version on your side and confirm whether it preserves the pp512 result you mentioned? If there's still a difference, could you share the exact command and model you used so I can try to reproduce it? |
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Hello I ran into issues on my strix halo box and this PR fixes it. Step 3.7 Flash IQ4_XS will spam I have now tested this pull request on my box and its solved. |
Overview
Fixes a regression after #24233, which restored HIP integrated GPU detection. On my AMD APU, this also made the ROCm host-buffer path available for HIP integrated GPUs. With that path enabled, prompt input appears corrupted: chat templates and system prompts can be ignored, and generated output becomes garbage.
This change keeps integrated GPU detection/reporting intact, but disables host-buffer exposure for HIP integrated GPUs.
Additional information
Tested locally on gfx1151 / RDNA3.5 APU with ROCm 7.14. The corrupted input/output issue is fixed with this patch.
The built-in web UI did not reproduce the issue when used first, but external harnesses like Pi and OpenCode do.
Requirements