Improved specification of sync clock protocol

[glopesdev]

This PR builds on top of and supersedes #61 by restructuring the synchronization clock protocol specification to improve wording and consistency with other spec documents.

• Improved specification of synchronization clock protocol
• Adopt requirement key words from RFC 2119
• Reorganize document sections for consistency and improve wording
• Add explicit transmission packet diagram
• Add schematics for sender / receiver
• Add logic analyzer trace

Closes #155

[glopesdev]

@filcarv @Poofjunior @artursilva0 @bruno-f-cruz I have decided to try and tidy up the synchronization clock protocol to fit within the style of all the other specs.

Specifically, I continue to have questions about how best to represent little-endian byte ordering (right-to-left or left-to-right, indices are correct and consistent with R_VERSION, but reading intuition might not be and is flipped to how we present bit structures in the binary protocol spec). Let me know your thoughts on this and everything else.

@filcarv @Poofjunior I have grouped both the oscilloscope and the logic analyzer trace in the same section, let me know of thoughts and/or whether you would prefer to see both, or just one or the other, or keep them separate (and if so, in which section).

@Poofjunior On the example schematic for the audio jack connector for Harp synchronization signal (ESD protected with TVS diode) provided with the pico template, I was wondering if it might make sense to transfer a copy of that specific schematic to this repository for now, so we could reference it locally as in the other files and make the final distribution self-contained?