[AARCH-24987,herd] Relax the definition bob in relation to Fault Effects#1670
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relokin merged 1 commit intoherd:masterfrom Mar 15, 2026
Merged
[AARCH-24987,herd] Relax the definition bob in relation to Fault Effects#1670relokin merged 1 commit intoherd:masterfrom
relokin merged 1 commit intoherd:masterfrom
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| \newcommand{\ExpRQ}[1]{\withQ{\ExpR{#1}}} | ||
| \newcommand{\withL}[1]{#1 with Release semantics} | ||
| \newcommand{\ExpWL}[1]{\withL{\ExpW{#1}}} | ||
| \newcommand{\FAULTL}[1]{\withL{\FAULT{#1}}} |
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As per the libdir file:
Suggested change
| \newcommand{\FAULTL}[1]{\withL{\FAULT{#1}}} |
This change implements AARCH-24987 as published in the Arm Architecture Reference Manual for A-profile architecture: Known issues in Issue M.a. This issue proposes multiple retrospective relaxations of the hardware behavior in relation to the ordering requirements of instructions with Release semantics. In the Arm ARM issue M.a, section B2.3.7 "Ordering relations", the definition of Barrier-ordered-before includes cases that mention Fault Effects with Release semantics. These are Fault Effects generated by instructions with Release semantics that raise a synchronous exception due to a Data Abort. Arm has received feedback that the concept of Fault Effects with Release semantics is not natural for hardware implementations, and that in some implementations the release semantics are not preserved when an instruction that specifies release semantics raises a synchronous exception due to a Data Abort. For this reason, Arm is proposing to relax the definition of Barrier-ordered-before and remove all uses of Fault Effects with Release semantics. Note that: - For hardware implementing FEAT_ETS3, this relaxation does not matter. The definition of ETS-ordered-before provides order in all cases of synchronous exceptions due to a Data Abort. - For hardware implementing FEAT_ETS2, this relaxation only affects cases of instructions with release semantics that raise a data abort synchronous exception due to an MMU Permission fault. In addition, the definition of Barrier-ordered-before includes two clauses that reference Intrinsic Order Dependency which apply in the case of Explicit Memory Effects generated by an LDIAPP or an STILP instruction. These two clauses were inadvertently extended beyond the original intent which is to specify the order of the Explicit Memory Effects of LDIAPP and STILP to include ordering requirements in relation to Implicit Tag Memory Effects. For this reason, Arm is proposing to relax these two clauses. Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Collaborator
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Hi @relokin I believe this changed the behaviour of the following tests in
See the Is this behaviour expected? Should we just update the kinds file? |
Member
Author
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Hi @HadrienRenaud, thanks for this. I am not sure why I missed this. I saw that the ci did some checks but I missed the fact that these checks were not sufficient. I think regression pass now. |
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