CMPXCHG8B and CMPXCHG16B fix

Author: sha0coder

crates/libmwemu/src/engine/instructions/cmpxchg16b.rs

@@ -5,24 +5,32 @@ use iced_x86::Instruction;
 pub fn execute(emu: &mut Emu, ins: &Instruction, instruction_sz: usize, _rep_step: bool) -> bool {
     emu.show_instruction(color!("Orange"), ins);
 
-    let value0 = match emu.get_operand_value(ins, 0, true) {
+    let addr = match emu.get_operand_value(ins, 0, false) {
         Some(v) => v,
         None => return false,
     };
 
-    let value1 = match emu.get_operand_value(ins, 1, true) {
+    let mem_val = match emu.maps.read_128bits_le(addr) {
         Some(v) => v,
         None => return false,
     };
 
-    if value0 as u16 == (emu.regs().get_ax() as u16) {
+    let rdx = emu.regs().rdx;
+    let rax = emu.regs().rax;
+    let rdx_rax = ((rdx as u128) << 64) | (rax as u128);
+
+    if mem_val == rdx_rax {
         emu.flags_mut().f_zf = true;
-        if !emu.set_operand_value(ins, 0, value1) {
-            return false;
-        }
+        let rcx = emu.regs().rcx;
+        let rbx = emu.regs().rbx;
+        let rcx_rbx = ((rcx as u128) << 64) | (rbx as u128);
+
+        emu.maps.write_bytes(addr, rcx_rbx.to_le_bytes().to_vec());
     } else {
         emu.flags_mut().f_zf = false;
-        emu.regs_mut().set_ax(value1 & 0xffff);
+
+        emu.regs_mut().rax = (mem_val & 0xffffffff_ffffffff) as u64;
+        emu.regs_mut().rdx = (mem_val >> 64) as u64;
     }
     true
 }

crates/libmwemu/src/engine/instructions/cmpxchg8b.rs

@@ -5,24 +5,28 @@ use iced_x86::Instruction;
 pub fn execute(emu: &mut Emu, ins: &Instruction, instruction_sz: usize, _rep_step: bool) -> bool {
     emu.show_instruction(color!("Orange"), ins);
 
-    let value0 = match emu.get_operand_value(ins, 0, true) {
+    let mem_val = match emu.get_operand_value(ins, 0, true) {
         Some(v) => v,
         None => return false,
     };
 
-    let value1 = match emu.get_operand_value(ins, 1, true) {
-        Some(v) => v,
-        None => return false,
-    };
+    let edx = emu.regs().rdx & 0xffffffff;
+    let eax = emu.regs().rax & 0xffffffff;
+    let edx_eax = (edx << 32) | eax;
 
-    if value0 as u8 == (emu.regs().get_al() as u8) {
+    if mem_val == edx_eax {
         emu.flags_mut().f_zf = true;
-        if !emu.set_operand_value(ins, 0, value1) {
+        let ecx = emu.regs().rcx & 0xffffffff;
+        let ebx = emu.regs().rbx & 0xffffffff;
+        let ecx_ebx = (ecx << 32) | ebx;
+
+        if !emu.set_operand_value(ins, 0, ecx_ebx) {
             return false;
         }
     } else {
         emu.flags_mut().f_zf = false;
-        emu.regs_mut().set_al(value1 & 0xff);
+        emu.regs_mut().rax = mem_val & 0xffffffff;
+        emu.regs_mut().rdx = (mem_val >> 32) & 0xffffffff;
     }
     true
 }