Analog circuit simulator in Rust, inspired by LTspice and PSpice. It uses modified nodal analysis (MNA) to solve linear circuits with:
- R — resistors
- C — capacitors (transient, backward Euler)
- L — inductors (transient, backward Euler)
- V — DC voltage sources
To try it on your browser, visit https://rspice-web.vercel.app/
Alternatively, you can compile it and run on your desktop with the following commands,
git clone https://github.com/siamsamix/RSpice.git
cd RSpice
cargo run --release -p rspice # graphical appDesktop app built with egui — dark theme, netlist editor, DC tables, and interactive waveform plots.
- Run or F5 — simulate the current netlist
- Examples — load RC, voltage divider, or RL circuits
- Open / Save — netlist files (
.cir) - Tabs: Overview, DC, Waveforms (zoomable plot)
SPICE-style text netlists:
| Element | Syntax | Example |
|---|---|---|
| Resistor | Rname n+ n- value |
R1 1 2 1k |
| Capacitor | Cname n+ n- value |
C1 2 0 1u |
| Inductor | Lname n+ n- value |
L1 2 0 1m |
| Voltage | Vname n+ n- DC value |
V1 1 0 DC 5 |
Node 0 is ground. Values support SI suffixes: f p n u m k g t (e.g. 1k, 4.7u).
.opor.dc— DC operating point (resistors, voltage sources; L shorts, C open).tran <tstep> <tstop> [tstart]— transient simulation
Lines starting with * or ; are comments. End with .end.
* RC charging
V1 1 0 DC 5
R1 1 2 1k
C1 2 0 1u
.tran 10u 5m
.end
Export waveform as CSV:
cargo run --release -- examples/rc_charge.cir --csv > rc.csvcircuitsim/ Core library (parser, MNA, analyses)
circuitsim-cli/ Command-line runner
circuitsim-gui/ egui desktop application
examples/ Sample netlists
DC voltage sources only (no PULSE/SIN yet)- No nonlinear devices (diodes, BJTs, MOSFETs)
No AC (.ac) or noise analysis- Dense matrix solver (fine for small/medium netlists)
MIT